Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml

   1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: "http://devicetree.org/schemas/mmc/renesas,sdhi.yaml#"
   5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
   6
   7 title: Renesas SDHI SD/MMC controller
   8
   9 maintainers:
  10   - Wolfram Sang <wsa+renesas@sang-engineering.com>
  11
  12 properties:
  13   compatible:
  14     oneOf:
  15       - items:
  16           - const: renesas,sdhi-sh73a0  # R-Mobile APE6
  17       - items:
  18           - const: renesas,sdhi-r7s72100 # RZ/A1H
  19       - items:
  20           - const: renesas,sdhi-r7s9210 # SH-Mobile AG5
  21       - items:
  22           - const: renesas,sdhi-r8a73a4 # R-Mobile APE6
  23       - items:
  24           - const: renesas,sdhi-r8a7740 # R-Mobile A1
  25       - items:
  26           - enum:
  27               - renesas,sdhi-r8a7778 # R-Car M1
  28               - renesas,sdhi-r8a7779 # R-Car H1
  29           - const: renesas,rcar-gen1-sdhi # R-Car Gen1
  30       - items:
  31           - enum:
  32               - renesas,sdhi-r8a7742  # RZ/G1H
  33               - renesas,sdhi-r8a7743  # RZ/G1M
  34               - renesas,sdhi-r8a7744  # RZ/G1N
  35               - renesas,sdhi-r8a7745  # RZ/G1E
  36               - renesas,sdhi-r8a77470 # RZ/G1C
  37               - renesas,sdhi-r8a7790  # R-Car H2
  38               - renesas,sdhi-r8a7791  # R-Car M2-W
  39               - renesas,sdhi-r8a7792  # R-Car V2H
  40               - renesas,sdhi-r8a7793  # R-Car M2-N
  41               - renesas,sdhi-r8a7794  # R-Car E2
  42           - const: renesas,rcar-gen2-sdhi # R-Car Gen2 and RZ/G1
  43       - items:
  44           - const: renesas,sdhi-mmc-r8a77470 # RZ/G1C (SDHI/MMC IP)
  45       - items:
  46           - enum:
  47               - renesas,sdhi-r8a774a1  # RZ/G2M
  48               - renesas,sdhi-r8a774b1  # RZ/G2N
  49               - renesas,sdhi-r8a774c0  # RZ/G2E
  50               - renesas,sdhi-r8a774e1  # RZ/G2H
  51               - renesas,sdhi-r8a7795   # R-Car H3
  52               - renesas,sdhi-r8a7796   # R-Car M3-W
  53               - renesas,sdhi-r8a77961  # R-Car M3-W+
  54               - renesas,sdhi-r8a77965  # R-Car M3-N
  55               - renesas,sdhi-r8a77970  # R-Car V3M
  56               - renesas,sdhi-r8a77980  # R-Car V3H
  57               - renesas,sdhi-r8a77990  # R-Car E3
  58               - renesas,sdhi-r8a77995  # R-Car D3
  59               - renesas,sdhi-r8a779a0  # R-Car V3U
  60               - renesas,sdhi-r9a07g044 # RZ/G2{L,LC}
  61           - const: renesas,rcar-gen3-sdhi # R-Car Gen3 or RZ/G2
  62
  63   reg:
  64     maxItems: 1
  65
  66   interrupts:
  67     minItems: 1
  68     maxItems: 3
  69
  70   clocks: true
  71
  72   clock-names: true
  73
  74   dmas:
  75     minItems: 4
  76     maxItems: 4
  77
  78   dma-names:
  79     minItems: 4
  80     maxItems: 4
  81     items:
  82       enum:
  83         - tx
  84         - rx
  85
  86   power-domains:
  87     maxItems: 1
  88
  89   resets:
  90     maxItems: 1
  91
  92   pinctrl-0:
  93     minItems: 1
  94     maxItems: 2
  95
  96   pinctrl-1:
  97     maxItems: 1
  98
  99   pinctrl-names: true
 100
 101   max-frequency: true
 102
 103 allOf:
 104   - $ref: "mmc-controller.yaml"
 105
 106   - if:
 107       properties:
 108         compatible:
 109           contains:
 110             const: renesas,sdhi-r9a07g044
 111     then:
 112       properties:
 113         clocks:
 114           items:
 115             - description: IMCLK, SDHI channel main clock1.
 116             - description: IMCLK2, SDHI channel main clock2. When this clock is
 117                            turned off, external SD card detection cannot be
 118                            detected.
 119             - description: CLK_HS, SDHI channel High speed clock which operates
 120                            4 times that of SDHI channel main clock1.
 121             - description: ACLK, SDHI channel bus clock.
 122         clock-names:
 123           items:
 124             - const: imclk
 125             - const: imclk2
 126             - const: clk_hs
 127             - const: aclk
 128       required:
 129         - clock-names
 130         - resets
 131     else:
 132       properties:
 133         clocks:
 134           minItems: 1
 135           maxItems: 2
 136         clock-names:
 137           minItems: 1
 138           items:
 139             - const: core
 140             - const: cd
 141
 142   - if:
 143       properties:
 144         compatible:
 145           contains:
 146             const: renesas,sdhi-mmc-r8a77470
 147     then:
 148       properties:
 149         pinctrl-names:
 150           items:
 151             - const: state_uhs
 152     else:
 153       properties:
 154         pinctrl-names:
 155           minItems: 1
 156           items:
 157             - const: default
 158             - const: state_uhs
 159
 160   - if:
 161       properties:
 162         compatible:
 163           contains:
 164             enum:
 165               - renesas,sdhi-r7s72100
 166               - renesas,sdhi-r7s9210
 167     then:
 168       required:
 169         - clock-names
 170       description:
 171         The internal card detection logic that exists in these controllers is
 172         sectioned off to be run by a separate second clock source to allow
 173         the main core clock to be turned off to save power.
 174
 175 required:
 176   - compatible
 177   - reg
 178   - interrupts
 179   - clocks
 180   - power-domains
 181
 182 unevaluatedProperties: false
 183
 184 examples:
 185   - |
 186     #include <dt-bindings/clock/r8a7790-cpg-mssr.h>
 187     #include <dt-bindings/interrupt-controller/arm-gic.h>
 188     #include <dt-bindings/power/r8a7790-sysc.h>
 189
 190     sdhi0: mmc@ee100000 {
 191             compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi";
 192             reg = <0xee100000 0x328>;
 193             interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
 194             clocks = <&cpg CPG_MOD 314>;
 195             dmas = <&dmac0 0xcd>, <&dmac0 0xce>, <&dmac1 0xcd>, <&dmac1 0xce>;
 196             dma-names = "tx", "rx", "tx", "rx";
 197             max-frequency = <195000000>;
 198             power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 199             resets = <&cpg 314>;
 200     };
 201
 202     sdhi1: mmc@ee120000 {
 203              compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi";
 204              reg = <0xee120000 0x328>;
 205              interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
 206              clocks = <&cpg CPG_MOD 313>;
 207              dmas = <&dmac0 0xc9>, <&dmac0 0xca>, <&dmac1 0xc9>, <&dmac1 0xca>;
 208              dma-names = "tx", "rx", "tx", "rx";
 209              max-frequency = <195000000>;
 210              power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 211              resets = <&cpg 313>;
 212     };
 213
 214     sdhi2: mmc@ee140000 {
 215              compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi";
 216              reg = <0xee140000 0x100>;
 217              interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
 218              clocks = <&cpg CPG_MOD 312>;
 219              dmas = <&dmac0 0xc1>, <&dmac0 0xc2>, <&dmac1 0xc1>, <&dmac1 0xc2>;
 220              dma-names = "tx", "rx", "tx", "rx";
 221              max-frequency = <97500000>;
 222              power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 223              resets = <&cpg 312>;
 224      };
 225
 226      sdhi3: mmc@ee160000 {
 227               compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi";
 228               reg = <0xee160000 0x100>;
 229               interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
 230               clocks = <&cpg CPG_MOD 311>;
 231               dmas = <&dmac0 0xd3>, <&dmac0 0xd4>, <&dmac1 0xd3>, <&dmac1 0xd4>;
 232               dma-names = "tx", "rx", "tx", "rx";
 233               max-frequency = <97500000>;
 234               power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 235               resets = <&cpg 311>;
 236     };