1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/memory-controllers/renesas,rpc-if.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas Reduced Pin Count Interface (RPC-IF)
10 - Sergei Shtylyov <sergei.shtylyov@gmail.com>
13 Renesas RPC-IF allows a SPI flash or HyperFlash connected to the SoC to
14 be accessed via the external address space read mode or the manual mode.
16 The flash chip itself should be represented by a subnode of the RPC-IF node.
17 The flash interface is selected based on the "compatible" property of this
19 - if it contains "jedec,spi-nor", then SPI is used;
20 - if it contains "cfi-flash", then HyperFlash is used.
23 - $ref: "/schemas/spi/spi-controller.yaml#"
29 - renesas,r8a774a1-rpc-if # RZ/G2M
30 - renesas,r8a774b1-rpc-if # RZ/G2N
31 - renesas,r8a774c0-rpc-if # RZ/G2E
32 - renesas,r8a774e1-rpc-if # RZ/G2H
33 - renesas,r8a77970-rpc-if # R-Car V3M
34 - renesas,r8a77980-rpc-if # R-Car V3H
35 - renesas,r8a77995-rpc-if # R-Car D3
36 - const: renesas,rcar-gen3-rpc-if # a generic R-Car gen3 or RZ/G2 device
40 - description: RPC-IF registers
41 - description: direct mapping read mode area
42 - description: write buffer area
69 unevaluatedProperties: false
83 #include <dt-bindings/clock/renesas-cpg-mssr.h>
84 #include <dt-bindings/power/r8a77995-sysc.h>
87 compatible = "renesas,r8a77995-rpc-if", "renesas,rcar-gen3-rpc-if";
88 reg = <0xee200000 0x200>,
89 <0x08000000 0x4000000>,
91 reg-names = "regs", "dirmap", "wbuf";
92 clocks = <&cpg CPG_MOD 917>;
93 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
99 compatible = "jedec,spi-nor";
101 spi-max-frequency = <40000000>;
102 spi-tx-bus-width = <1>;
103 spi-rx-bus-width = <1>;