Documentation/devicetree/bindings/interrupt-controller/fsl,ls-extirq.txt

   1 * Freescale Layerscape external IRQs
   2
   3 Some Layerscape SOCs (LS1021A, LS1043A, LS1046A
   4 LS1088A, LS208xA, LX216xA) support inverting
   5 the polarity of certain external interrupt lines.
   6
   7 The device node must be a child of the node representing the
   8 Supplemental Configuration Unit (SCFG).
   9
  10 Required properties:
  11 - compatible: should be "fsl,<soc-name>-extirq", e.g. "fsl,ls1021a-extirq".
  12   "fsl,ls1043a-extirq": for LS1043A, LS1046A.
  13   "fsl,ls1088a-extirq": for LS1088A, LS208xA, LX216xA.
  14 - #interrupt-cells: Must be 2. The first element is the index of the
  15   external interrupt line. The second element is the trigger type.
  16 - #address-cells: Must be 0.
  17 - interrupt-controller: Identifies the node as an interrupt controller
  18 - reg: Specifies the Interrupt Polarity Control Register (INTPCR) in
  19   the SCFG or the External Interrupt Control Register (IRQCR) in
  20   the ISC.
  21 - interrupt-map: Specifies the mapping from external interrupts to GIC
  22   interrupts.
  23 - interrupt-map-mask: Must be <0xffffffff 0>.
  24
  25 Example:
  26         scfg: scfg@1570000 {
  27                 compatible = "fsl,ls1021a-scfg", "syscon";
  28                 reg = <0x0 0x1570000 0x0 0x10000>;
  29                 big-endian;
  30                 #address-cells = <1>;
  31                 #size-cells = <1>;
  32                 ranges = <0x0 0x0 0x1570000 0x10000>;
  33
  34                 extirq: interrupt-controller@1ac {
  35                         compatible = "fsl,ls1021a-extirq";
  36                         #interrupt-cells = <2>;
  37                         #address-cells = <0>;
  38                         interrupt-controller;
  39                         reg = <0x1ac 4>;
  40                         interrupt-map =
  41                                 <0 0 &gic GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>,
  42                                 <1 0 &gic GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>,
  43                                 <2 0 &gic GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>,
  44                                 <3 0 &gic GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>,
  45                                 <4 0 &gic GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
  46                                 <5 0 &gic GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
  47                         interrupt-map-mask = <0xffffffff 0x0>;
  48                 };
  49         };
  50
  51
  52         interrupts-extended = <&gic GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>,
  53                               <&extirq 1 IRQ_TYPE_LEVEL_LOW>;