Documentation/devicetree/bindings/i2c/i2c-qcom-cci.txt

   1 Qualcomm Camera Control Interface (CCI) I2C controller
   2
   3 PROPERTIES:
   4
   5 - compatible:
   6         Usage: required
   7         Value type: <string>
   8         Definition: must be one of:
   9                 "qcom,msm8916-cci"
  10                 "qcom,msm8996-cci"
  11                 "qcom,sdm845-cci"
  12                 "qcom,sm8250-cci"
  13
  14 - reg
  15         Usage: required
  16         Value type: <prop-encoded-array>
  17         Definition: base address CCI I2C controller and length of memory
  18                     mapped region.
  19
  20 - interrupts:
  21         Usage: required
  22         Value type: <prop-encoded-array>
  23         Definition: specifies the CCI I2C interrupt. The format of the
  24                     specifier is defined by the binding document describing
  25                     the node's interrupt parent.
  26
  27 - clocks:
  28         Usage: required
  29         Value type: <prop-encoded-array>
  30         Definition: a list of phandle, should contain an entry for each
  31                     entries in clock-names.
  32
  33 - clock-names
  34         Usage: required
  35         Value type: <string>
  36         Definition: a list of clock names, must include "cci" clock.
  37
  38 - power-domains
  39         Usage: required for "qcom,msm8996-cci"
  40         Value type: <prop-encoded-array>
  41         Definition:
  42
  43 SUBNODES:
  44
  45 The CCI provides I2C masters for one (msm8916) or two i2c busses (msm8996,
  46 sdm845 and sm8250), described as subdevices named "i2c-bus@0" and "i2c-bus@1".
  47
  48 PROPERTIES:
  49
  50 - reg:
  51         Usage: required
  52         Value type: <u32>
  53         Definition: Index of the CCI bus/master
  54
  55 - clock-frequency:
  56         Usage: optional
  57         Value type: <u32>
  58         Definition: Desired I2C bus clock frequency in Hz, defaults to 100
  59                     kHz if omitted.
  60
  61 Example:
  62
  63         cci@a0c000 {
  64                 compatible = "qcom,msm8996-cci";
  65                 #address-cells = <1>;
  66                 #size-cells = <0>;
  67                 reg = <0xa0c000 0x1000>;
  68                 interrupts = <GIC_SPI 295 IRQ_TYPE_EDGE_RISING>;
  69                 clocks = <&mmcc MMSS_MMAGIC_AHB_CLK>,
  70                          <&mmcc CAMSS_TOP_AHB_CLK>,
  71                          <&mmcc CAMSS_CCI_AHB_CLK>,
  72                          <&mmcc CAMSS_CCI_CLK>,
  73                          <&mmcc CAMSS_AHB_CLK>;
  74                 clock-names = "mmss_mmagic_ahb",
  75                               "camss_top_ahb",
  76                               "cci_ahb",
  77                               "cci",
  78                               "camss_ahb";
  79
  80                 i2c-bus@0 {
  81                         reg = <0>;
  82                         clock-frequency = <400000>;
  83                         #address-cells = <1>;
  84                         #size-cells = <0>;
  85                 };
  86
  87                 i2c-bus@1 {
  88                         reg = <1>;
  89                         clock-frequency = <400000>;
  90                         #address-cells = <1>;
  91                         #size-cells = <0>;
  92                 };
  93         };