Documentation/devicetree/bindings/display/allwinner,sun4i-a10-display-backend.yaml

   1 # SPDX-License-Identifier: GPL-2.0
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/display/allwinner,sun4i-a10-display-backend.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Allwinner A10 Display Engine Backend Device Tree Bindings
   8
   9 maintainers:
  10   - Chen-Yu Tsai <wens@csie.org>
  11   - Maxime Ripard <mripard@kernel.org>
  12
  13 description: |
  14   The display engine backend exposes layers and sprites to the system.
  15
  16 properties:
  17   compatible:
  18     enum:
  19       - allwinner,sun4i-a10-display-backend
  20       - allwinner,sun5i-a13-display-backend
  21       - allwinner,sun6i-a31-display-backend
  22       - allwinner,sun7i-a20-display-backend
  23       - allwinner,sun8i-a23-display-backend
  24       - allwinner,sun8i-a33-display-backend
  25       - allwinner,sun9i-a80-display-backend
  26
  27   reg:
  28     minItems: 1
  29     items:
  30       - description: Display Backend registers
  31       - description: SAT registers
  32
  33   reg-names:
  34     minItems: 1
  35     items:
  36       - const: be
  37       - const: sat
  38
  39   interrupts:
  40     maxItems: 1
  41
  42   clocks:
  43     minItems: 3
  44     items:
  45       - description: The backend interface clock
  46       - description: The backend module clock
  47       - description: The backend DRAM clock
  48       - description: The SAT clock
  49
  50   clock-names:
  51     minItems: 3
  52     items:
  53       - const: ahb
  54       - const: mod
  55       - const: ram
  56       - const: sat
  57
  58   resets:
  59     minItems: 1
  60     items:
  61       - description: The Backend reset line
  62       - description: The SAT reset line
  63
  64   reset-names:
  65     minItems: 1
  66     items:
  67       - const: be
  68       - const: sat
  69
  70   # FIXME: This should be made required eventually once every SoC will
  71   # have the MBUS declared.
  72   interconnects:
  73     maxItems: 1
  74
  75   # FIXME: This should be made required eventually once every SoC will
  76   # have the MBUS declared.
  77   interconnect-names:
  78     const: dma-mem
  79
  80   ports:
  81     $ref: /schemas/graph.yaml#/properties/ports
  82
  83     properties:
  84       port@0:
  85         $ref: /schemas/graph.yaml#/properties/port
  86         description:
  87           Input endpoints of the controller.
  88
  89       port@1:
  90         $ref: /schemas/graph.yaml#/properties/port
  91         description:
  92           Output endpoints of the controller.
  93
  94     required:
  95       - port@0
  96       - port@1
  97
  98 required:
  99   - compatible
 100   - reg
 101   - interrupts
 102   - clocks
 103   - clock-names
 104   - resets
 105   - ports
 106
 107 additionalProperties: false
 108
 109 if:
 110   properties:
 111     compatible:
 112       contains:
 113         const: allwinner,sun8i-a33-display-backend
 114
 115 then:
 116   properties:
 117     reg:
 118       minItems: 2
 119
 120     reg-names:
 121       minItems: 2
 122
 123     clocks:
 124       minItems: 4
 125
 126     clock-names:
 127       minItems: 4
 128
 129     resets:
 130       minItems: 2
 131
 132     reset-names:
 133       minItems: 2
 134
 135   required:
 136     - reg-names
 137     - reset-names
 138
 139 else:
 140   properties:
 141     reg:
 142       maxItems: 1
 143
 144     reg-names:
 145       maxItems: 1
 146
 147     clocks:
 148       maxItems: 3
 149
 150     clock-names:
 151       maxItems: 3
 152
 153     resets:
 154       maxItems: 1
 155
 156     reset-names:
 157       maxItems: 1
 158
 159 examples:
 160   - |
 161     /*
 162      * This comes from the clock/sun4i-a10-ccu.h and
 163      * reset/sun4i-a10-ccu.h headers, but we can't include them since
 164      * it would trigger a bunch of warnings for redefinitions of
 165      * symbols with the other example.
 166      */
 167
 168     #define CLK_AHB_DE_BE0      42
 169     #define CLK_DRAM_DE_BE0     140
 170     #define CLK_DE_BE0          144
 171     #define RST_DE_BE0          5
 172
 173     display-backend@1e60000 {
 174         compatible = "allwinner,sun4i-a10-display-backend";
 175         reg = <0x01e60000 0x10000>;
 176         interrupts = <47>;
 177         clocks = <&ccu CLK_AHB_DE_BE0>, <&ccu CLK_DE_BE0>,
 178                  <&ccu CLK_DRAM_DE_BE0>;
 179         clock-names = "ahb", "mod",
 180                       "ram";
 181         resets = <&ccu RST_DE_BE0>;
 182
 183         ports {
 184             #address-cells = <1>;
 185             #size-cells = <0>;
 186
 187             port@0 {
 188                 #address-cells = <1>;
 189                 #size-cells = <0>;
 190                 reg = <0>;
 191
 192                 endpoint@0 {
 193                     reg = <0>;
 194                     remote-endpoint = <&fe0_out_be0>;
 195                 };
 196
 197                 endpoint@1 {
 198                     reg = <1>;
 199                     remote-endpoint = <&fe1_out_be0>;
 200                 };
 201             };
 202
 203             port@1 {
 204                 #address-cells = <1>;
 205                 #size-cells = <0>;
 206                 reg = <1>;
 207
 208                 endpoint@0 {
 209                     reg = <0>;
 210                     remote-endpoint = <&tcon0_in_be0>;
 211                 };
 212
 213                 endpoint@1 {
 214                     reg = <1>;
 215                     remote-endpoint = <&tcon1_in_be0>;
 216                 };
 217             };
 218         };
 219     };
 220
 221   - |
 222     #include <dt-bindings/interrupt-controller/arm-gic.h>
 223
 224     /*
 225      * This comes from the clock/sun8i-a23-a33-ccu.h and
 226      * reset/sun8i-a23-a33-ccu.h headers, but we can't include them
 227      * since it would trigger a bunch of warnings for redefinitions of
 228      * symbols with the other example.
 229      */
 230
 231     #define CLK_BUS_DE_BE       40
 232     #define CLK_BUS_SAT         46
 233     #define CLK_DRAM_DE_BE      84
 234     #define CLK_DE_BE           85
 235     #define RST_BUS_DE_BE       21
 236     #define RST_BUS_SAT         27
 237
 238     display-backend@1e60000 {
 239         compatible = "allwinner,sun8i-a33-display-backend";
 240         reg = <0x01e60000 0x10000>, <0x01e80000 0x1000>;
 241         reg-names = "be", "sat";
 242         interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
 243         clocks = <&ccu CLK_BUS_DE_BE>, <&ccu CLK_DE_BE>,
 244                  <&ccu CLK_DRAM_DE_BE>, <&ccu CLK_BUS_SAT>;
 245         clock-names = "ahb", "mod",
 246                       "ram", "sat";
 247         resets = <&ccu RST_BUS_DE_BE>, <&ccu RST_BUS_SAT>;
 248         reset-names = "be", "sat";
 249
 250         ports {
 251             #address-cells = <1>;
 252             #size-cells = <0>;
 253
 254             port@0 {
 255                 reg = <0>;
 256
 257                 endpoint {
 258                     remote-endpoint = <&fe0_out_be0>;
 259                 };
 260             };
 261
 262             port@1 {
 263                 reg = <1>;
 264
 265                 endpoint {
 266                     remote-endpoint = <&drc0_in_be0>;
 267                 };
 268             };
 269         };
 270     };
 271
 272 ...