Documentation/devicetree/bindings/clock/qcom,a53pll.yaml

   1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/clock/qcom,a53pll.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Qualcomm A53 PLL Binding
   8
   9 maintainers:
  10   - Sivaprakash Murugesan <sivaprak@codeaurora.org>
  11
  12 description:
  13   The A53 PLL on few Qualcomm platforms is the main CPU PLL used used for
  14   frequencies above 1GHz.
  15
  16 properties:
  17   compatible:
  18     enum:
  19       - qcom,ipq6018-a53pll
  20       - qcom,msm8916-a53pll
  21       - qcom,msm8939-a53pll
  22
  23   reg:
  24     maxItems: 1
  25
  26   '#clock-cells':
  27     const: 0
  28
  29   clocks:
  30     items:
  31       - description: board XO clock
  32
  33   clock-names:
  34     items:
  35       - const: xo
  36
  37   operating-points-v2: true
  38
  39 required:
  40   - compatible
  41   - reg
  42   - '#clock-cells'
  43
  44 additionalProperties: false
  45
  46 examples:
  47   #Example 1 - A53 PLL found on MSM8916 devices
  48   - |
  49     a53pll: clock@b016000 {
  50         compatible = "qcom,msm8916-a53pll";
  51         reg = <0xb016000 0x40>;
  52         #clock-cells = <0>;
  53     };
  54   #Example 2 - A53 PLL found on IPQ6018 devices
  55   - |
  56     a53pll_ipq: clock-controller@b116000 {
  57         compatible = "qcom,ipq6018-a53pll";
  58         reg = <0x0b116000 0x40>;
  59         #clock-cells = <0>;
  60         clocks = <&xo>;
  61         clock-names = "xo";
  62     };