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drm/xe: Restrict huge PTEs to 1GiB
2023-12-21 Matt Roperdrm/xe/dg2: Drop Wa_22014600077
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-21 Matt Roperdrm/xe/dg2: Wa_18028616096 now applies to all DG2
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-21 Matt Roperdrm/xe: Drop EXECLIST_CONTROL from error state dump
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-21 Matt Roperdrm/xe: Add Wa_14019821291
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-21 Matt Roperdrm/xe/xe2: Program correct MOCS registers
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-21 Matt Roperdrm/xe/mocs: MOCS registers are multicast on Xe_HP...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-21 Matt Roperdrm/xe/xe2: Update SVG state handling
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-21 Matt Roperdrm/xe: Emit SVG state on RCS during driver load on...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-21 Matt Roperdrm/xe: Prepare to emit non-register state while recording...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-21 Matt Roperdrm/xe/debugfs: Include GFXPIPE commands in LRC dump
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-21 Matt Roperdrm/xe/debugfs: Add dump of default LRCs' MI instructions
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-21 Matt Roperdrm/xe: Extract MI_* instructions to their own header
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-21 Matt Roperdrm/xe: Clarify number of dwords/qwords stored by MI_STORE_D...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-21 Matt Roperdrm/xe: Separate number of registers from MI_LRI opcode
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-21 Matt Roperdrm/xe: Make MI_FLUSH_DW immediate size more explicit
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-21 Matt Roperdrm/xe/xe2: Program PAT tables
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-21 Matt Roperdrm/xe/tuning: Add missing engine class rules for LRC...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-21 Matt Roperdrm/xe: Infer service copy functionality from engine...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-21 Matt Roperdrm/xe/wa: Apply tile workarounds at probe/resume
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-21 Matt Roperdrm/xe: Drop xe_mmio_write64()
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-21 Matt Roperdrm/xe: Avoid 64-bit register reads
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-21 Matt Roperdrm/xe/lnl: Add GuC firmware definition
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-21 Matt Roperdrm/xe/lnl: Add LNL platform definition
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-21 Matt Roperdrm/xe/xe2: Program GuC's MOCS on Xe2 and beyond
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-21 Matt Roperdrm/xe/xe2: Track VA bits independently of max page...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-21 Matt Roperdrm/xe/xe2: Define Xe2_LPM IP features
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-21 Matt Roperdrm/xe/xe2: Define Xe2_LPG IP features
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-21 Matt Roperdrm/xe/xe2: AuxCCS is no longer used
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-21 Matt Roperdrm/xe/xe2: Handle fused-off CCS engines
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-21 Matt Roperdrm/xe/xe2: Update context image layouts
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-21 Matt Roperdrm/xe/xe2: Add MCR register steering for media GT
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-21 Matt Roperdrm/xe/xe2: Add MCR register steering for primary GT
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-21 Matt Roperdrm/xe/xe2: Add GT topology readout
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-21 Matt Roperdrm/xe/xe2: Update render/compute context image sizes
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-21 Matt Roperdrm/xe: Stop tracking 4-tile support
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-21 Matt Roperdrm/xe: Add Wa_14015150844 for DG2 and Xe_LPG
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-21 Matt Roperdrm/xe/mtl: Reduce Wa_14018575942 scope to the CCS...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-21 Matt Roperdrm/xe: xe_engine_create_ioctl should check gt_count...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-21 Matt Roperdrm/xe/mtl: Map PPGTT as CPU:WC
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-21 Matt Roperdrm/xe: Enable PCI device earlier
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-21 Matt Roperdrm/xe: Print proper revid value for unknown media...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-21 Matt Roperdrm/xe: Don't raise error on fused-off media
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-21 Matt Roperdrm/xe: Return GMD_ID revid properly
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-21 Matt Roperdrm/xe/mtl: Add some initial MTL workarounds
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-19 Matt Roperdrm/xe/wa: Extend scope of Wa_14015795083
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-19 Matt Roperdrm/xe: Don't hardcode GuC's MOCS index in register...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-19 Matt Roperdrm/xe: Initialize MOCS earlier
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-19 Matt Roperdrm/xe: Reformat xe_guc_regs.h
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-19 Matt Roperdrm/xe: Add kerneldoc description of multi-tile devices
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-19 Matt Roperdrm/xe: Reinstate media GT support
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-19 Matt Roperdrm/xe: Update query uapi to support standalone media
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-19 Matt Roperdrm/xe: Allow GT looping and lookup on standalone media
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-19 Matt Roperdrm/xe/tlb: Obtain forcewake when doing GGTT TLB invalidations
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-19 Matt Roperdrm/xe: Invalidate TLB on all affected GTs during GGTT...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-19 Matt Roperdrm/xe: Replace xe_gt_irq_postinstall with xe_irq_enable_hwe
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-19 Matt Roperdrm/xe/irq: Untangle postinstall functions
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-19 Matt Roperdrm/xe/irq: Ensure primary GuC won't clobber media...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-19 Matt Roperdrm/xe/irq: Move ASLE backlight interrupt logic
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-19 Matt Roperdrm/xe: Interrupts are delivered per-tile, not per-GT
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-19 Matt Roperdrm/xe: Add media GT to tile
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-19 Matt Roperdrm/xe: Allocate GT dynamically
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-19 Matt Roperdrm/xe: Drop extra_gts[] declarations and XE_GT_TYPE_REMOTE
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-19 Matt Roperdrm/xe: Drop vram_id
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-19 Matt Roperdrm/xe: Clarify 'gt' retrieval for primary tile
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-19 Matt Roperdrm/xe: Move migration from GT to tile
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-19 Matt Roperdrm/xe: Memory allocations are tile-based, not GT-based
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-19 Matt Roperdrm/xe: Move VRAM from GT to tile
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-19 Matt Roperdrm/xe: Move GGTT from GT to tile
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-19 Matt Roperdrm/xe: Move register MMIO into xe_tile
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-19 Matt Roperdrm/xe: Add for_each_tile iterator
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-19 Matt Roperdrm/xe: Add backpointer from gt to tile
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-19 Matt Roperdrm/xe: Introduce xe_tile
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-19 Matt Roperdrm/xe/mtl: Disable media GT
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-19 Matt Roperdrm/xe/pvc: Don't try to invalidate AuxCCS TLB
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-19 Matt Roperdrm/xe: Add stepping support for GMD_ID platforms
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-19 Matt Roperdrm/xe/adln: Enable ADL-N
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-19 Matt Roperdrm/xe/adlp: Add revid => step mapping
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-19 Matt Roperdrm/xe: Drop GFX_FLSH_CNTL_GEN6 write during GGTT invalidation
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-19 Matt Roperdrm/xe: Fix xe_mmio_rmw32 operation
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-19 Matt Roperdrm/xe/sr: Apply masked registers properly
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-19 Matt Roperdrm/xe: Only request PCODE_WRITE_MIN_FREQ_TABLE on...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-19 Matt Roperdrm/xe: Track whether platform has LLC
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-19 Matt Roperdrm/xe: Use packed bitfields for xe->info feature flags
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-19 Matt Roperdrm/xe: Let primary and media GT share a kernel_bb_pool
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-19 Matt Roperdrm/xe: Clean up xe_device_desc
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-19 Matt Roperdrm/xe: Add KUnit test for xe_pci.c IP engine lists
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-19 Matt Roperdrm/xe: Select graphics/media descriptors from GMD_ID
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-19 Matt Roperdrm/xe: Add printable name to IP descriptors
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-19 Matt Roperdrm/xe: Clarify GT counting logic
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-19 Matt Roperdrm/xe: Move engine masks into IP descriptor structures
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-19 Matt Roperdrm/xe: Move most platform traits to graphics IP
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-19 Matt Roperdrm/xe: Set require_force_probe in each platform's...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-19 Matt Roperdrm/xe: Start splitting xe_device_desc into graphics...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-19 Matt Roperdrm/xe/irq: Don't clobber display interrupts on multi...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-19 Matt Roperdrm/xe/irq: Drop commented-out code for non-existent...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-19 Matt Roperdrm/xe/irq: Drop remaining "gen11_" prefix from IRQ...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-19 Matt Roperdrm/xe/irq: Rename and clarify top-level interrupt...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-19 Matt Roperdrm/xe/irq: Drop unnecessary GEN11_ and GEN12_ register...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-19 Matt Roperdrm/xe/irq: Drop IRQ_INIT and IRQ_RESET macros
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2023-12-19 Matt Roperdrm/xe/irq: Add helpers to find ISR/IIR/IMR/IER registers
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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