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cxl/mem: Trace General Media Event Record
2023-01-27 Ira Weinycxl/mem: Trace General Media Event Record
Reviewed-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2023-01-27 Davidlohr Buesocxl/mem: Wire up event interrupts
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2023-01-26 Ira Weinycxl/mem: Read, trace, and clear events on driver load
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2023-01-25 Dan Williamscxl/port: Link the 'parent_dport' in portX/ and endpointX...
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2023-01-25 Dan Williamscxl/region: Clarify when a cxld->commit() callback...
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2023-01-25 Luis Chamberlaintools/testing/cxl: require 64-bit
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2023-01-25 Robert Richtercxl/pci: Show opcode in debug messages when sending...
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2023-01-05 Dan Williamstools/testing/cxl: Prevent cxl_test from confusing...
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2023-01-05 Davidlohr Buesocxl/region: Only warn about cpu_cache_invalidate_memregion...
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2023-01-05 Ira WeinyPCI/CXL: Export native CXL error reporting control
Reviewed-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2023-01-05 Dan Williamscxl/pci: Move tracepoint definitions to drivers/cxl...
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2022-12-08 Fan Nicxl/region: Fix memdev reuse check
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2022-12-06 Dan Williamscxl/pci: Remove endian confusion
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2022-12-06 Dan Williamscxl/pci: Add some type-safety to the AER trace points
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2022-12-06 Dan Williamscxl/security: Drop security command ioctl uapi
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2022-12-06 Dan Williamscxl/mbox: Add variable output size validation for internal...
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2022-12-06 Dan Williamscxl/mbox: Enable cxl_mbox_send_cmd() users to validate...
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2022-12-06 Dan Williamscxl/security: Fix Get Security State output payload...
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2022-12-06 Dave Jiangcxl: update names for interleave ways conversion macros
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2022-12-06 Dave Jiangcxl: update names for interleave granularity conversion...
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2022-12-05 Robert Richtercxl/acpi: Warn about an invalid CHBCR in an existing...
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2022-12-05 Dan Williamstools/testing/cxl: Require cache invalidation bypass
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2022-12-05 Alison Schofieldcxl/acpi: Fail decoder add if CXIMS for HBIG is missing
Suggested-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2022-12-05 Colin Ian Kingcxl/region: Fix spelling mistake "memergion" -> "memregion"
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2022-12-05 Dan Williamscxl/regs: Fix sparse warning
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2022-12-05 Dan WilliamsMerge branch 'for-6.2/cxl-xor' into for-6.2/cxl
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2022-12-05 Dan WilliamsMerge branch 'for-6.2/cxl-aer' into for-6.2/cxl
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2022-12-05 Dan WilliamsMerge branch 'for-6.2/cxl-security' into for-6.2/cxl
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2022-12-05 Terry Bowmancxl/acpi: Set ACPI's CXL _OSC to indicate RCD mode...
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2022-12-05 Dan Williamstools/testing/cxl: Add an RCH topology
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2022-12-05 Dan Williamscxl/port: Add RCD endpoint port enumeration
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2022-12-05 Dan Williamscxl/mem: Move devm_cxl_add_endpoint() from cxl_core...
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2022-12-04 Alison Schofieldtools/testing/cxl: Add XOR Math support to cxl_test
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2022-12-04 Alison Schofieldcxl/acpi: Support CXL XOR Interleave Math (CXIMS)
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2022-12-03 Dan WilliamsMerge "ACPICA: Add CXL 3.0 structures..." into for...
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2022-12-03 Dave Jiangcxl/pci: Add callback to log AER correctable error
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2022-12-03 Dave JiangPCI/AER: Add optional logging callback for correctable...
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2022-12-03 Dan Williamscxl/pci: Add (hopeful) error handling support
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2022-12-03 Dave Jiangcxl/pci: add tracepoint events for CXL RAS
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2022-12-03 Dan Williamscxl/pci: Find and map the RAS Capability Structure
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2022-12-03 Dan Williamscxl/pci: Prepare for mapping RAS Capability Structure
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2022-12-03 Dan Williamscxl/port: Limit the port driver to just the HDM Decoder...
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2022-12-03 Dan Williamscxl/core/regs: Make cxl_map_{component, device}_regs...
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2022-12-03 Dan Williamscxl/pci: Kill cxl_map_regs()
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2022-12-03 Dan Williamscxl/pci: Cleanup cxl_map_device_regs()
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2022-12-03 Dan Williamscxl/pci: Cleanup repeated code in cxl_probe_regs()...
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2022-12-03 Robert Richtercxl/acpi: Extract component registers of restricted...
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2022-12-03 Dan Williamscxl/region: Manage CPU caches relative to DPA invalidation...
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2022-12-03 Dan Williamsnvdimm/region: Move cache management to the region...
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2022-12-03 Dan Williamscxl/pmem: Enforce keyctl ABI for PMEM security
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2022-12-03 Dan Williamscxl/region: Fix missing probe failure
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2022-12-03 Dave Jiangcxl: add dimm_id support for __nvdimm_create()
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2022-12-03 Robert Richtercxl/ACPI: Register CXL host ports by bridge device
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2022-12-03 Dan Williamstools/testing/cxl: Make mock CEDT parsing more robust
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2022-12-03 Dan Williamscxl/acpi: Move rescan to the workqueue
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2022-12-03 Dan Williamscxl/pmem: Remove the cxl_pmem_wq and related infrastructure
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2022-12-03 Dan Williamscxl/pmem: Refactor nvdimm device registration, delete...
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2022-12-03 Dan Williamscxl/region: Drop redundant pmem region release handling
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2022-12-01 Dan Williamscxl/acpi: Simplify cxl_nvdimm_bridge probing
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2022-12-01 Dave Jianglibnvdimm: Introduce CONFIG_NVDIMM_SECURITY_TEST flag
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2022-12-01 Dave Jiangcxl/pmem: add provider name to cxl pmem dimm attribute...
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2022-12-01 Dave Jiangtools/testing/cxl: add mechanism to lock mem device...
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2022-12-01 Dave Jiangcxl/pmem: add id attribute to CXL based nvdimm
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2022-12-01 Dave Jiangnvdimm/cxl/pmem: Add support for master passphrase...
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2022-12-01 Dave Jiangtools/testing/cxl: Add "passphrase secure erase" opcode...
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2022-12-01 Dave Jiangcxl/pmem: Add "Passphrase Secure Erase" security command...
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2022-12-01 Dave Jiangtools/testing/cxl: Add "Unlock" security opcode support
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2022-12-01 Dave Jiangcxl/pmem: Add "Unlock" security command support
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2022-12-01 Dave Jiangtools/testing/cxl: Add "Freeze Security State" security...
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2022-12-01 Dave Jiangcxl/pmem: Add "Freeze Security State" security command...
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2022-12-01 Dave Jiangtools/testing/cxl: Add "Disable" security opcode support
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2022-12-01 Dave Jiangcxl/pmem: Add Disable Passphrase security command support
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2022-12-01 Dave Jiangtools/testing/cxl: Add "Set Passphrase" opcode support
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2022-12-01 Dave Jiangcxl/pmem: Add "Set Passphrase" security command support
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2022-12-01 Dave Jiangtools/testing/cxl: Add "Get Security State" opcode...
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2022-12-01 Dave Jiangcxl/pmem: Introduce nvdimm_security_ops with ->get_flags...
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2022-11-21 Dan Williamsdevice-dax: Fix duplicate 'hmem' device registration
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2022-11-19 Vishal VermaACPI: HMAT: Fix initiator registration for single-initiator...
Cc: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2022-11-19 Vishal VermaACPI: HMAT: remove unnecessary variable initialization
Cc: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2022-11-14 Adam Manzanarescxl: Replace HDM decoder granularity magic numbers
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2022-11-14 Robert Richtercxl/acpi: Improve debug messages in cxl_acpi_probe()
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2022-11-14 Dan Williamstools/testing/cxl: Add bridge mocking support
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2022-11-14 Robert Richtercxl: Unify debug messages when calling devm_cxl_add_dport()
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2022-11-14 Robert Richtercxl: Unify debug messages when calling devm_cxl_add_port()
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2022-11-14 Robert Richtercxl/core: Check physical address before mapping it...
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2022-11-14 Robert Richtercxl/core: Remove duplicate declaration of devm_cxl_iomap_block()
Reviewed-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2022-11-14 Davidlohr Buesomemregion: Add cpu_cache_invalidate_memregion() interface
Co-developed-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2022-11-14 Ira Weinycxl/doe: Request exclusive DOE access
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2022-11-14 Ira WeinyPCI: Allow drivers to request exclusive config regions
Suggested-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2022-11-04 Dan Williamscxl/region: Recycle region ids
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2022-11-04 Dan Williamscxl/region: Fix 'distance' calculation with passthrough...
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2022-11-04 Dan Williamstools/testing/cxl: Add a single-port host-bridge regression...
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2022-11-04 Dan Williamstools/testing/cxl: Fix some error exits
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2022-11-04 Dan Williamscxl/pmem: Fix cxl_pmem_region and cxl_memdev leak
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2022-11-04 Dan Williamscxl/region: Fix cxl_region leak, cleanup targets at...
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2022-11-04 Dan Williamscxl/region: Fix region HPA ordering validation
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2022-11-03 Yu Zhecxl/pmem: Use size_add() against integer overflow
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2022-11-01 Vishal Vermacxl/region: Fix decoder allocation crash
Suggested-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2022-10-21 Dan WilliamsACPI: NUMA: Add CXL CFMWS 'nodes' to the possible nodes set
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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2022-10-20 Jonathan Cameroncxl/pmem: Fix failure to account for 8 byte header...
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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