projects / linux-2.6-microblaze.git / search
| 2023-12-19 | Lucas De Marchi | drm/xe: Add missing include xe_wait_user_fence.h Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-19 | Lucas De Marchi | drm/xe: Add missing doc for xe parameter Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-19 | Lucas De Marchi | drm/xe: Remove unused functions Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-19 | Lucas De Marchi | drm/xe: Fix application of LRC tunings Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-19 | Lucas De Marchi | drm/xe: Make local functions static Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-19 | Matthew Auld | drm/xe/query: zero the region info Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-19 | Matthew Auld | drm/xe/stolen: don't map stolen on small-bar Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-19 | Matthew Auld | drm/xe/mmio: fix forcewake ref leak in xe_mmio_ioctl Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-19 | Rodrigo Vivi | drm/xe: Remove unseless xe_force_wake_prune. Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-19 | Carlos Santa | drm/xe: Update the list of devices to add even more... CC: Rodrigo Vivi <rodrigo.vivi@intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-19 | José Roberto de... | drm/xe: Initialize ret in mcr_lock() Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-19 | Lucas De Marchi | drm/xe/rtp: Support multiple actions per entry Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-19 | Lucas De Marchi | drm/xe/rtp: Split action and entry flags Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-19 | Lucas De Marchi | drm/xe: Rename xe_rtp_regval to xe_rtp_action Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-19 | Lucas De Marchi | drm/xe/mcr: Add SQIDI steering for DG2 Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-19 | Lucas De Marchi | drm/xe/mcr: Use designated init for xe_steering_types Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-19 | Lucas De Marchi | drm/xe: Remove TODO from workaround documentation Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-19 | Lucas De Marchi | drm/xe: Remove TODO from rtp infra Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-19 | Lucas De Marchi | drm/xe: Fix xe_tuning include Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-19 | Lucas De Marchi | drm/xe: Fix typo in MCR documentation Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-19 | Maarten Lankhorst | drm/xe: Add debugfs for dumping GGTT mappings Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-19 | Matthew Brost | drm/xe: Drop TLB invalidation from ring operations Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-19 | Matthew Brost | drm/xe: Add TLB invalidation fence after rebinds issued... Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-19 | Matthew Brost | drm/xe: Add has_asid to device info Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-19 | Matthew Brost | drm/xe: Signal invalidation fence immediately if CT... Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-19 | Matthew Brost | drm/xe: Propagate VM unbind error to invalidation fence Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-19 | Matthew Brost | drm/xe: Lock GGTT on when restoring kernel BOs Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-19 | Matthew Brost | drm/xe: Use GuC to do GGTT invalidations for the GuC... Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-19 | Matthew Brost | drm/xe: Propagate error from bind operations to async... Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-19 | Matthew Brost | drm/xe: Add range based TLB invalidations Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-19 | Matthew Brost | drm/xe: Add has_range_tlb_invalidation device attribute Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-19 | Matthew Brost | drm/xe: Delete debugfs entry to issue TLB invalidation Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-19 | Matthew Brost | drm/xe: Only set VM->asid for platforms that support... Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-19 | Matthew Brost | drm/xe: Add TDR for invalidation fence timeout cleanup Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-19 | Matthew Brost | drm/xe: Add TLB invalidation fence ftrace Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-19 | Matthew Brost | drm/xe: Kernel doc GT TLB invalidations Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-19 | Matthew Brost | drm/xe: Invalidate TLB after unbind is complete Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-19 | Matthew Brost | drm/xe: Add TLB invalidation fence Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-19 | Matthew Brost | drm/xe: Move TLB invalidation variable to own sub-structure... Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-19 | Matthew Brost | drm/xe: Break of TLB invalidation into its own file Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-19 | Matthew Brost | drm/xe: Don't process TLB invalidation done in CT fast... Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-19 | Matthew Brost | drm/xe/migrate: Update emit_pte to cope with a size... Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-19 | Matthew Auld | drm/xe/ggtt: fix GGTT scratch usage for DG2 Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-19 | Matthew Auld | drm/xe/ggtt: fix alignment usage for DG2 Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-19 | Matthew Auld | drm/xe/ppgtt: fix scratch page usage on DG2 Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-19 | Matthew Auld | drm/xe/ppgtt: clear the scratch page Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-19 | Matthew Auld | drm/xe/bo: reduce xe_bo_create_pin_map() restrictions Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-19 | Maarten Lankhorst | drm/xe: Map initial FB at the same place in GGTT too Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-19 | Maarten Lankhorst | drm/xe: Convert memory device refcount to s32 Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-19 | José Roberto de... | drm/xe/uapi: Add XE_ENGINE_GET_PROPERTY uAPI Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-19 | José Roberto de... | drm/xe/uapi: Rename XE_ENGINE_PROPERTY_X to XE_ENGINE_SET_PR... Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-19 | Francois Dugast | drm/xe: Use global macros to set PM functions Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-19 | Mauro Carvalho Chehab | drm/xe: skip Kunit tests requiring real hardware when... Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-19 | Rodrigo Vivi | drm/xe/guc_pc: Fix Meteor Lake registers. Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-19 | Philippe Lecluse | drm/xe: Fix Meteor Lake rsa issue on guc loading Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-19 | Balasubramani Viveka... | drm/xe/gt: Enable interrupt while initializing root gt Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-19 | Mauro Carvalho Chehab | drm/xe: KUnit tests depend on CONFIG_DRM_FBDEV_EMULATION Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-19 | Mauro Carvalho Chehab | drm/xe/Kconfig.debug: select DEBUG_FS for KUnit runs Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-19 | Lucas De Marchi | drm/xe: Add min config for kunit integration ARCH=um Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-19 | Lucas De Marchi | drm/xe: Add documentation for mem_type Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-12 | Lucas De Marchi | drm/xe/gt: Fix min() with u32 and u64 Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-12 | Lucas De Marchi | drm/xe: Fix tracepoints on 32b Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-12 | Lucas De Marchi | drm/xe/mmio: Use non-atomic writeq/readq variant for 32b Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-12 | Lucas De Marchi | drm/xe: Fix some log messages on 32b Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-12 | Lucas De Marchi | drm/xe/ggtt: Use BIT_ULL() for 64bit Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-12 | Philippe Lecluse | drm/xe: fix xe_mmio_total_vram_size Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-12 | Matthew Auld | drm/xe/pcode: fix pcode error check Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-12 | Philippe Lecluse | drm/xe: enforce GSMBASE for DG1 instead of BAR2 Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-12 | Maarten Lankhorst | drm/xe: Fix hidden gotcha regression with bo create Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-12 | Matthew Brost | drm/xe/guc: Add support GuC MMIO send / recv Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-12 | Matthew Brost | drm/xe/guc: s/xe_guc_send_mmio/xe_guc_mmio_send Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-12 | Matthew Brost | drm/xe/guc: Report submission version of GuC firmware Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-12 | Matthew Brost | drm/xe: Fake pulling gt->info.engine_mask from hwconfig... Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-12 | Matthew Brost | drm/xe: Ensure VMA not userptr before calling xe_bo_is_stolen Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-12 | Maarten Lankhorst | drm/xe: Implement stolen memory. Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-12 | Matthew Brost | drm/xe: Take memory ref on kernel job creation Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-12 | Thomas Hellström | drm/xe/migrate: Add kerneldoc for the migrate subsystem Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-12 | Rodrigo Vivi | drm/xe: Remove i915_utils dependency from xe_pcode. Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-12 | Rodrigo Vivi | drm/xe: Convert xe_mmio_wait32 to us so we can stop... Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-12 | Rodrigo Vivi | drm/xe: Let's avoid i915_utils in the xe_force_wake. Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-12 | Rodrigo Vivi | drm/xe: Stop using i915_utils in xe_wopcm. Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-12 | Rodrigo Vivi | drm/xe: Remove i915_utils dependency from xe_guc_pc. Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-12 | Rodrigo Vivi | drm/xe: Wait for success on guc done. Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-12 | Rodrigo Vivi | drm/xe: Convert guc_ready to regular xe_mmio_wait32 Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-12 | Rodrigo Vivi | drm/xe: Let's return last value read on xe_mmio_wait32. Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-12 | Rodrigo Vivi | drm/xe: Stop using i915's range_overflows_t macro. Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-12 | Rodrigo Vivi | drm/xe: Implement a local xe_mmio_wait32 Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-12-12 | Matthew Brost | drm/xe: Introduce a new DRM driver for Intel GPUs Co-developed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-10-25 | Umesh Nerlige Ramappa | drm/i915/pmu: Check if pmu is closed before stopping... Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-10-25 | Matt Roper | drm/i915/mcr: Hold GT forcewake during steering operations Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-10-24 | Umesh Nerlige Ramappa | drm/i915/perf: Determine context valid in OA reports Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-10-18 | Ville Syrjälä | drm/i915: Retry gtt fault when out of fence registers Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-10-18 | Khaled Almahallawy | drm/i915/cx0: Only clear/set the Pipe Reset bit of... Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-10-09 | Randy Dunlap | drm/i915/uapi: fix doc typos Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-10-04 | Chris Wilson | drm/i915: Invalidate the TLBs on each GT Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-10-04 | Mathias Krause | drm/i915: Register engines early to avoid type confusion Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-10-04 | Nirmoy Das | drm/i915: Don't set PIPE_CONTROL_FLUSH_L3 for aux inval Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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| 2023-10-02 | Rodrigo Vivi | drm/i915: Add missing GSCCS documentation Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> ...msgid/20230926175554.25968-1-rodrigo.vivi@intel.com |
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| 2023-10-02 | Rodrigo Vivi | drm/i915: Add missing CCS documentation Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> ...msgid/20230926165107.23440-1-rodrigo.vivi@intel.com |
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| 2023-10-02 | Rodrigo Vivi | drm/i915: Abstract display info away during probe Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> ...msgid/20230929205023.1202735-1-rodrigo.vivi@intel.com |
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