projects / linux-2.6-microblaze.git / search
? search:
summary | shortlog | log | commit | commitdiff | tree
first ⋅ prev ⋅ next
drm/i915: Correct duplicated/misplaced GT register definitions
2022-06-27 Matt Roperdrm/i915: Correct duplicated/misplaced GT register...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20220624210328.308630-1-matthew.d.roper@intel.com
 commit | commitdiff | tree
2022-06-17 Matt Roperdrm/i915/gt: Cleanup interface for MCR operations
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20220615001019.1821989-3-matthew.d.roper@intel.com
 commit | commitdiff | tree
2022-06-17 Matt Roperdrm/i915/gt: Move multicast register handling to a...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20220615001019.1821989-2-matthew.d.roper@intel.com
 commit | commitdiff | tree
2022-06-15 Matt Roperdrm/i915/pvc: Add recommended MMIO setting
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20220613165314.862029-1-matthew.d.roper@intel.com
 commit | commitdiff | tree
2022-06-14 Matt Roperdrm/i915/pvc: Adjust EU per SS according to HAS_ONE_EU_PER_F...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20220610230801.459577-1-matthew.d.roper@intel.com
 commit | commitdiff | tree
2022-06-09 Matt Roperdrm/i915/pvc: Add register steering
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20220608170700.4026648-1-matthew.d.roper@intel.com
 commit | commitdiff | tree
2022-06-08 Matt Roperdrm/i915/xehp: Correct steering initialization
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20220607175716.3338661-1-matthew.d.roper@intel.com
 commit | commitdiff | tree
2022-06-08 Matt Roperdrm/i915: More PVC+DG2 workarounds
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20220608005108.3717895-1-matthew.d.roper@intel.com
 commit | commitdiff | tree
2022-06-08 Matt Roperdrm/i915/dg2: Correct DSS check for Wa_1308578152
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20220607154724.3155521-1-matthew.d.roper@intel.com
 commit | commitdiff | tree
2022-06-03 Matt Roperdrm/i915/pvc: GuC depriv applies to PVC
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20220602233019.1659283-1-matthew.d.roper@intel.com
 commit | commitdiff | tree
2022-06-02 Matt Roperdrm/i915/pvc: Add SSEU changes
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20220601150725.521468-7-matthew.d.roper@intel.com
 commit | commitdiff | tree
2022-06-02 Matt Roperdrm/i915/sseu: Disassociate internal subslice mask...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20220601150725.521468-6-matthew.d.roper@intel.com
 commit | commitdiff | tree
2022-06-02 Matt Roperdrm/i915/sseu: Don't try to store EU mask internally...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20220601150725.521468-5-matthew.d.roper@intel.com
 commit | commitdiff | tree
2022-06-02 Matt Roperdrm/i915/sseu: Simplify gen11+ SSEU handling
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20220601150725.521468-4-matthew.d.roper@intel.com
 commit | commitdiff | tree
2022-06-02 Matt Roperdrm/i915/xehp: Drop GETPARAM lookups of I915_PARAM_...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20220601150725.521468-3-matthew.d.roper@intel.com
 commit | commitdiff | tree
2022-06-02 Matt Roperdrm/i915/xehp: Use separate sseu init function
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20220601150725.521468-2-matthew.d.roper@intel.com
 commit | commitdiff | tree
2022-05-31 Matt Roperdrm/i915/pvc: Extract stepping information from PCI...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20220527163348.1936146-2-matthew.d.roper@intel.com
 commit | commitdiff | tree
2022-05-25 Matt Roperdrm/i915/hwconfig: Future-proof platform checks
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20220524235906.529771-1-matthew.d.roper@intel.com
 commit | commitdiff | tree
2022-05-24 Matt Roperdrm/i915/pvc: Add new BCS engines to GuC engine list
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20220511060228.1179450-5-matthew.d.roper@intel.com
 commit | commitdiff | tree
2022-05-24 Matt Roperdrm/i915/pvc: Add forcewake support
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20220511060228.1179450-3-matthew.d.roper@intel.com
 commit | commitdiff | tree
2022-05-24 Matt Roperdrm/i915/uncore: Reorganize and document shadow and...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20220511060228.1179450-2-matthew.d.roper@intel.com
 commit | commitdiff | tree
2022-05-10 Matt Roperdrm/i915/pvc: Reset support for new copy engines
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20220505213812.3979301-11-matthew.d.roper@intel.com
 commit | commitdiff | tree
2022-05-10 Matt Roperdrm/i915/pvc: Interrupt support for new copy engines
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20220505213812.3979301-10-matthew.d.roper@intel.com
 commit | commitdiff | tree
2022-05-10 Matt Roperdrm/i915/pvc: Engine definitions for new copy engines
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20220505213812.3979301-9-matthew.d.roper@intel.com
 commit | commitdiff | tree
2022-05-10 Matt Roperdrm/i915/gvt: Use intel_engine_mask_t for ring mask
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20220505213812.3979301-8-matthew.d.roper@intel.com
 commit | commitdiff | tree
2022-05-10 Matt Roperdrm/i915/pvc: Read correct RP_STATE_CAP register
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20220505213812.3979301-5-matthew.d.roper@intel.com
 commit | commitdiff | tree
2022-04-29 Matt Roperdrm/i915/xehp: Add compute engine ABI
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20220428041926.1483683-4-matthew.d.roper@intel.com
 commit | commitdiff | tree
2022-04-29 Matt Roperdrm/i915/xehp: Add register for compute engine's MMIO...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20220428041926.1483683-3-matthew.d.roper@intel.com
 commit | commitdiff | tree
2022-04-29 Matt Roperdrm/i915/uapi: Add kerneldoc for engine class enum
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20220428041926.1483683-2-matthew.d.roper@intel.com
 commit | commitdiff | tree
2022-04-27 Matt Roperdrm/i915: Add first set of DG2 PCI IDs
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20220425211251.77154-3-matthew.d.roper@intel.com
 commit | commitdiff | tree
2022-04-15 Matt Roperdrm/i915/doc: Link query items to their uapi structs
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20220414192230.749771-3-matthew.d.roper@intel.com
 commit | commitdiff | tree
2022-04-15 Matt Roperdrm/i915/doc: Convert perf UAPI comments to kerneldoc
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20220414192230.749771-2-matthew.d.roper@intel.com
 commit | commitdiff | tree
2022-04-15 Matt Roperdrm/i915/doc: Convert drm_i915_query_topology_info...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20220414192230.749771-1-matthew.d.roper@intel.com
 commit | commitdiff | tree
2022-04-12 Matt Roperdrm/i915/dg2: Add support for DG2 render and media...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
 commit | commitdiff | tree
2022-04-12 Matt Roperdrm/fourcc: Introduce format modifiers for DG2 render...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
 commit | commitdiff | tree
2022-04-08 Matt Roperdrm/i915: Sunset igpu legacy mmap support based on...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20220407161839.1073443-1-matthew.d.roper@intel.com
 commit | commitdiff | tree
2022-03-29 Matt Roperdrm/i915/ats-m: add ATS-M platform info
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20220329000822.1323195-1-matthew.d.roper@intel.com
 commit | commitdiff | tree
2022-03-16 Matt Roperdrm/i915: Add support for steered register writes
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20220314234203.799268-4-matthew.d.roper@intel.com
 commit | commitdiff | tree
2022-03-16 Matt Roperdrm/i915: Report steering details in debugfs
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20220315170250.954380-1-matthew.d.roper@intel.com
 commit | commitdiff | tree
2022-03-14 Matt Roperdrm/i915/xehp: Update topology dumps for Xe_HP
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20220311225459.385515-2-matthew.d.roper@intel.com
 commit | commitdiff | tree
2022-03-14 Matt Roperdrm/i915/sseu: Don't overallocate subslice storage
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20220311225459.385515-1-matthew.d.roper@intel.com
 commit | commitdiff | tree
2022-03-11 Matt Roperdrm/i915/gt: Remove GEN12_SFC_DONE_MAX from register...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20220311062835.163744-1-matthew.d.roper@intel.com
 commit | commitdiff | tree
2022-03-08 Matt Roperdrm/i915/xehp: Drop aux table invalidation on FlatCCS...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20220301052952.1706597-1-matthew.d.roper@intel.com
 commit | commitdiff | tree
2022-03-04 Matt Roperdrm/i915/xehp: Support platforms with CCS engines but...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20220303223435.2793124-1-matthew.d.roper@intel.com
 commit | commitdiff | tree
2022-03-02 Matt Roperdrm/i915/xehp: Add compute workarounds
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20220301231549.1817978-13-matthew.d.roper@intel.com
 commit | commitdiff | tree
2022-03-02 Matt Roperdrm/i915/xehp: Enable ccs/dual-ctx in RCU_MODE
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20220302001554.1836066-1-matthew.d.roper@intel.com
 commit | commitdiff | tree
2022-03-02 Matt Roperdrm/i915/xehp: Define context scheduling attributes...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20220301231549.1817978-8-matthew.d.roper@intel.com
 commit | commitdiff | tree
2022-03-02 Matt Roperdrm/i915: Move context descriptor fields to intel_lrc.h
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20220301231549.1817978-7-matthew.d.roper@intel.com
 commit | commitdiff | tree
2022-03-02 Matt Roperdrm/i915/xehp: CCS should use RCS setup functions
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20220301231549.1817978-6-matthew.d.roper@intel.com
 commit | commitdiff | tree
2022-03-02 Matt Roperdrm/i915/xehp: Add Compute CS IRQ handlers
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20220301231549.1817978-4-matthew.d.roper@intel.com
 commit | commitdiff | tree
2022-03-02 Matt Roperdrm/i915/xehp: CCS shares the render reset domain
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20220301231549.1817978-3-matthew.d.roper@intel.com
 commit | commitdiff | tree
2022-03-02 Matt Roperdrm/i915/xehp: Define compute class and engine
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20220301231549.1817978-2-matthew.d.roper@intel.com
 commit | commitdiff | tree
2022-02-25 Matt Roperdrm/i915/dg2: Skip output init on PHY calibration failure
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20220223165421.3949883-1-matthew.d.roper@intel.com
 commit | commitdiff | tree
2022-02-21 Matt Roperdrm/i915/dg2: Print PHY name properly on calibration...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20220215163545.2175730-1-matthew.d.roper@intel.com
 commit | commitdiff | tree
2022-02-19 Matt Roperdrm/i915/dg2: Enable 5th port
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
 commit | commitdiff | tree
2022-02-19 Matt Roperdrm/i915/dg2: Drop 38.4 MHz MPLLB tables
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
 commit | commitdiff | tree
2022-02-18 Matt Roperdrm/i915/dg2: Print PHY name properly on calibration...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20220215163545.2175730-1-matthew.d.roper@intel.com
 commit | commitdiff | tree
2022-02-16 Matt Roperdrm/i915: Add missing intel_mchbar_regs.h
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20220215061342.2055952-2-matthew.d.roper@intel.com
 commit | commitdiff | tree
2022-02-16 Matt Roperdrm/i915: Move MCHBAR registers to their own header
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20220215061342.2055952-2-matthew.d.roper@intel.com
 commit | commitdiff | tree
2022-02-16 Matt Roperdrm/i915: Define MCH registers relative to MCHBAR_MIRROR_BASE
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20220215061342.2055952-1-matthew.d.roper@intel.com
 commit | commitdiff | tree
2022-02-16 Matt Roperdrm/i915/gt: Order GT registers by MMIO offset
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20220209051140.1599643-7-matthew.d.roper@intel.com
 commit | commitdiff | tree
2022-02-16 Matt Roperdrm/i915/gt: Use consistent offset notation in intel_gt_regs.h
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20220209051140.1599643-6-matthew.d.roper@intel.com
 commit | commitdiff | tree
2022-02-16 Matt Roperdrm/i915/gt: Cleanup spacing of intel_gt_regs.h
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20220209051140.1599643-5-matthew.d.roper@intel.com
 commit | commitdiff | tree
2022-02-16 Matt Roperdrm/i915/gt: Use parameterized RING_MI_MODE
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20220209051140.1599643-4-matthew.d.roper@intel.com
 commit | commitdiff | tree
2022-02-16 Matt Roperdrm/i915/gt: Move SFC lock bits to intel_engine_regs.h
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20220209051140.1599643-3-matthew.d.roper@intel.com
 commit | commitdiff | tree
2022-02-16 Matt Roperdrm/i915/gt: Drop duplicate register definition for...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20220209051140.1599643-2-matthew.d.roper@intel.com
 commit | commitdiff | tree
2022-02-02 Matt Roperdrm/i915: Move [more] GT registers to their own header...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20220127234334.4016964-6-matthew.d.roper@intel.com
 commit | commitdiff | tree
2022-02-02 Matt Roperdrm/i915: Only include i915_reg.h from .c files
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20220127234334.4016964-7-matthew.d.roper@intel.com
 commit | commitdiff | tree
2022-02-02 Matt Roperdrm/i915: Move GT registers to their own header file
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20220127234334.4016964-6-matthew.d.roper@intel.com
 commit | commitdiff | tree
2022-02-02 Matt Roperdrm/i915: Parameterize MI_PREDICATE registers
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20220127234334.4016964-5-matthew.d.roper@intel.com
 commit | commitdiff | tree
2022-02-02 Matt Roperdrm/i915: Parameterize R_PWR_CLK_STATE register definition
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20220127234334.4016964-4-matthew.d.roper@intel.com
 commit | commitdiff | tree
2022-02-02 Matt Roperdrm/i915/perf: Express OA register ranges with i915_range
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20220127234334.4016964-3-matthew.d.roper@intel.com
 commit | commitdiff | tree
2022-02-02 Matt Roperdrm/i915/perf: Move OA regs to their own header
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20220127234334.4016964-2-matthew.d.roper@intel.com
 commit | commitdiff | tree
2022-02-01 Matt Roperdrm/i915: Introduce G12 subplatform of DG2
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20220120235016.1209326-1-matthew.d.roper@intel.com
 commit | commitdiff | tree
2022-01-31 Matt Roperdrm/i915/dg2: s/engine->i915/i915/ for engine workarounds
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20220128170125.4121819-1-matthew.d.roper@intel.com
 commit | commitdiff | tree
2022-01-28 Matt Roperdrm/i915/dg2: Add Wa_14015227452
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20220127194855.3963296-1-matthew.d.roper@intel.com
 commit | commitdiff | tree
2022-01-24 Matt Roperdrm/i915/dg2: Add Wa_18018781329
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20220120234147.1200574-1-matthew.d.roper@intel.com
 commit | commitdiff | tree
2022-01-11 Matt Roperdrm/i915: Drop unused _PORT3 and _PORT4 TC phy register...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20220111051600.3429104-12-matthew.d.roper@intel.com
 commit | commitdiff | tree
2022-01-11 Matt Roperdrm/i915: Move TC PHY registers to their own header
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20220111051600.3429104-11-matthew.d.roper@intel.com
 commit | commitdiff | tree
2022-01-11 Matt Roperdrm/i915: Move combo PHY registers to their own header
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20220111051600.3429104-10-matthew.d.roper@intel.com
 commit | commitdiff | tree
2022-01-11 Matt Roperdrm/i915: Move SNPS PHY registers to their own header
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20220111051600.3429104-9-matthew.d.roper@intel.com
 commit | commitdiff | tree
2022-01-11 Matt Roperdrm/i915/gt: Move engine registers to their own header
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20220111051600.3429104-8-matthew.d.roper@intel.com
 commit | commitdiff | tree
2022-01-11 Matt Roperdrm/i915: Introduce i915_reg_defs.h
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20220111051600.3429104-7-matthew.d.roper@intel.com
 commit | commitdiff | tree
2022-01-11 Matt Roperdrm/i915: Replace GFX_MODE_GEN7 with RING_MODE_GEN7
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20220111051600.3429104-6-matthew.d.roper@intel.com
 commit | commitdiff | tree
2022-01-11 Matt Roperdrm/i915: Use RING_PSMI_CTL rather than per-engine...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20220111051600.3429104-5-matthew.d.roper@intel.com
 commit | commitdiff | tree
2022-01-11 Matt Roperdrm/i915: Parameterize ECOSKPD
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20220111051600.3429104-4-matthew.d.roper@intel.com
 commit | commitdiff | tree
2022-01-11 Matt Roperdrm/i915: Parameterize PWRCTX_MAXCNT
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20220111051600.3429104-3-matthew.d.roper@intel.com
 commit | commitdiff | tree
2022-01-11 Matt Roperdrm/i915: Use parameterized GPR register definitions...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20220111051600.3429104-2-matthew.d.roper@intel.com
 commit | commitdiff | tree
2021-12-03 Matt Roperdrm/i915/dg2: Add Wa_14010547955
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20211116174818.2128062-3-matthew.d.roper@intel.com
 commit | commitdiff | tree
2021-12-03 Matt Roperdrm/i915/dg2: s/DISP_STEPPING/DISPLAY_STEPPING/
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20211116174818.2128062-2-matthew.d.roper@intel.com
 commit | commitdiff | tree
2021-12-03 Matt Roperdrm/i915/dg2: Add Wa_16011777198
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20211116174818.2128062-4-matthew.d.roper@intel.com
 commit | commitdiff | tree
2021-11-15 Matt Roperdrm/i915: Don't read query SSEU for non-existent slice...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20211112160107.1593906-1-matthew.d.roper@intel.com
 commit | commitdiff | tree
2021-11-11 Matt Roperdrm/i915/dg2: Program recommended HW settings
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20211102222511.534310-4-matthew.d.roper@intel.com
 commit | commitdiff | tree
2021-11-11 Matt Roperdrm/i915/dg2: Add initial gt/ctx/engine workarounds
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20211102222511.534310-3-matthew.d.roper@intel.com
 commit | commitdiff | tree
2021-10-15 Matt Roperdrm/i915/uapi: Add comment clarifying purpose of I915_TILING...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20211012221245.2609670-1-matthew.d.roper@intel.com
 commit | commitdiff | tree
2021-10-12 Matt Roperdrm/i915: Stop using I915_TILING_* in client blit selftest
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20211001005816.73330-1-matthew.d.roper@intel.com
 commit | commitdiff | tree
2021-09-23 Matt Roperdrm/i915/uncore: fwtable read handlers are now used...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20210923003029.2194375-1-matthew.d.roper@intel.com
 commit | commitdiff | tree
2021-09-22 Matt Roperdrm/i915/dg2: Add DG2-specific shadow register table
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20210910201030.3436066-7-matthew.d.roper@intel.com
 commit | commitdiff | tree
2021-09-22 Matt Roperdrm/i915/uncore: Drop gen11 mmio read handlers
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20210910201030.3436066-6-matthew.d.roper@intel.com
 commit | commitdiff | tree
2021-09-22 Matt Roperdrm/i915/uncore: Drop gen11/gen12 mmio write handlers
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
...msgid/20210910201030.3436066-5-matthew.d.roper@intel.com
 commit | commitdiff | tree
next
MicroBlaze GIT Repository