projects / linux-2.6-microblaze.git / search
| 2022-06-27 | Matt Roper | drm/i915: Correct duplicated/misplaced GT register... Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-06-17 | Matt Roper | drm/i915/gt: Cleanup interface for MCR operations Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-06-17 | Matt Roper | drm/i915/gt: Move multicast register handling to a... Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-06-15 | Matt Roper | drm/i915/pvc: Add recommended MMIO setting Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-06-14 | Matt Roper | drm/i915/pvc: Adjust EU per SS according to HAS_ONE_EU_PER_F... Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-06-09 | Matt Roper | drm/i915/pvc: Add register steering Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-06-08 | Matt Roper | drm/i915/xehp: Correct steering initialization Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-06-08 | Matt Roper | drm/i915: More PVC+DG2 workarounds Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-06-08 | Matt Roper | drm/i915/dg2: Correct DSS check for Wa_1308578152 Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-06-07 | Anshuman Gupta | drm/i915/dg2: Add Wa_14015795083 Cc: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-06-03 | Matt Roper | drm/i915/pvc: GuC depriv applies to PVC Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-06-02 | Stuart Summers | drm/i915: Add extra registers to GPU error dump Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-06-02 | Matt Roper | drm/i915/pvc: Add SSEU changes Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-06-02 | Matt Roper | drm/i915/sseu: Disassociate internal subslice mask... Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-06-02 | Matt Roper | drm/i915/sseu: Don't try to store EU mask internally... Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-06-02 | Matt Roper | drm/i915/sseu: Simplify gen11+ SSEU handling Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-06-02 | Matt Roper | drm/i915/xehp: Drop GETPARAM lookups of I915_PARAM_... Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-06-02 | Matt Roper | drm/i915/xehp: Use separate sseu init function Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-05-31 | Stuart Summers | drm/i915/pvc: Add initial PVC workarounds Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-05-31 | Matt Roper | drm/i915/pvc: Extract stepping information from PCI... Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-05-25 | Matt Roper | drm/i915/hwconfig: Future-proof platform checks Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-05-24 | Balasubramani Viveka... | drm/i915/hwconfig: Report no hwconfig support on ADL-N Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-05-24 | Daniele Ceraolo... | drm/i915/guc: XEHPSDV and PVC do not use HuC Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-05-24 | Matt Roper | drm/i915/pvc: Add new BCS engines to GuC engine list Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-05-24 | Stuart Summers | drm/i915/pvc: Remove additional 3D flags from PIPE_CONTROL Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-05-24 | Matt Roper | drm/i915/pvc: Add forcewake support Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-05-24 | Matt Roper | drm/i915/uncore: Reorganize and document shadow and... Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-05-19 | Swathi Dhanavanthri | drm/i915/dg2: Extend Wa_22010954014 to DG2-G11 and... Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-05-19 | Swathi Dhanavanthri | drm/i915/dg2: Add workaround 22014600077 Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-05-10 | Lucas De Marchi | drm/i915/pvc: read fuses for link copy engines Cc: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-05-10 | Lucas De Marchi | drm/i915/pvc: skip all copy engines from aux table... Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-05-10 | Matt Roper | drm/i915/pvc: Reset support for new copy engines Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-05-10 | Matt Roper | drm/i915/pvc: Interrupt support for new copy engines Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-05-10 | Matt Roper | drm/i915/pvc: Engine definitions for new copy engines Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-05-10 | Matt Roper | drm/i915/gvt: Use intel_engine_mask_t for ring mask Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-05-10 | John Harrison | drm/i915/pvc: Reduce stack usage in reset selftest... Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-05-10 | Matt Roper | drm/i915/pvc: Read correct RP_STATE_CAP register Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-05-10 | Ayaz A Siddiqui | drm/i915/pvc: Define MOCS table for PVC Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-05-03 | Stuart Summers | drm/i915/pvc: add initial Ponte Vecchio definitions Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-04-29 | Daniele Ceraolo... | drm/i915: Xe_HP SDV and DG2 have up to 4 CCS engines Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-04-29 | Matt Roper | drm/i915/xehp: Add compute engine ABI Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-04-29 | Matt Roper | drm/i915/xehp: Add register for compute engine's MMIO... Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-04-29 | Matt Roper | drm/i915/uapi: Add kerneldoc for engine class enum Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-04-27 | Matt Roper | drm/i915: Add first set of DG2 PCI IDs Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-04-20 | Matt Atwood | drm/i915/rpl-p: Add PCI IDs Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-04-15 | Vinay Belgaumkar | drm/i915/guc/slpc: Use i915_probe_error instead of... Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-04-15 | Matt Atwood | drm/i915/uapi: Add DRM_I915_QUERY_GEOMETRY_SUBSLICES Cc: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-04-15 | Matt Roper | drm/i915/doc: Link query items to their uapi structs Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-04-15 | Matt Roper | drm/i915/doc: Convert perf UAPI comments to kerneldoc Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-04-15 | Matt Roper | drm/i915/doc: Convert drm_i915_query_topology_info... Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-04-15 | John Harrison | drm/i915/guc: Update to GuC version 70.1.1 Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-04-08 | Matt Roper | drm/i915: Sunset igpu legacy mmap support based on... Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-03-29 | Matt Roper | drm/i915/ats-m: add ATS-M platform info Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-03-29 | Tejas Upadhyay | drm/i915: Add RPL-S PCI IDs Cc: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-03-22 | Michael Cheng | drm/i915/gt: replace cache_clflush_range Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-03-22 | Michael Cheng | drm/i915/: Re-work clflush_write32 ...actual size of the page. Thanks to Matt Roper for Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-03-22 | Michael Cheng | drm/i915/gt: Re-work reset_csb Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-03-22 | Michael Cheng | drm/i915/gt: Drop invalidate_csb_entries ...execlists->csb_status. Thanks to Matt Roper for the Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-03-22 | Michael Cheng | drm/i915/gt: Re-work intel_write_status_page Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-03-18 | Akeem G Abodunrin | drm/i915/dg2: Add preemption changes for Wa_14015141709 Cc: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-03-16 | Matt Roper | drm/i915: Add support for steered register writes Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-03-16 | Daniele Ceraolo... | drm/i915/guc: add steering info to GuC register save... Cc: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-03-16 | Matt Roper | drm/i915: Report steering details in debugfs Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-03-15 | John Harrison | drm/i915: Reduce stack usage in debugfs due to SSEU Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-03-14 | Matt Roper | drm/i915/xehp: Update topology dumps for Xe_HP Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-03-14 | Matt Roper | drm/i915/sseu: Don't overallocate subslice storage Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-03-11 | Matt Roper | drm/i915/gt: Remove GEN12_SFC_DONE_MAX from register... Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-03-08 | Matt Roper | drm/i915/xehp: Drop aux table invalidation on FlatCCS... Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-03-04 | Madhumitha Tolakanah... | drm/i915/dmc: Update DMC to v2.16 on ADL-P Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-03-04 | Stuart Summers | drm/i915: Add RCS mask to GuC ADS params Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-03-04 | Matt Roper | drm/i915/xehp: Support platforms with CCS engines but... Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-03-04 | Tejas Upadhyay | drm/i915/adl-n: Add stepping info Cc: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-03-02 | Srinivasan Shanmugam | drm/i915/xehpsdv: Move render/compute engine reset... Cc: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-03-02 | Matt Roper | drm/i915/xehp: Add compute workarounds Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-03-02 | Daniele Ceraolo... | drm/i915/xehp: handle fused off CCS engines Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-03-02 | Matthew Brost | drm/i915/xehp: Don't support parallel submission on... Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-03-02 | Daniele Ceraolo... | drm/i915/xehp/guc: enable compute engine inside GuC Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-03-02 | Matt Roper | drm/i915/xehp: Enable ccs/dual-ctx in RCU_MODE Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-03-02 | Matt Roper | drm/i915/xehp: Define context scheduling attributes... Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-03-02 | Matt Roper | drm/i915: Move context descriptor fields to intel_lrc.h Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-03-02 | Matt Roper | drm/i915/xehp: CCS should use RCS setup functions Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-03-02 | Daniele Ceraolo... | drm/i915/xehp: compute engine pipe_control Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-03-02 | Matt Roper | drm/i915/xehp: Add Compute CS IRQ handlers Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-03-02 | Matt Roper | drm/i915/xehp: CCS shares the render reset domain Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-03-02 | Matt Roper | drm/i915/xehp: Define compute class and engine Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-02-25 | Clint Taylor | drm/i915/dg2: add Wa_14014947963 Cc: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-02-25 | Matt Roper | drm/i915/dg2: Skip output init on PHY calibration failure Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-02-23 | Tejas Upadhyay | drm/i915/adl-n: Add PCH Support for Alder Lake N Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-02-18 | Matt Roper | drm/i915/dg2: Print PHY name properly on calibration... Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-02-17 | Srinivasan Shanmugam | drm/i915/dg2: Move misplaced 'ctx' & 'gt' wa's to engine... Cc: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-02-16 | Matt Roper | drm/i915: Add missing intel_mchbar_regs.h Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-02-16 | Matt Roper | drm/i915: Move MCHBAR registers to their own header Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-02-16 | Matt Roper | drm/i915: Define MCH registers relative to MCHBAR_MIRROR_BASE Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-02-16 | Matt Roper | drm/i915/gt: Order GT registers by MMIO offset Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-02-16 | Matt Roper | drm/i915/gt: Use consistent offset notation in intel_gt_regs.h Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-02-16 | Matt Roper | drm/i915/gt: Cleanup spacing of intel_gt_regs.h Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-02-16 | Matt Roper | drm/i915/gt: Use parameterized RING_MI_MODE Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-02-16 | Matt Roper | drm/i915/gt: Move SFC lock bits to intel_engine_regs.h Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-02-16 | Matt Roper | drm/i915/gt: Drop duplicate register definition for... Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-02-15 | Chuansheng Liu | drm/i915/dg1: Update DMC_DEBUG3 register Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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