projects / linux-2.6-microblaze.git / search
| 2018-04-28 | Paulo Zanoni | drm/i915/icl: add definitions for the ICL PLL registers Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2018-04-27 | James Ausmus | drm/i915/icl: Don't set pipe CSC/Gamma in PLANE_COLOR_CTL Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2018-03-28 | Paulo Zanoni | drm/i915/gen11: add support for reading the timestamp... Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2018-03-23 | Paulo Zanoni | drm/i915: protect macro parameters in SWING_SEL_{UPP... Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2018-03-23 | Nabendu Maiti | drm/i915/icl: Added 5k source scaling support for Gen11... Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2018-03-23 | Dhinakaran Pandiyan | drm/i915/icl: HPD pin for port F Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2018-03-23 | Manasi Navare | drm/i915/icl: Add Voltage swing table for MG PHY DDI... Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2018-03-23 | Manasi Navare | drm/i915/icl: Add register defs for voltage swing sequences... Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2018-03-23 | Manasi Navare | drm/i915/icl: Add Combo PHY DDI Buffer translation... Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2018-03-23 | Manasi Navare | drm/i915/icl: Add register definitions for Combo PHY... Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2018-02-13 | Mahesh Kumar | drm/i915/icl: program mbus during pipe enable Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2018-02-13 | Mahesh Kumar | drm/i915/icl: initialize MBus during display init Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2018-02-13 | Mahesh Kumar | drm/i915/icl: Enable both DBuf slices during init Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2018-02-13 | Paulo Zanoni | drm/i915/icl: implement the display init/uninit sequences Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2018-02-13 | Paulo Zanoni | drm/i915/icl: add the main CDCLK functions Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2018-02-13 | Paulo Zanoni | drm/i915/icl: add ICL support to cnl_set_procmon_ref_values Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2018-01-31 | Paulo Zanoni | drm/i915/icl: allow the reg_read ioctl to read the... Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2018-01-31 | Kelvin Gardiner | drm/i915/icl: Set graphics mode register for gen11 Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2018-01-31 | James Ausmus | drm/i915/icl: Handle expanded PLANE_CTL_FORMAT field Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2018-01-31 | Paulo Zanoni | drm/i915/gen11: fix the SAGV block time for gen11 Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2018-01-31 | Mahesh Kumar | drm/i915/icl: Introduce MBus related registers Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2018-01-31 | Mahesh Kumar | drm/i915/icl: NV12 y-plane ddb is not in same plane Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2018-01-31 | Mahesh Kumar | drm/i915/icl: Fail flip if ddb allocated are less than... Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2018-01-31 | Mahesh Kumar | drm/i915/icl: Do not fix dbuf block size to 512 Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2018-01-31 | Mahesh Kumar | drm/i915/icl: Don't allocate fixed bypass path blocks... Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2018-01-19 | Tvrtko Ursulin | drm/i915/icl: Gen11 render context size Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2018-01-19 | Oscar Mateo | drm/i915: Return a default RCS context size Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2018-01-19 | Tvrtko Ursulin | drm/i915/icl: Icelake interrupt register addresses... Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2018-01-19 | Anusha Srivatsa | drm/i915/icp: Add the ID for ICL PCH - ICP Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2018-01-19 | Anusha Srivatsa | drm/i915/icp: add ICP gmbus and gpio support Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2018-01-19 | Anusha Srivatsa | drm/i915/icp: Add backlight Support for ICP Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2018-01-19 | Anusha Srivatsa | drm/i915/icp: Add Panel Power Sequencing Support Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2018-01-19 | Anusha Srivatsa | drm/i915/icp: Get/set proper Raw clock frequency on ICP Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2018-01-19 | Anusha Srivatsa | drm/i915/icp: Introduce Ice Lake PCH Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2018-01-19 | Rodrigo Vivi | drm/i915/icl: Add initial Icelake definitions. Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2018-01-19 | Rodrigo Vivi | drm/i915/cnl: Add Port F definition. Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2017-12-04 | Lionel Landwerlin | drm/i915/cnl: only divide up base frequency with crystal... Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2017-10-09 | Paulo Zanoni | drm/i915: avoid division by zero on cnl_calc_wrpll_link Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2017-10-09 | Paulo Zanoni | drm/i915: add the BXT and CNL DPLL registers to pipe_config_... Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2017-08-26 | Praveen Paneri | drm/i915: Fix FBC cfb stride programming for non X... Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2017-08-26 | Paulo Zanoni | drm/i915/cnl: don't hardcode DPCLKA_CFGCR0_DDI_CLK_SEL_SHIFT Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2017-08-17 | Anusha Srivatsa | drm/i915: Split pin mapping into per platform functions Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2017-03-31 | Paulo Zanoni | drm/i915: make a few DDI functions static Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2017-03-27 | Paulo Zanoni | drm/i915: kill intel_ddi_pll_select() Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2017-03-22 | Paulo Zanoni | drm/i915: simplify intel_ddi_pll_select() Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2017-03-22 | Pandiyan, Dhinakaran | drm/i915: Implement cdclk restrictions based on Azalia... Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2017-03-22 | Pandiyan, Dhinakaran | drm/i915/glk: Apply cdclk workaround for DP audio Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2017-03-07 | Paulo Zanoni | drm/i915: move the {skl, bxt}_{i, uni}nit_cdclk declarations Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2017-03-07 | Paulo Zanoni | drm/i915: remove potentially confusing IS_G4X checks Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2017-01-27 | Paulo Zanoni | drm/i915: make i915_stolen_to_physical() return phys_addr_t Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2017-01-04 | Paulo Zanoni | drm/i915: enable FBC on gen9+ too Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2017-01-04 | Paulo Zanoni | drm/i915: actually drive the BDW reserved IDs Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2017-01-04 | Paulo Zanoni | drm/i915: more .is_mobile cleanups for BDW Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2017-01-04 | Paulo Zanoni | drm/i915: fix INTEL_BDW_IDS definition Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2016-12-20 | Paulo Zanoni | drm/i915: fully apply WaSkipStolenMemoryFirstPage Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2016-12-20 | Paulo Zanoni | drm/i915: skip the first 4k of stolen memory on everything... Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2016-12-14 | Paulo Zanoni | drm/i915: disable PSR by default on HSW/BDW Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2016-12-07 | Mahesh Kumar | drm/i915: Add intel_atomic_get_existing_crtc_state... Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2016-12-07 | Mahesh Kumar | drm/i915/skl+: change WM calc to fixed point 16.16 Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2016-12-07 | Mahesh Kumar | drm/i915/kbl: IPC workaround for kabylake Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2016-12-07 | Mahesh Kumar | drm/i915/bxt: IPC WA for Broxton Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2016-12-07 | Mahesh Kumar | drm/i915/skl: Add variables to check x_tile and y_tile Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2016-11-14 | Paulo Zanoni | drm/i915/fbc: convert intel_fbc.c to use INTEL_GEN() Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2016-11-14 | Paulo Zanoni | drm/i915/fbc: use drm_atomic_get_existing_crtc_state... Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2016-11-14 | Paulo Zanoni | drm/i915/fbc: inline intel_fbc_can_choose() Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2016-11-14 | Paulo Zanoni | drm/i915/fbc: extract intel_fbc_can_enable() Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2016-11-14 | Paulo Zanoni | drm/i915/fbc: replace a loop with drm_atomic_get_existing_cr... Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2016-11-14 | Paulo Zanoni | drm/i915/fbc: move the intel_fbc_can_choose() call... Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2016-11-14 | Paulo Zanoni | drm/i915/gen9: fix the WM memory bandwidth WA for Y... Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2016-10-24 | Paulo Zanoni | drm/i915/fbc: fix FBC_COMPRESSION_MASK on BDW+ Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2016-10-24 | Paulo Zanoni | drm/i915/fbc: fix CFB size calculation for gen8+ Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2016-10-19 | cpaul@redhat.com | drm/i915/gen9: Don't wrap strings in verify_wm_state() Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2016-10-19 | cpaul@redhat.com | drm/i915/gen9: Actually verify WM levels in verify_wm_state() Thanks to Paulo Zanoni for indirectly pointing this out. Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2016-10-19 | cpaul@redhat.com | drm/i915/gen9: Add skl_wm_level_equals() Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2016-10-19 | cpaul@redhat.com | drm/i915/gen9: Make skl_pipe_wm_get_hw_state() reusable Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2016-10-19 | cpaul@redhat.com | drm/i915/gen9: Add ddb changes to atomic debug output Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2016-10-19 | cpaul@redhat.com | drm/i915/gen9: Get rid of redundant watermark values Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> (v2) Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2016-10-18 | Paulo Zanoni | drm/i915/gen9: don't call ilk_pipe_pixel_rate() twice... Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2016-10-18 | Paulo Zanoni | drm/i915/gen9: fix watermarks when using the pipe scaler Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2016-10-18 | Paulo Zanoni | drm/i915/gen9: look for adjusted_mode in the SAGV check... Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2016-10-18 | Paulo Zanoni | drm/i915/gen9: unconditionally apply the memory bandwidth WA Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2016-10-18 | Anusha Srivatsa | drm/i915/guc: Sanitory checks for platform that dont... Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2016-10-11 | Paulo Zanoni | drm/i915/gen9: fix DDB partitioning for multi-screen... Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2016-09-26 | Nagaraju, Vathsala | drm/i915: don't report compression when fbc is disabled Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2016-09-26 | Paulo Zanoni | drm/i915/gen9: fail the modeset instead of WARNing... Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2016-09-26 | Paulo Zanoni | drm/i915/gen9: implement missing case for SKL watermarks... Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2016-09-26 | Paulo Zanoni | drm/i915/gen9: fix the watermark res_blocks value Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2016-09-26 | Paulo Zanoni | drm/i915/gen9: fix plane_blocks_per_line on watermarks... Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2016-09-26 | Paulo Zanoni | drm/i915/gen9: minimum scanlines for Y tile is not... Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2016-09-26 | Paulo Zanoni | drm/i915/gen9: fix the WaWmMemoryReadLatency implementation Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2016-09-26 | Paulo Zanoni | drm/i915/kbl: KBL also needs to run the SAGV code Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2016-09-26 | Paulo Zanoni | drm/i915: introduce intel_has_sagv() Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2016-09-26 | Paulo Zanoni | drm/i915: SAGV is not SKL-only, so rename a few things Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2016-09-22 | Paulo Zanoni | drm/i915: don't forget to set intel_crtc->dspaddr_offset... Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2016-09-22 | Paulo Zanoni | drm/i915/fbc: disable FBC on FIFO underruns Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2016-06-20 | Chris Wilson | drm/i915: use ORIGIN_CPU for frontbuffer invalidation... Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2016-06-20 | Paulo Zanoni | drm/i915/fbc: sanitize i915.enable_fbc during FBC init Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2016-06-20 | Paulo Zanoni | drm/i915/fbc: update busy_bits even for GTT and flip... Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2016-06-20 | Lyude | drm/i915/fbc: Disable on HSW by default for now Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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| 2016-02-19 | Paulo Zanoni | drm/i915/fbc: enable FBC by default on HSW and BDW Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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