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drm/i915/display: Force the state compute phase once to enable PSR
2020-01-08 José Roberto de... drm/i915/display: Force the state compute phase once...
...off-by: José Roberto de Souza <jose.souza@intel.com>
...msgid/20200106152128.195171-1-jose.souza@intel.com
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2020-01-07 José Roberto de... drm/i915/display: Use external dependency loop for...
...off-by: José Roberto de Souza <jose.souza@intel.com>
...msgid/20200106142823.145260-1-jose.souza@intel.com
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2019-12-23 José Roberto de... drm/i915/display: Add comment to a function that probably...
...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20191223010654.67037-7-jose.souza@intel.com
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2019-12-23 José Roberto de... drm/i915/mst: Force modeset on MST slaves when master...
...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20191223010654.67037-6-jose.souza@intel.com
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2019-12-23 José Roberto de... drm/i915/display: Prepare for fastset external dependencies...
...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20191223010654.67037-5-jose.souza@intel.com
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2019-12-23 José Roberto de... drm/i915/dp: Fix MST disable sequence
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20191223010654.67037-4-jose.souza@intel.com
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2019-12-23 José Roberto de... drm/i915/display: Always enables MST master pipe first
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20191223010654.67037-3-jose.souza@intel.com
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2019-12-23 José Roberto de... drm/i915/tgl: Select master transcoder for MST stream
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20191223010654.67037-2-jose.souza@intel.com
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2019-12-23 José Roberto de... drm/i915/display: Share intel_connector_needs_modeset()
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20191223010654.67037-1-jose.souza@intel.com
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2019-12-06 José Roberto de... drm/i915/display: Refactor intel_commit_modeset_disables()
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20191205210350.96795-3-jose.souza@intel.com
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2019-12-06 José Roberto de... drm/i915/display/tgl: Fix the order of the step to...
...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20191205210350.96795-2-jose.souza@intel.com
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2019-12-06 José Roberto de... drm/i915/display: Do not check for the ddb allocations...
...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20191205210350.96795-1-jose.souza@intel.com
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2019-12-06 José Roberto de... drm/i915: Add new EHL/JSL PCI ids
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...msgid/20191203211308.109703-1-jose.souza@intel.com
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2019-12-03 José Roberto de... drm/i915/display/mst: Move DPMS_OFF call to post_disable
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...msgid/20191202222513.337777-3-jose.souza@intel.com
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2019-12-03 José Roberto de... drm/i915/dp: Power down sink before disable pipe/transcoder...
...off-by: José Roberto de Souza <jose.souza@intel.com>
...msgid/20191202222513.337777-2-jose.souza@intel.com
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2019-12-03 José Roberto de... drm/i915/display: Check the old state to find port...
...off-by: José Roberto de Souza <jose.souza@intel.com>
...msgid/20191202222513.337777-1-jose.souza@intel.com
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2019-12-02 José Roberto de... drm/i915/display: Suspend MST topology manager before...
...off-by: José Roberto de Souza <jose.souza@intel.com>
...msgid/20191127021609.162700-1-jose.souza@intel.com
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2019-12-02 José Roberto de... drm/i915/vbt: Parse power conservation features block
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...msgid/20191128014852.214135-5-jose.souza@intel.com
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2019-12-02 José Roberto de... drm/i915/psr: Check if sink PSR capability changed
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...msgid/20191128014852.214135-4-jose.souza@intel.com
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2019-12-02 José Roberto de... drm/i915/psr: Enable ALPM lock timeout error interruption
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...msgid/20191128014852.214135-3-jose.souza@intel.com
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2019-12-02 José Roberto de... drm/i915/psr: Refactor psr short pulse handler
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...msgid/20191128014852.214135-2-jose.souza@intel.com
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2019-12-02 José Roberto de... drm/i915/psr: Add bits per pixel limitation
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...msgid/20191128014852.214135-1-jose.souza@intel.com
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2019-11-18 José Roberto de... drm/i915/mst: Check uapi enable not intel one during...
...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20191115200430.53146-1-jose.souza@intel.com
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2019-11-13 José Roberto de... drm/i915/display/mst: Enable virtual channel payload...
...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20191107214559.77087-3-jose.souza@intel.com
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2019-11-13 José Roberto de... drm/i915/display/dsi: Add support to pipe D
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20191107214559.77087-2-jose.souza@intel.com
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2019-11-13 José Roberto de... drm/i915/display: Fix TRANS_DDI_MST_TRANSPORT_SELECT...
...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20191107214559.77087-1-jose.souza@intel.com
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2019-10-31 José Roberto de... drm/i915/dp: Do not switch aux to TBT mode for non...
...off-by: José Roberto de Souza <jose.souza@intel.com>
...msgid/20191029011014.286885-1-jose.souza@intel.com
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2019-10-29 José Roberto de... drm/i915/display/cnl+: Handle fused off DSC
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...msgid/20191026001323.216052-5-jose.souza@intel.com
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2019-10-29 José Roberto de... drm/i915/display/icl+: Check if DMC is fused off
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...msgid/20191026001323.216052-4-jose.souza@intel.com
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2019-10-29 José Roberto de... drm/i915/display: Check if FBC is fused off
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...msgid/20191026001323.216052-3-jose.souza@intel.com
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2019-10-29 José Roberto de... drm/i915/display: Handle fused off HDCP
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...msgid/20191026001323.216052-2-jose.souza@intel.com
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2019-10-29 José Roberto de... drm/i915: Add two spaces before the SKL_DFSM registers
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...msgid/20191026001323.216052-1-jose.souza@intel.com
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2019-10-25 José Roberto de... drm/i915/tc: Clear DKL_TX_PMD_LANE_SUS before program...
...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20191021223408.87344-1-jose.souza@intel.com
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2019-10-25 José Roberto de... drm/i915/display/psr: Print in debugfs if PSR is not...
...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20191023214932.94679-1-jose.souza@intel.com
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2019-10-24 Ap Kamaldrm/i915: Making loglevel of PSR2/SU logs same.
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
...off-by: José Roberto de Souza <jose.souza@intel.com>
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2019-10-02 José Roberto de... drm/i915/mg: Use tc_port instead of port parameter...
...off-by: José Roberto de Souza <jose.souza@intel.com>
...msgid/20191001193729.123736-1-jose.souza@intel.com
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2019-09-27 Lucas De Marchidrm/i915/tgl: initialize TC and TBT ports
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20190926210659.56317-4-jose.souza@intel.com
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2019-09-27 José Roberto de... drm/i915/tgl: Fix dkl link training
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20190926210659.56317-3-jose.souza@intel.com
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2019-09-27 Clinton A Taylordrm/i915/tgl: Add dkl phy programming sequences
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20190926210659.56317-2-jose.souza@intel.com
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2019-09-27 Clinton A Taylordrm/i915/tc: Update DP_MODE programming
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20190926210659.56317-1-jose.souza@intel.com
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2019-09-25 José Roberto de... drm/i915/tgl: Return the mg/dkl pll as DDI clock for...
...off-by: José Roberto de Souza <jose.souza@intel.com>
...msgid/20190924210040.142075-6-jose.souza@intel.com
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2019-09-25 José Roberto de... drm/i915/tgl: Add dkl phy pll calculations
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...msgid/20190924210040.142075-5-jose.souza@intel.com
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2019-09-25 Lucas De Marchidrm/i915/tgl: re-indent code to prepare for DKL changes
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...msgid/20190924210040.142075-4-jose.souza@intel.com
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2019-09-25 Vandita Kulkarnidrm/i915/tgl: Add support for dkl pll write
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...msgid/20190924210040.142075-2-jose.souza@intel.com
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2019-09-25 Lucas De Marchidrm/i915/tgl: Add initial dkl pll support
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...msgid/20190924210040.142075-1-jose.souza@intel.com
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2019-09-23 José Roberto de... drm/i915/tgl: Check the UC health of tc controllers...
...off-by: José Roberto de Souza <jose.souza@intel.com>
...msgid/20190920205810.211048-7-jose.souza@intel.com
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2019-09-23 José Roberto de... drm/i915/icl: Unify disable and enable phy clock gating...
...off-by: José Roberto de Souza <jose.souza@intel.com>
...msgid/20190920205810.211048-6-jose.souza@intel.com
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2019-09-23 Vandita Kulkarnidrm/i915/tgl: Add dkl phy registers
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...msgid/20190920205810.211048-5-jose.souza@intel.com
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2019-09-23 Clinton A Taylordrm/i915/tgl/pll: Set update_active_dpll
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...msgid/20190920205810.211048-4-jose.souza@intel.com
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2019-09-23 José Roberto de... drm/i915/tgl: Finish modular FIA support on registers
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...msgid/20190920205810.211048-3-jose.souza@intel.com
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2019-09-23 Clinton A Taylordrm/i915/tgl: Add missing ddi clock select during DP...
...off-by: José Roberto de Souza <jose.souza@intel.com>
...msgid/20190920205810.211048-2-jose.souza@intel.com
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2019-09-05 José Roberto de... drm/i915/mst: Do not hardcoded the crtcs that encoder...
...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20190904230241.20638-2-jose.souza@intel.com
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2019-09-05 José Roberto de... drm/i915: Apply FBC WA for TGL too
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20190904230241.20638-1-jose.souza@intel.com
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2019-09-05 Lucas De Marchidrm/i915/tgl: add gen12 to stolen initialization
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20190904213419.27547-7-jose.souza@intel.com
...off-by: José Roberto de Souza <jose.souza@intel.com>
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2019-09-05 Lucas De Marchidrm/i915/tgl: disable SAGV temporarily
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20190904213419.27547-6-jose.souza@intel.com
...off-by: José Roberto de Souza <jose.souza@intel.com>
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2019-09-05 Lucas De Marchidrm/i915/tgl: move DP_TP_* to transcoder
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20190904213419.27547-5-jose.souza@intel.com
...off-by: José Roberto de Souza <jose.souza@intel.com>
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2019-09-05 Lucas De Marchidrm/i915: protect access to DP_TP_* on non-dp
 ...patch/msgid/20190904213419.27547-4-jose.souza@intel.com
...off-by: José Roberto de Souza <jose.souza@intel.com>
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2019-09-05 José Roberto de... drm/i915/tgl: Access the right register when handling...
...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20190904213419.27547-3-jose.souza@intel.com
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2019-09-05 José Roberto de... drm/i915/psr: Only handle interruptions of the transcoder...
...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20190904213419.27547-2-jose.souza@intel.com
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2019-09-04 Daniel Vetterdrm/i915: disable set/get_tiling ioctl on gen12+
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
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2019-08-30 Lucas De Marchidrm/i915: unify icp, tgp and mcc irq setup
 ...patch/msgid/20190829211526.30525-4-jose.souza@intel.com
...off-by: José Roberto de Souza <jose.souza@intel.com>
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2019-08-30 Lucas De Marchidrm/i915: parameterize SDE hotplug registers
 ...patch/msgid/20190829211526.30525-3-jose.souza@intel.com
...off-by: José Roberto de Souza <jose.souza@intel.com>
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2019-08-30 Lucas De Marchidrm/i915: unify icp, tgp and mcc irq handling
 ...patch/msgid/20190829211526.30525-2-jose.souza@intel.com
...off-by: José Roberto de Souza <jose.souza@intel.com>
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2019-08-30 Lucas De Marchidrm/i915: parameterize south hpd macros
 ...patch/msgid/20190829211526.30525-1-jose.souza@intel.com
...off-by: José Roberto de Souza <jose.souza@intel.com>
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2019-08-22 José Roberto de... drm/i915: Do not unmask PSR interruption in IRQ postinstall
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20190820223325.27490-3-jose.souza@intel.com
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2019-08-22 José Roberto de... drm/i915: Add transcoder restriction to PSR2
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20190820223325.27490-2-jose.souza@intel.com
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2019-08-22 José Roberto de... drm/i915/psr: Make PSR registers relative to transcoders
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20190820223325.27490-1-jose.souza@intel.com
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2019-08-13 José Roberto de... drm/i915: Add _TRANS2()
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20190730224753.14907-2-jose.souza@intel.com
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2019-08-13 José Roberto de... drm/i915/bdw+: Move misc display IRQ handling to it...
...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20190730224753.14907-1-jose.souza@intel.com
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2019-08-13 José Roberto de... drm/i915/tgl: Fix missing parentheses on TGL_TRANS_DDI_FUNC_...
...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20190812175405.14479-1-jose.souza@intel.com
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2019-08-08 José Roberto de... drm/i915/tgl: Fix the read of the DDI that transcoder...
...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20190808004935.1787-2-jose.souza@intel.com
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2019-08-08 José Roberto de... drm/i915: Get transcoder power domain before reading...
...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20190808004935.1787-1-jose.souza@intel.com
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2019-07-31 José Roberto de... drm/i915/ehl: Ungate DDIC and DDID
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20190730175121.16413-1-jose.souza@intel.com
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2019-07-15 José Roberto de... drm/i915: Enable hotplug retry
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20190712005343.24571-2-jose.souza@intel.com
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2019-07-15 Imre Deakdrm/i915: Add support for retrying hotplug
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20190712005343.24571-1-jose.souza@intel.com
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2019-06-26 José Roberto de... drm/i915/ehl: Add voltage level requirement table
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20190626014053.30541-3-jose.souza@intel.com
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2019-06-26 José Roberto de... drm/i915/ehl: Remove unsupported cd clocks
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20190626014053.30541-2-jose.souza@intel.com
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2019-06-26 José Roberto de... drm/i915/icl: Add new supported CD clocks
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20190626014053.30541-1-jose.souza@intel.com
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2019-06-25 José Roberto de... drm/i915/ehl: Add missing VECS engine
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20190614213749.15870-1-jose.souza@intel.com
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2019-06-20 José Roberto de... drm/i915/ehl/dsi: Enable AFE over PPI strap
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20190619233134.20009-2-jose.souza@intel.com
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2019-06-20 Vandita Kulkarnidrm/i915/ehl/dsi: Set lane latency optimization for DW1
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20190619233134.20009-1-jose.souza@intel.com
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2019-06-18 José Roberto de... drm/i915/psr: Force manual PSR exit in older gens
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20190617195154.30292-1-jose.souza@intel.com
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2019-04-08 José Roberto de... drm/i915/psr: Do not enable PSR in interlaced mode...
...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20190406005112.27205-4-jose.souza@intel.com
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2019-04-08 José Roberto de... drm/i915/psr: Initialize PSR mutex even when sink is...
...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20190406005112.27205-3-jose.souza@intel.com
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2019-04-08 José Roberto de... drm/i915: Remove unused VLV/CHV PSR registers
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20190406005112.27205-2-jose.souza@intel.com
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2019-04-08 José Roberto de... drm/i915/psr: Update PSR2 SU corruption workaround...
...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20190406005112.27205-1-jose.souza@intel.com
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2019-03-19 José Roberto de... drm/i915: Fix PSR2 selective update corruption after...
...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20190314230113.6571-1-jose.souza@intel.com
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2019-03-13 José Roberto de... drm/i915/icl+: Always use TPS2 or TPS3 when exiting...
...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20190312195743.8829-3-jose.souza@intel.com
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2019-03-13 José Roberto de... drm/i915/psr: Move logic to get TPS registers values...
...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20190312195743.8829-2-jose.souza@intel.com
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2019-03-13 José Roberto de... drm/i915/vbt: Parse and use the new field with PSR2...
...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20190312195743.8829-1-jose.souza@intel.com
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2019-03-12 José Roberto de... drm/i915: Add new ICL PCI ID
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20190308215646.30436-1-jose.souza@intel.com
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2019-03-08 José Roberto de... drm/i915: Enable PSR2 by default
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20190308000050.6226-9-jose.souza@intel.com
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2019-03-08 José Roberto de... drm/i915: Force PSR1 exit when getting pipe CRC
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20190308000050.6226-8-jose.souza@intel.com
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2019-03-08 José Roberto de... drm/i915: Drop redundant checks to update PSR state
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20190308000050.6226-7-jose.souza@intel.com
 commit | commitdiff | tree
2019-03-08 José Roberto de... drm/i915: Disable PSR2 while getting pipe CRC
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20190308000050.6226-6-jose.souza@intel.com
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2019-03-08 José Roberto de... drm/i915/crc: Make IPS workaround generic
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20190308000050.6226-5-jose.souza@intel.com
 commit | commitdiff | tree
2019-03-08 José Roberto de... drm/i915/psr: Drop test for EDP in CRTC when forcing...
...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20190308000050.6226-4-jose.souza@intel.com
 commit | commitdiff | tree
2019-03-08 José Roberto de... drm/i915: Compute and commit color features in fastsets
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20190308000050.6226-3-jose.souza@intel.com
 commit | commitdiff | tree
2019-03-08 José Roberto de... drm/i915/psr: Only lookup for enabled CRTCs when forcing...
...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20190308000050.6226-2-jose.souza@intel.com
 commit | commitdiff | tree
2019-03-08 José Roberto de... drm/i915/psr: Remove PSR2 FIXME
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20190308000050.6226-1-jose.souza@intel.com
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