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drm/i915: Move the DPLL vfunc inits after the func defines
2020-03-02 Imre Deakdrm/i915: Move the DPLL vfunc inits after the func...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...patch/msgid/20200226203455.23032-5-imre.deak@intel.com
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2020-03-02 Imre Deakdrm/i915: Keep the global DPLL state in a DPLL specific...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...patch/msgid/20200226203455.23032-4-imre.deak@intel.com
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2020-03-02 Imre Deakdrm/i915: Move DPLL HW readout/sanitize fns to intel_dpll_mgr.c
Signed-off-by: Imre Deak <imre.deak@intel.com>
...patch/msgid/20200226203455.23032-3-imre.deak@intel.com
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2020-03-02 Imre Deakdrm/i915: Fix bounds check in intel_get_shared_dpll_id()
Signed-off-by: Imre Deak <imre.deak@intel.com>
...patch/msgid/20200226203455.23032-2-imre.deak@intel.com
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2020-01-07 Dhinakaran Pandiyandrm/i915/tgl: Gen-12 display can decompress surfaces...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...patch/msgid/20191231233756.18753-8-imre.deak@intel.com
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2020-01-07 Dhinakaran Pandiyandrm/fb: Extend format_info member arrays to handle...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...patch/msgid/20191231233756.18753-7-imre.deak@intel.com
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2020-01-07 Dhinakaran Pandiyandrm/framebuffer: Format modifier for Intel Gen-12 media...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...patch/msgid/20191231233756.18753-6-imre.deak@intel.com
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2020-01-07 Imre Deakdrm/i915: Make sure plane dims are correct for UV CCS...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...patch/msgid/20191231233756.18753-5-imre.deak@intel.com
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2020-01-07 Imre Deakdrm/i915: Add debug message for FB plane[0].offset...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...patch/msgid/20191231233756.18753-4-imre.deak@intel.com
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2020-01-07 Imre Deakdrm/i915/tgl: Make sure a semiplanar UV plane is tile...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...patch/msgid/20191231233756.18753-3-imre.deak@intel.com
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2020-01-07 Imre Deakdrm/i915: Add support for non-power-of-2 FB plane alignment
Signed-off-by: Imre Deak <imre.deak@intel.com>
...patch/msgid/20191231233756.18753-2-imre.deak@intel.com
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2019-12-23 Imre Deakdrm/i915: Make sure CCS YUV semiplanar format checks...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...msgid/20191221120543.22816-11-imre.deak@intel.com
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2019-12-23 Imre Deakdrm/i915: Make sure Y slave planes get all the required...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...msgid/20191221120543.22816-10-imre.deak@intel.com
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2019-12-23 Dhinakaran Pandiyandrm/i915: Skip rotated offset adjustment for unsupported...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...patch/msgid/20191221120543.22816-9-imre.deak@intel.com
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2019-12-23 Imre Deakdrm/i915/tgl: Make sure FBs have a correct CCS plane...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...patch/msgid/20191221120543.22816-8-imre.deak@intel.com
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2019-12-23 Dhinakaran Pandiyandrm/i915/tgl: Gen-12 render decompression
Signed-off-by: Imre Deak <imre.deak@intel.com>
...patch/msgid/20191221120543.22816-7-imre.deak@intel.com
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2019-12-23 Dhinakaran Pandiyandrm/framebuffer: Format modifier for Intel Gen-12 render...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...patch/msgid/20191221120543.22816-6-imre.deak@intel.com
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2019-12-23 Imre Deakdrm/i915: Add helpers to select correct ccs/aux planes
Signed-off-by: Imre Deak <imre.deak@intel.com>
...patch/msgid/20191221120543.22816-5-imre.deak@intel.com
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2019-12-23 Dhinakaran Pandiyandrm/i915: Extract framebufer CCS offset checks into...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...patch/msgid/20191221120543.22816-4-imre.deak@intel.com
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2019-12-23 Dhinakaran Pandiyandrm/i915: Move CCS stride alignment W/A inside intel_fb_stri...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...patch/msgid/20191221120543.22816-3-imre.deak@intel.com
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2019-12-23 Dhinakaran Pandiyandrm/i915: Use intel_tile_height() instead of re-implementing
Signed-off-by: Imre Deak <imre.deak@intel.com>
...patch/msgid/20191221120543.22816-2-imre.deak@intel.com
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2019-11-13 Imre Deakdrm/i915: Fix detection for a CMP-V PCH
Signed-off-by: Imre Deak <imre.deak@intel.com>
...patch/msgid/20191112104608.24587-1-imre.deak@intel.com
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2019-10-30 Imre Deakdrm/i915: Avoid HPD poll detect triggering a new detect...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...patch/msgid/20191028181517.22602-1-imre.deak@intel.com
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2019-10-23 Imre Deakdrm/i915: Add new CNL PCH ID seen on a CML platform
Signed-off-by: Imre Deak <imre.deak@intel.com>
...patch/msgid/20191022095155.30991-1-imre.deak@intel.com
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2019-10-08 Anshuman Guptadrm/i915/tgl: Add DC3CO counter in i915_dmc_info
Cc: Imre Deak <imre.deak@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2019-10-08 Anshuman Guptadrm/i915/tgl: Switch between dc3co and dc5 based on...
Cc: Imre Deak <imre.deak@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2019-10-08 Anshuman Guptadrm/i915/tgl: Do modeset to enable and configure DC3CO...
Cc: Imre Deak <imre.deak@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2019-10-08 Anshuman Guptadrm/i915/tgl: Enable DC3CO state in "DC Off" power...
Cc: Imre Deak <imre.deak@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2019-10-08 Anshuman Guptadrm/i915/tgl: Add DC3CO mask to allowed_dc_mask and...
Cc: Imre Deak <imre.deak@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2019-10-08 Anshuman Guptadrm/i915/tgl: Add DC3CO required register and bits
Cc: Imre Deak <imre.deak@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2019-10-04 Imre Deakdrm/i915/tgl: Add the Thunderbolt PLL divider values
Signed-off-by: Imre Deak <imre.deak@intel.com>
...patch/msgid/20191002204108.32242-1-imre.deak@intel.com
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2019-08-28 Imre Deakdrm/i915: Align power domain names with port names
Signed-off-by: Imre Deak <imre.deak@intel.com>
...patch/msgid/20190823100711.27833-1-imre.deak@intel.com
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2019-08-20 Imre Deakdrm/i915: Sanitize PHY state during display core uninit
Signed-off-by: Imre Deak <imre.deak@intel.com>
...patch/msgid/20190816095523.15800-1-imre.deak@intel.com
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2019-08-20 Imre Deakdrm/i915: Fix HW readout for crtc_clock in HDMI mode
Signed-off-by: Imre Deak <imre.deak@intel.com>
...patch/msgid/20190808162547.7009-1-imre.deak@intel.com
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2019-08-12 Anshuman Guptadrm/i915/tgl: Fixing up list of PG3 power domains.
Cc: Imre Deak <imre.deak@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
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2019-08-12 Anshuman Guptadrm/i915/icl: Remove DDI IO power domain from PG3 power...
Cc: Imre Deak <imre.deak@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
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2019-07-09 Imre Deakdrm/i915/icl: Clear the shared port PLLs from the new...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...patch/msgid/20190708140735.20198-2-imre.deak@intel.com
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2019-07-09 Imre Deakdrm/i915: Clear the shared PLL from the put_dplls(...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...patch/msgid/20190708140735.20198-1-imre.deak@intel.com
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2019-07-01 Imre Deakdrm/i915: WARN about invalid lane reversal in TBT-alt...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...msgid/20190628143635.22066-24-imre.deak@intel.com
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2019-07-01 Imre Deakdrm/i915: Remove unneeded disconnect in TypeC legacy...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...msgid/20190628143635.22066-23-imre.deak@intel.com
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2019-07-01 Imre Deakdrm/i915: Add state verification for the TypeC port...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...msgid/20190628143635.22066-22-imre.deak@intel.com
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2019-07-01 Imre Deakdrm/i915: Keep the TypeC port mode fixed when the port...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...msgid/20190628143635.22066-21-imre.deak@intel.com
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2019-07-01 Imre Deakdrm/i915/icl: Reserve all required PLLs for TypeC ports
Signed-off-by: Imre Deak <imre.deak@intel.com>
...msgid/20190628143635.22066-20-imre.deak@intel.com
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2019-07-01 Imre Deakdrm/i915/icl: Split getting the DPLLs to port type...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...msgid/20190628143635.22066-19-imre.deak@intel.com
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2019-07-01 Imre Deakdrm/i915: Sanitize the shared DPLL find/reference interface
Signed-off-by: Imre Deak <imre.deak@intel.com>
...msgid/20190628143635.22066-18-imre.deak@intel.com
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2019-07-01 Imre Deakdrm/i915: Sanitize the shared DPLL reserve/release...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...msgid/20190628143635.22066-17-imre.deak@intel.com
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2019-07-01 Imre Deakdrm/i915: Sanitize the TypeC FIA lane configuration...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...msgid/20190628143635.22066-16-imre.deak@intel.com
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2019-07-01 Imre Deakdrm/i915: Keep the TypeC port mode fixed for detect...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...msgid/20190628143635.22066-15-imre.deak@intel.com
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2019-07-01 Imre Deakdrm/i915: Fix the TypeC port mode sanitization during...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...msgid/20190628143635.22066-14-imre.deak@intel.com
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2019-07-01 Imre Deakdrm/i915: Sanitize the TypeC connect/detect sequences
Signed-off-by: Imre Deak <imre.deak@intel.com>
...msgid/20190628143635.22066-13-imre.deak@intel.com
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2019-07-01 Imre Deakdrm/i915: Handle the TCCOLD power-down event
Signed-off-by: Imre Deak <imre.deak@intel.com>
...msgid/20190628143635.22066-12-imre.deak@intel.com
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2019-07-01 Imre Deakdrm/i915: Wait for TypeC PHY complete flag to clear...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...msgid/20190628143635.22066-11-imre.deak@intel.com
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2019-07-01 Imre Deakdrm/i915: Factor out common parts from TypeC port handling...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...msgid/20190628143635.22066-10-imre.deak@intel.com
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2019-07-01 Imre Deakdrm/i915: Unify the TypeC port notation in debug/error...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...patch/msgid/20190628143635.22066-9-imre.deak@intel.com
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2019-07-01 Imre Deakdrm/i915: Use the correct AUX power domain in TypeC...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...patch/msgid/20190628143635.22066-8-imre.deak@intel.com
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2019-07-01 Imre Deakdrm/i915: Fix the TBT AUX power well enabling
Signed-off-by: Imre Deak <imre.deak@intel.com>
...patch/msgid/20190628143635.22066-7-imre.deak@intel.com
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2019-07-01 Imre Deakdrm/i915: Don't enable the DDI-IO power in the TypeC...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...patch/msgid/20190628143635.22066-6-imre.deak@intel.com
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2019-07-01 Imre Deakdrm/i915: Sanitize the terminology used for TypeC port...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...patch/msgid/20190628143635.22066-5-imre.deak@intel.com
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2019-07-01 Imre Deakdrm/i915: Move the TypeC port handling code to a separate...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...patch/msgid/20190628143635.22066-4-imre.deak@intel.com
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2019-07-01 Imre Deakdrm/i915: Tune down WARNs about TBT AUX power well...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...patch/msgid/20190628143635.22066-3-imre.deak@intel.com
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2019-07-01 Imre Deakdrm/i915/icl: Add support to read out the TBT PLL HW...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...patch/msgid/20190628143635.22066-2-imre.deak@intel.com
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2019-06-01 Imre Deakdrm/i915/icl: Ensure port A combo PHY HW state is correct
Signed-off-by: Imre Deak <imre.deak@intel.com>
...patch/msgid/20190531082626.30640-1-imre.deak@intel.com
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2019-05-29 Imre Deakdrm/mst: Fix MST sideband up-reply failure handling
Signed-off-by: Imre Deak <imre.deak@intel.com>
...patch/msgid/20190523212433.9058-1-imre.deak@intel.com
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2019-05-27 Imre Deakdrm/i915/icl: Fix AUX-B HW not done issue w/o AUX-A
Signed-off-by: Imre Deak <imre.deak@intel.com>
...patch/msgid/20190524173532.6444-1-imre.deak@intel.com
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2019-05-14 Imre Deakdrm/i915: Assert that TypeC ports are not used for eDP
Signed-off-by: Imre Deak <imre.deak@intel.com>
...msgid/20190509173446.31095-12-imre.deak@intel.com
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2019-05-14 Imre Deakdrm/i915: Avoid taking the PPS lock for non-eDP/VLV/CHV
Signed-off-by: Imre Deak <imre.deak@intel.com>
...msgid/20190509173446.31095-11-imre.deak@intel.com
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2019-05-14 Imre Deakdrm/i915: Replace use of PLLS power domain with DISPLAY_CORE...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...msgid/20190509173446.31095-10-imre.deak@intel.com
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2019-05-14 Imre Deakdrm/i915: Remove the unneeded AUX power ref from intel_dp_hp...
Author: Imre Deak <imre.deak@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
...patch/msgid/20190509173446.31095-9-imre.deak@intel.com
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2019-05-14 Imre Deakdrm/i915: Remove the unneeded AUX power ref from intel_dp_de...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...patch/msgid/20190509173446.31095-8-imre.deak@intel.com
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2019-05-14 Imre Deakdrm/i915: WARN for eDP encoders in intel_dp_detect_dpcd()
Signed-off-by: Imre Deak <imre.deak@intel.com>
...patch/msgid/20190509173446.31095-7-imre.deak@intel.com
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2019-05-14 Imre Deakdrm/i915: Disable power asynchronously during DP AUX...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...patch/msgid/20190509173446.31095-6-imre.deak@intel.com
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2019-05-14 Imre Deakdrm/i915: Add support for asynchronous display power...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...patch/msgid/20190513192533.12586-1-imre.deak@intel.com
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2019-05-14 Imre Deakdrm/i915: Verify power domains state during suspend...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...patch/msgid/20190509173446.31095-4-imre.deak@intel.com
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2019-05-14 Imre Deakdrm/i915: Force printing wakeref tacking during pm_cleanup
Signed-off-by: Imre Deak <imre.deak@intel.com>
...patch/msgid/20190509173446.31095-3-imre.deak@intel.com
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2019-05-14 Imre Deakdrm/i915: Add support for tracking wakerefs w/o power...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...patch/msgid/20190509173446.31095-2-imre.deak@intel.com
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2019-05-14 Imre Deakdrm/i915/icl: More workaround for port F detection...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...patch/msgid/20190510140255.25215-1-imre.deak@intel.com
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2019-05-02 Imre Deakdrm/i915: Tune down WARN about incorrect VBT TC legacy...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...patch/msgid/20190502101754.29219-1-imre.deak@intel.com
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2019-05-02 Imre Deakdrm/i915/icl: Add missing combo PHY lane power setup
Signed-off-by: Imre Deak <imre.deak@intel.com>
...patch/msgid/20190425185253.3197-2-imre.deak@intel.com
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2019-05-02 Imre Deakdrm/i915/icl: Factor out combo PHY lane power setup...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...patch/msgid/20190425185253.3197-1-imre.deak@intel.com
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2019-04-23 Imre Deakdrm/i915/icl: Fix MG_DP_MODE() register programming
Signed-off-by: Imre Deak <imre.deak@intel.com>
...patch/msgid/20190419071026.32370-1-imre.deak@intel.com
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2019-04-08 Imre Deakdrm/i915/icl: Simplify release of encoder power refs
Signed-off-by: Imre Deak <imre.deak@intel.com>
...patch/msgid/20190405153657.20921-2-imre.deak@intel.com
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2019-04-08 Imre Deakdrm/i915: Get power refs in encoder->get_power_domains()
Signed-off-by: Imre Deak <imre.deak@intel.com>
...patch/msgid/20190407124655.31536-1-imre.deak@intel.com
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2019-04-03 Ville Syrjälädrm/i915: Skip modeset for cdclk changes if possible
Signed-off-by: Imre Deak <imre.deak@intel.com>
...patch/msgid/20190327101321.3095-1-imre.deak@intel.com
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2019-04-03 Imre Deakdrm/i915: Remove redundant store of logical CDCLK state
Signed-off-by: Imre Deak <imre.deak@intel.com>
...patch/msgid/20190320135439.12201-3-imre.deak@intel.com
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2019-04-03 Imre Deakdrm/i915: Save the old CDCLK atomic state
Signed-off-by: Imre Deak <imre.deak@intel.com>
...patch/msgid/20190320135439.12201-2-imre.deak@intel.com
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2019-04-03 Ville Syrjälädrm/i915: Force 2*96 MHz cdclk on glk/cnl when audio...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...patch/msgid/20190320135439.12201-1-imre.deak@intel.com
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2019-03-08 Imre Deakdrm/i915/icl: Prevent incorrect DBuf enabling
Signed-off-by: Imre Deak <imre.deak@intel.com>
...patch/msgid/20190307103235.23538-1-imre.deak@intel.com
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2019-01-31 Imre Deakdrm/i915/icl: Work around broken VBTs for port F detection
Signed-off-by: Imre Deak <imre.deak@intel.com>
...patch/msgid/20181220155211.31456-1-imre.deak@intel.com
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2019-01-31 Imre Deakdrm/i915/icl: Add TypeC ports only if VBT is present
Signed-off-by: Imre Deak <imre.deak@intel.com>
...patch/msgid/20190128114242.28666-1-imre.deak@intel.com
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2019-01-15 Imre Deakdrm/i915/icl: Detect port F presence via VBT
Signed-off-by: Imre Deak <imre.deak@intel.com>
...patch/msgid/20181220132604.25222-2-imre.deak@intel.com
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2019-01-15 Imre Deakdrm/i915/ddi: Move DDI port detection to the corresponding...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...patch/msgid/20181220132604.25222-1-imre.deak@intel.com
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2018-12-18 Imre Deakdrm/i915/icl: Add fallback detection method for TypeC...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...patch/msgid/20181214182703.18865-5-imre.deak@intel.com
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2018-12-18 Imre Deakdrm/i915/icl: Fix HPD handling for TypeC legacy ports
Signed-off-by: Imre Deak <imre.deak@intel.com>
...patch/msgid/20181214182703.18865-4-imre.deak@intel.com
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2018-12-18 Imre Deakdrm/i915/bios: Parse the VBT TypeC and Thunderbolt...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...patch/msgid/20181214182703.18865-3-imre.deak@intel.com
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2018-12-18 Imre Deakdrm/i915/icl: Add a debug print for TypeC port disconnection
Signed-off-by: Imre Deak <imre.deak@intel.com>
...patch/msgid/20181214182703.18865-2-imre.deak@intel.com
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2018-12-18 Clint Taylordrm/i915/icl: combo port vswing programming changes...
Cc: Imre Deak <imre.deak@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2018-11-21 Imre Deakdrm/i915: Make CHICKEN_TRANS reg not depend on enum...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...patch/msgid/20181119180021.370-1-imre.deak@intel.com
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2018-11-21 Imre Deakdrm/i915: Add code comment on assumption of pipe==transcoder
Signed-off-by: Imre Deak <imre.deak@intel.com>
...patch/msgid/20181120092325.21249-3-imre.deak@intel.com
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2018-11-21 Imre Deakdrm/i915: Make EDP PSR flags not depend on enum values
Signed-off-by: Imre Deak <imre.deak@intel.com>
...patch/msgid/20181120092325.21249-2-imre.deak@intel.com
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2018-11-21 Imre Deakdrm/i915: Make pipe/transcoder offsets not depend on...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...patch/msgid/20181120092325.21249-1-imre.deak@intel.com
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