projects / linux-2.6-microblaze.git / search
| 2023-01-30 | Matt Roper | drm/i915/dg1: Drop final use of IS_DG1_GRAPHICS_STEP Signed-off-by: Matt Roper <matthew.d.roper@intel.com> ...msgid/20230127224313.4042331-4-matthew.d.roper@intel.com |
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| 2023-01-30 | Matt Roper | drm/i915/dg1: Drop support for pre-production steppings Signed-off-by: Matt Roper <matthew.d.roper@intel.com> ...msgid/20230127224313.4042331-3-matthew.d.roper@intel.com |
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| 2023-01-30 | Matt Roper | drm/i915/tgl: Drop support for pre-production steppings Signed-off-by: Matt Roper <matthew.d.roper@intel.com> ...msgid/20230127224313.4042331-2-matthew.d.roper@intel.com |
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| 2023-01-10 | Gustavo Sousa | drm/i915/gt: Cover rest of SVG unit MCR registers Cc: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-12-15 | Matt Roper | drm/i915/dg2: Return Wa_22012654132 to just specific... Signed-off-by: Matt Roper <matthew.d.roper@intel.com> ...msgid/20221213234119.2963317-1-matthew.d.roper@intel.com |
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| 2022-12-12 | Jouni Högander | drm/i915/mtl: Initial display workarounds Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-12-05 | Matt Roper | drm/i915/gen12: Apply recommended L3 hashing mask Signed-off-by: Matt Roper <matthew.d.roper@intel.com> ...msgid/20221201222210.344152-1-matthew.d.roper@intel.com |
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| 2022-12-05 | Matt Roper | drm/i915/mtl: Check full IP version when applying hw... Signed-off-by: Matt Roper <matthew.d.roper@intel.com> ...msgid/20221202223528.714491-1-matthew.d.roper@intel.com |
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| 2022-12-02 | Matt Roper | drm/i915/mtl: Add hardware-level lock for steering Signed-off-by: Matt Roper <matthew.d.roper@intel.com> ...msgid/20221128233014.4000136-5-matthew.d.roper@intel.com |
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| 2022-12-01 | Matt Roper | drm/i915/mcr: Hold forcewake and MCR lock over PPAT... Signed-off-by: Matt Roper <matthew.d.roper@intel.com> ...msgid/20221130155852.19601-1-matthew.d.roper@intel.com |
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| 2022-12-01 | Wayne Boyer | drm/i915/pvc: Implement recommended caching policy Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-11-30 | Taylor, Clinton A | drm/i915/hdmi: SPD infoframe update for discrete Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-11-30 | Matt Roper | drm/i915/gt: Add dedicated MCR lock Signed-off-by: Matt Roper <matthew.d.roper@intel.com> ...msgid/20221128233014.4000136-4-matthew.d.roper@intel.com |
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| 2022-11-30 | Matt Roper | drm/i915/gt: Pass gt rather than uncore to lowest-level... Signed-off-by: Matt Roper <matthew.d.roper@intel.com> ...msgid/20221128233014.4000136-3-matthew.d.roper@intel.com |
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| 2022-11-30 | Matt Roper | drm/i915/gt: Correct kerneldoc for intel_gt_mcr_wait_for_reg() Signed-off-by: Matt Roper <matthew.d.roper@intel.com> ...msgid/20221128233014.4000136-2-matthew.d.roper@intel.com |
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| 2022-11-28 | Matt Atwood | drm/i915/dg2: Introduce Wa_18019271663 Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-11-28 | Matt Atwood | drm/i915/dg2: Introduce Wa_18018764978 Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-11-18 | Matt Roper | drm/i915/gt: Manage uncore->lock while waiting on MCR... Signed-off-by: Matt Roper <matthew.d.roper@intel.com> ...msgid/20221117173358.1980230-1-matthew.d.roper@intel.com |
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| 2022-11-18 | Matt Atwood | drm/i915/rpl-p: Add stepping info Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-11-01 | Wayne Boyer | drm/i915/dg2: Introduce Wa_18017747507 Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-10-29 | Matt Roper | drm/i915/mtl: Add missing steering table terminators Signed-off-by: Matt Roper <matthew.d.roper@intel.com> ...msgid/20221028224022.964997-1-matthew.d.roper@intel.com |
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| 2022-10-26 | Gustavo Sousa | drm/i915/xelp: Add Wa_1806527549 Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-10-21 | Matt Roper | drm/i915/xelpg: Fix write to MTL_MCR_SELECTOR Signed-off-by: Matt Roper <matthew.d.roper@intel.com> ...msgid/20221019222437.3035182-1-matthew.d.roper@intel.com |
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| 2022-10-18 | Matt Roper | drm/i915/pvc: Update forcewake domain for CCS register... Signed-off-by: Matt Roper <matthew.d.roper@intel.com> ...msgid/20221014233004.1053678-1-matthew.d.roper@intel.com |
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| 2022-10-17 | Matt Roper | drm/i915/xelpmp: Add multicast steering for media GT Signed-off-by: Matt Roper <matthew.d.roper@intel.com> ...msgid/20221014230239.1023689-15-matthew.d.roper@intel.com |
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| 2022-10-17 | Matt Roper | drm/i915/xelpg: Add multicast steering Signed-off-by: Matt Roper <matthew.d.roper@intel.com> ...msgid/20221014230239.1023689-14-matthew.d.roper@intel.com |
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| 2022-10-17 | Matt Roper | drm/i915: Define multicast registers as a new type Signed-off-by: Matt Roper <matthew.d.roper@intel.com> ...msgid/20221014230239.1023689-13-matthew.d.roper@intel.com |
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| 2022-10-17 | Matt Roper | drm/i915/gt: Add MCR-specific workaround initializers Signed-off-by: Matt Roper <matthew.d.roper@intel.com> ...msgid/20221014230239.1023689-12-matthew.d.roper@intel.com |
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| 2022-10-17 | Matt Roper | drm/i915/guc: Handle save/restore of MCR registers... Signed-off-by: Matt Roper <matthew.d.roper@intel.com> ...msgid/20221014230239.1023689-11-matthew.d.roper@intel.com |
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| 2022-10-17 | Matt Roper | drm/i915/gt: Always use MCR functions on multicast... Signed-off-by: Matt Roper <matthew.d.roper@intel.com> ...msgid/20221014230239.1023689-10-matthew.d.roper@intel.com |
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| 2022-10-17 | Matt Roper | drm/i915: Define MCR registers explicitly Signed-off-by: Matt Roper <matthew.d.roper@intel.com> ...msgid/20221014230239.1023689-9-matthew.d.roper@intel.com |
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| 2022-10-17 | Matt Roper | drm/i915/gt: Add intel_gt_mcr_wait_for_reg_fw() Signed-off-by: Matt Roper <matthew.d.roper@intel.com> ...msgid/20221014230239.1023689-8-matthew.d.roper@intel.com |
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| 2022-10-17 | Matt Roper | drm/i915/xehp: Check for faults on primary GAM Signed-off-by: Matt Roper <matthew.d.roper@intel.com> ...msgid/20221014230239.1023689-7-matthew.d.roper@intel.com |
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| 2022-10-17 | Matt Roper | drm/i915/gt: Add intel_gt_mcr_multicast_rmw() operation Signed-off-by: Matt Roper <matthew.d.roper@intel.com> ...msgid/20221014230239.1023689-6-matthew.d.roper@intel.com |
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| 2022-10-17 | Matt Roper | drm/i915/gt: Correct prefix on a few registers Signed-off-by: Matt Roper <matthew.d.roper@intel.com> ...msgid/20221014230239.1023689-5-matthew.d.roper@intel.com |
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| 2022-10-17 | Matt Roper | drm/i915/gt: Drop a few unused register definitions Signed-off-by: Matt Roper <matthew.d.roper@intel.com> ...msgid/20221014230239.1023689-4-matthew.d.roper@intel.com |
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| 2022-10-17 | Matt Roper | drm/i915/xehp: Create separate reg definitions for... Signed-off-by: Matt Roper <matthew.d.roper@intel.com> ...msgid/20221014230239.1023689-3-matthew.d.roper@intel.com |
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| 2022-10-17 | Matt Roper | drm/i915/gen8: Create separate reg definitions for... Signed-off-by: Matt Roper <matthew.d.roper@intel.com> ...msgid/20221014230239.1023689-2-matthew.d.roper@intel.com |
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| 2022-10-04 | Matt Roper | drm/i915: Document and future-proof preemption control... Signed-off-by: Matt Roper <matthew.d.roper@intel.com> ...msgid/20220907212410.22623-1-matthew.d.roper@intel.com |
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| 2022-09-30 | Aravind Iddamsetty | drm/i915/mtl: enable local stolen memory Cc: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-09-27 | Alan Previn | drm/i915/pxp: Add firmware status when ARB session... Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-09-27 | Chris Wilson | drm/i915/gt: Bump the reset-failure timeout to 60s Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-09-23 | Matt Atwood | drm/i915/dg2: introduce Wa_22015475538 Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-09-21 | Matt Roper | drm/i915: Split GAM and MSLICE steering Signed-off-by: Matt Roper <matthew.d.roper@intel.com> ...msgid/20220916014345.3317739-1-matthew.d.roper@intel.com |
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| 2022-09-19 | Matt Roper | drm/i915/mtl: Add MTL forcewake support Signed-off-by: Matt Roper <matthew.d.roper@intel.com> ...msgid/20220910001631.1986601-1-matthew.d.roper@intel.com |
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| 2022-09-16 | Tvrtko Ursulin | drm/i915: Handle all GTs on driver (un)load paths Signed-off-by: Matt Roper <matthew.d.roper@intel.com> ...msgid/20220915232654.3283095-5-matthew.d.roper@intel.com |
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| 2022-09-16 | Tvrtko Ursulin | drm/i915: Make GEM suspend all GTs Signed-off-by: Matt Roper <matthew.d.roper@intel.com> ...msgid/20220915232654.3283095-4-matthew.d.roper@intel.com |
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| 2022-09-16 | Tvrtko Ursulin | drm/i915: Make GEM resume all engines Signed-off-by: Matt Roper <matthew.d.roper@intel.com> ...msgid/20220915232654.3283095-3-matthew.d.roper@intel.com |
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| 2022-09-16 | Chris Wilson | drm/i915/gt: Cleanup partial engine discovery failures Signed-off-by: Matt Roper <matthew.d.roper@intel.com> ...msgid/20220915232654.3283095-2-matthew.d.roper@intel.com |
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| 2022-09-07 | Ankit Nautiyal | drm/i915/vdsc: Set VDSC PIC_HEIGHT before using for... Cc: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-08-30 | Matt Roper | drm/i915/ats-m: Add thread execution tuning setting Signed-off-by: Matt Roper <matthew.d.roper@intel.com> ...msgid/20220826212718.409948-1-matthew.d.roper@intel.com |
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| 2022-08-30 | Matt Roper | Revert "drm/i915/dg2: Add preemption changes for Wa_14015141709" Signed-off-by: Matt Roper <matthew.d.roper@intel.com> ...msgid/20220826210233.406482-1-matthew.d.roper@intel.com |
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| 2022-08-26 | Matt Roper | drm/i915/dg2: Incorporate Wa_16014892111 into DRAW_WATERMARK... Signed-off-by: Matt Roper <matthew.d.roper@intel.com> ...msgid/20220823202449.83727-1-matthew.d.roper@intel.com |
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| 2022-08-24 | Taylor, Clinton A | drm/i915/dg2: Add additional HDMI pixel clock frequencies Cc: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-08-17 | Matt Roper | drm/i915/dg2: Add additional tuning settings Signed-off-by: Matt Roper <matthew.d.roper@intel.com> ...msgid/20220816210601.2041572-2-matthew.d.roper@intel.com |
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| 2022-08-17 | Matt Roper | drm/i915/gt: Add dedicated function for non-ctx register... Signed-off-by: Matt Roper <matthew.d.roper@intel.com> ...msgid/20220816210601.2041572-1-matthew.d.roper@intel.com |
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| 2022-08-02 | Harish Chegondi | drm/i915/dg2: Add Wa_1509727124 Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-07-13 | Matt Roper | drm/i915: Correct ss -> steering calculation for pre... Signed-off-by: Matt Roper <matthew.d.roper@intel.com> ...msgid/20220712220513.3451794-1-matthew.d.roper@intel.com |
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| 2022-07-12 | Matt Roper | drm/i915: Add Wa_14016291713 Signed-off-by: Matt Roper <matthew.d.roper@intel.com> ...msgid/20220708215804.2889246-2-matthew.d.roper@intel.com |
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| 2022-07-12 | Matt Roper | drm/i915/dg2: Add Wa_15010599737 Signed-off-by: Matt Roper <matthew.d.roper@intel.com> ...msgid/20220708215804.2889246-1-matthew.d.roper@intel.com |
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| 2022-07-08 | Radhakrishna Sripada | drm/i915/mtl: Add MeteorLake PCI IDs Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-07-08 | Radhakrishna Sripada | drm/i915/mtl: Add MeteorLake platform info Cc: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-07-08 | Matt Roper | drm/i915/gt: Add general DSS steering iterator to intel_gt_mcr Signed-off-by: Matt Roper <matthew.d.roper@intel.com> ...msgid/20220701232006.1016135-1-matthew.d.roper@intel.com |
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| 2022-07-08 | Umesh Nerlige Ramappa | i915/perf: Disable OA sseu config param for gfx12.50+ Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-07-08 | Umesh Nerlige Ramappa | i915/perf: Replace DRM_DEBUG with driver specific drm_dbg... Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-07-01 | Tom Rix | drm/i915/display: clean up comments Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-07-01 | Niranjana Vishwanath... | drm/doc/rfc: VM_BIND uapi definition Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-07-01 | Niranjana Vishwanath... | drm/i915: Update i915 uapi documentation Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-07-01 | Niranjana Vishwanath... | drm/doc/rfc: VM_BIND feature design document Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-07-01 | Matt Roper | drm/i915: DG2 and ATS-M device ID updates Signed-off-by: Matt Roper <matthew.d.roper@intel.com> ...msgid/20220701152231.529511-2-matthew.d.roper@intel.com |
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| 2022-07-01 | Gustavo Sousa | drm/i915/pvc: Implement w/a 16016694945 Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-06-27 | Matt Roper | drm/i915: Prefer "XEHP_" prefix for registers Signed-off-by: Matt Roper <matthew.d.roper@intel.com> ...msgid/20220624210328.308630-2-matthew.d.roper@intel.com |
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| 2022-06-27 | Matt Roper | drm/i915: Correct duplicated/misplaced GT register... Signed-off-by: Matt Roper <matthew.d.roper@intel.com> ...msgid/20220624210328.308630-1-matthew.d.roper@intel.com |
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| 2022-06-17 | Matt Roper | drm/i915/gt: Cleanup interface for MCR operations Signed-off-by: Matt Roper <matthew.d.roper@intel.com> ...msgid/20220615001019.1821989-3-matthew.d.roper@intel.com |
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| 2022-06-17 | Matt Roper | drm/i915/gt: Move multicast register handling to a... Signed-off-by: Matt Roper <matthew.d.roper@intel.com> ...msgid/20220615001019.1821989-2-matthew.d.roper@intel.com |
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| 2022-06-15 | Matt Roper | drm/i915/pvc: Add recommended MMIO setting Signed-off-by: Matt Roper <matthew.d.roper@intel.com> ...msgid/20220613165314.862029-1-matthew.d.roper@intel.com |
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| 2022-06-14 | Matt Roper | drm/i915/pvc: Adjust EU per SS according to HAS_ONE_EU_PER_F... Signed-off-by: Matt Roper <matthew.d.roper@intel.com> ...msgid/20220610230801.459577-1-matthew.d.roper@intel.com |
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| 2022-06-09 | Matt Roper | drm/i915/pvc: Add register steering Signed-off-by: Matt Roper <matthew.d.roper@intel.com> ...msgid/20220608170700.4026648-1-matthew.d.roper@intel.com |
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| 2022-06-08 | Matt Roper | drm/i915/xehp: Correct steering initialization Signed-off-by: Matt Roper <matthew.d.roper@intel.com> ...msgid/20220607175716.3338661-1-matthew.d.roper@intel.com |
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| 2022-06-08 | Matt Roper | drm/i915: More PVC+DG2 workarounds Signed-off-by: Matt Roper <matthew.d.roper@intel.com> ...msgid/20220608005108.3717895-1-matthew.d.roper@intel.com |
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| 2022-06-08 | Matt Roper | drm/i915/dg2: Correct DSS check for Wa_1308578152 Signed-off-by: Matt Roper <matthew.d.roper@intel.com> ...msgid/20220607154724.3155521-1-matthew.d.roper@intel.com |
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| 2022-06-07 | Anshuman Gupta | drm/i915/dg2: Add Wa_14015795083 Cc: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-06-03 | Matt Roper | drm/i915/pvc: GuC depriv applies to PVC Signed-off-by: Matt Roper <matthew.d.roper@intel.com> ...msgid/20220602233019.1659283-1-matthew.d.roper@intel.com |
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| 2022-06-03 | Balasubramani Viveka... | drm/i915/display/adlp: More updates to voltage swing... Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-06-02 | Stuart Summers | drm/i915: Add extra registers to GPU error dump Signed-off-by: Matt Roper <matthew.d.roper@intel.com> ...msgid/20220601210646.615946-1-matthew.d.roper@intel.com |
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| 2022-06-02 | Matt Roper | drm/i915/pvc: Add SSEU changes Signed-off-by: Matt Roper <matthew.d.roper@intel.com> ...msgid/20220601150725.521468-7-matthew.d.roper@intel.com |
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| 2022-06-02 | Matt Roper | drm/i915/sseu: Disassociate internal subslice mask... Signed-off-by: Matt Roper <matthew.d.roper@intel.com> ...msgid/20220601150725.521468-6-matthew.d.roper@intel.com |
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| 2022-06-02 | Matt Roper | drm/i915/sseu: Don't try to store EU mask internally... Signed-off-by: Matt Roper <matthew.d.roper@intel.com> ...msgid/20220601150725.521468-5-matthew.d.roper@intel.com |
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| 2022-06-02 | Matt Roper | drm/i915/sseu: Simplify gen11+ SSEU handling Signed-off-by: Matt Roper <matthew.d.roper@intel.com> ...msgid/20220601150725.521468-4-matthew.d.roper@intel.com |
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| 2022-06-02 | Matt Roper | drm/i915/xehp: Drop GETPARAM lookups of I915_PARAM_... Signed-off-by: Matt Roper <matthew.d.roper@intel.com> ...msgid/20220601150725.521468-3-matthew.d.roper@intel.com |
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| 2022-06-02 | Matt Roper | drm/i915/xehp: Use separate sseu init function Signed-off-by: Matt Roper <matthew.d.roper@intel.com> ...msgid/20220601150725.521468-2-matthew.d.roper@intel.com |
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| 2022-05-31 | Stuart Summers | drm/i915/pvc: Add initial PVC workarounds Signed-off-by: Matt Roper <matthew.d.roper@intel.com> ...msgid/20220527163348.1936146-3-matthew.d.roper@intel.com |
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| 2022-05-31 | Matt Roper | drm/i915/pvc: Extract stepping information from PCI... Signed-off-by: Matt Roper <matthew.d.roper@intel.com> ...msgid/20220527163348.1936146-2-matthew.d.roper@intel.com |
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| 2022-05-27 | Balasubramani Viveka... | drm/i915/display/adl_p: Updates to HDMI combo PHY voltage... Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-05-25 | Matt Roper | drm/i915/hwconfig: Future-proof platform checks Signed-off-by: Matt Roper <matthew.d.roper@intel.com> ...msgid/20220524235906.529771-1-matthew.d.roper@intel.com |
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| 2022-05-25 | Vandita Kulkarni | drm/i915/dg2: Support 4k@30 on HDMI Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-05-24 | Balasubramani Viveka... | drm/i915/hwconfig: Report no hwconfig support on ADL-N Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| 2022-05-24 | Daniele Ceraolo... | drm/i915/guc: XEHPSDV and PVC do not use HuC Signed-off-by: Matt Roper <matthew.d.roper@intel.com> ...msgid/20220511060228.1179450-6-matthew.d.roper@intel.com |
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| 2022-05-24 | Matt Roper | drm/i915/pvc: Add new BCS engines to GuC engine list Signed-off-by: Matt Roper <matthew.d.roper@intel.com> ...msgid/20220511060228.1179450-5-matthew.d.roper@intel.com |
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| 2022-05-24 | Stuart Summers | drm/i915/pvc: Remove additional 3D flags from PIPE_CONTROL Signed-off-by: Matt Roper <matthew.d.roper@intel.com> ...msgid/20220511060228.1179450-4-matthew.d.roper@intel.com |
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