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2020-01-03	Zong Li	riscv: gcov: enable gcov for RISC-V Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2020-01-03	Zong Li	riscv: mm: use __pa_symbol for kernel symbols Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-12-28	Olof Johansson	riscv: export flush_icache_all to modules Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-12-28	David Abdurachmanov	riscv: reject invalid syscalls below -1 Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-12-28	Luc Van Oostenryck	riscv: fix compile failure with EXPORT_SYMBOL() & !MMU Cc: Paul Walmsley <paul.walmsley@sifive.com> Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-12-20	Christoph Hellwig	riscv: move sifive_l2_cache.c to drivers/soc Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-12-20	David Abdurachmanov	riscv: define vmemmap before pfn_to_page calls Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-12-20	Greentime Hu	riscv: fix scratch register clearing in M-mode. Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-12-20	Andreas Schwab	riscv: Fix use of undefined config option CONFIG_CONFIG_MMU Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-12-09	Kefeng Wang	riscv: only select serial sifive if TTY is enabled Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-12-09	Olof Johansson	riscv: Fix build dependency for loader Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-11-23	Paul Walmsley	Merge branch 'next/defconfig-add-debug' into for-next	commit \| commitdiff \| tree
2019-11-23	Paul Walmsley	Merge branch 'next/misc2' into for-next	commit \| commitdiff \| tree
2019-11-23	Paul Walmsley	Merge branch 'next/nommu' into for-next	commit \| commitdiff \| tree
2019-11-23	Paul Walmsley	Merge branch 'next/misc' into for-next	commit \| commitdiff \| tree
2019-11-23	Paul Walmsley	Merge branch 'next/tlb-opt' into for-next	commit \| commitdiff \| tree
2019-11-23	Paul Walmsley	Merge branch 'next/isa-string' into for-next	commit \| commitdiff \| tree
2019-11-23	Paul Walmsley	Merge branch 'next/seccomp' into for-next	commit \| commitdiff \| tree
2019-11-23	Yash Shah	RISC-V: Add address map dumper Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-11-23	Paul Walmsley	riscv: defconfigs: enable more debugging options Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-11-22	Paul Walmsley	riscv: defconfigs: enable debugfs Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-11-21	Krzysztof Kozlowski	riscv: Fix Kconfig indentation Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-11-17	Christoph Hellwig	riscv: provide a flat image loader Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-11-17	Christoph Hellwig	riscv: add nommu support Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-11-17	Christoph Hellwig	riscv: clear the instruction cache and all registers... Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-11-17	Damien Le Moal	riscv: read the hart ID from mhartid on boot Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-11-17	Christoph Hellwig	riscv: provide native clint access for M-mode Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-11-15	Green Wan	riscv: dts: add support for PDMA device of HiFive Unleashed... Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-11-13	Christoph Hellwig	riscv: add support for MMIO access to the timer registers Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-11-13	Christoph Hellwig	riscv: implement remote sfence.i using IPIs Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-11-13	Christoph Hellwig	riscv: cleanup the default power off implementation Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-11-13	Christoph Hellwig	riscv: poison SBI calls for M-mode Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-11-13	Damien Le Moal	riscv: don't allow selecting SBI based drivers for... Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-11-12	Atish Patra	RISC-V: Add multiple compression image format. Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-11-12	Zong Li	riscv: clean up the macro format in each header file Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-11-12	Zong Li	riscv: Use PMD_SIZE to replace PTE_PARENT_SIZE Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-11-05	Christoph Hellwig	riscv: abstract out CSR names for supervisor vs machine... and Paul Walmsley <paul.walmsley@sifive.com>. Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-11-05	Paul Walmsley	riscv: separate MMIO functions into their own header... Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-11-05	Christoph Hellwig	riscv: enter WFI in default_power_off() if SBI does... Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-10-30	Palmer Dabbelt	MAINTAINERS: Change to my personal email address Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-10-29	Atish Patra	RISC-V: Issue a tlb page flush if possible Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-10-29	Atish Patra	RISC-V: Issue a local tlbflush if possible. Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-10-29	Atish Patra	RISC-V: Do not invoke SBI call if cpumask is empty Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-10-29	David Abdurachmanov	riscv: add support for SECCOMP and SECCOMP_FILTER Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-10-28	Atish Patra	RISC-V: Remove unsupported isa string info print Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-10-28	Yash Shah	RISC-V: Add PCIe I/O BAR memory mapping Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-10-28	Paul Walmsley	riscv: for C functions called only from assembly, mark... Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-10-28	Paul Walmsley	riscv: fp: add missing __user pointer annotations Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-10-28	Paul Walmsley	riscv: add missing header file includes Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-10-28	Paul Walmsley	riscv: mark some code and data as file-static Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-10-28	Paul Walmsley	riscv: init: merge split string literals in preprocessor... Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-10-28	Paul Walmsley	riscv: add prototypes for assembly language functions... Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-10-25	Christoph Hellwig	riscv: cleanup do_trap_break Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-10-23	Christoph Hellwig	riscv: cleanup <asm/bug.h> Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-10-23	Kefeng Wang	riscv: Fix undefined reference to vmemmap_populate_basepages Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-10-23	Kefeng Wang	riscv: Fix implicit declaration of 'page_to_section' Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-10-23	David Abdurachmanov	riscv: fix fs/proc/kcore.c compilation with sparsemem... Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-10-16	Greentime Hu	RISC-V: fix virtual address overlapped in FIXADDR_START... Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-10-14	Paul Walmsley	riscv: tlbflush: remove confusing comment on local_flush_tlb... Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-10-14	Paul Walmsley	riscv: dts: HiFive Unleashed: add default chosen/stdout... Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-10-14	Vincent Chen	riscv: remove the switch statement in do_trap_break() Suggested-by: Paul Walmsley <paul.walmsley@sifive.com> Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-10-09	Valentin Schneider	RISC-V: entry: Remove unneeded need_resched() loop Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-10-07	Vincent Chen	riscv: Correct the handling of unexpected ebreak in... Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-10-07	Vincent Chen	riscv: avoid sending a SIGTRAP to a user thread trapped... Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-10-07	Vincent Chen	riscv: avoid kernel hangs when trapped in BUG() Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-10-01	Albert Ou	riscv: Fix memblock reservation for device tree blob Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-10-01	Palmer Dabbelt	RISC-V: Clear load reservations while restoring hart... Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-09-20	Vincent Chen	riscv: Avoid interrupts being erroneously enabled in... Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-09-20	Bin Meng	riscv: dts: sifive: Drop "clock-frequency" property... Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-09-20	Bin Meng	riscv: dts: sifive: Add ethernet0 to the aliases node Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-09-20	Atish Patra	RISC-V: Export kernel symbols for kvm Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-09-20	Anup Patel	KVM: RISC-V: Add KVM_REG_RISCV for ONE_REG interface Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-09-20	Xiang Wang	arch/riscv: disable excess harts before picking main... Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-09-19	Anup Patel	RISC-V: Enable VIRTIO drivers in RV64 and RV32 defconfig Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-09-19	Greentime Hu	RISC-V: Fix building error when CONFIG_SPARSEMEM_MANUAL=y Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-09-19	Yash Shah	riscv: dts: Add DT support for SiFive FU540 PWM driver Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-09-14	Paul Walmsley	riscv: modify the Image header to improve compatibility... Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-09-05	Christoph Hellwig	irqchip/sifive-plic: set max threshold for ignored... Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-09-05	Christoph Hellwig	riscv: move the TLB flush logic out of line Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-09-05	Christoph Hellwig	riscv: don't use the rdtime(h) pseudo-instructions Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-09-05	Christoph Hellwig	riscv: cleanup riscv_cpuid_to_hartid_mask Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-09-05	Christoph Hellwig	riscv: optimize send_ipi_single Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-09-05	Christoph Hellwig	riscv: cleanup send_ipi_mask Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-09-05	Christoph Hellwig	riscv: refactor the IPI code Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-09-05	Mao Han	riscv: Add support for libdw Cc: Paul Walmsley <paul.walmsley@sifive.com> Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-09-05	Mao Han	riscv: Add support for perf registers sampling Cc: Paul Walmsley <paul.walmsley@sifive.com> Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-09-04	Mao Han	riscv: Add perf callchain support Cc: Paul Walmsley <paul.walmsley@sifive.com> Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-08-31	Masahiro Yamada	riscv: add arch/riscv/Kbuild Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-08-30	Logan Gunthorpe	RISC-V: Implement sparsemem Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-08-30	Bin Meng	riscv: Using CSR numbers to access CSRs Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-08-30	Paul Walmsley	Merge tag 'common/for-v5.4-rc1/cpu-topology' into for...	commit \| commitdiff \| tree
2019-08-28	Anup Patel	RISC-V: Fix FIXMAP area corruption on RV32 systems Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-08-14	Vincent Chen	riscv: Make __fstate_clean() work correctly. Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-08-14	Vincent Chen	riscv: Correct the initialized flow of FP register Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-08-14	Alistair Francis	riscv: defconfig: Update the defconfig Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-08-14	Alistair Francis	riscv: rv32_defconfig: Update the defconfig Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-08-13	Paul Walmsley	riscv: fix flush_tlb_range() end address for flush_tlb_page() Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-08-08	Paul Walmsley	dt-bindings: riscv: fix the schema compatible string... Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-08-08	Paul Walmsley	dt-bindings: riscv: remove obsolete cpus.txt Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
2019-08-08	Palmer Dabbelt	RISC-V: Remove udivdi3 Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>	commit \| commitdiff \| tree
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