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Merge tag 'irq-urgent-2021-05-15' of git://git.kernel.org/pub/scm/linux/kernel/git...
2021-05-12
Ville Syrjälä
drm/i915: Read C0DRB3/C1DRB3 as 16 bits again
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2021-05-12
Ville Syrjälä
drm/i915: Avoid div-by-zero on gen2
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2021-04-26
Ville Syrjälä
drm/i915: Disable LTTPR detection on GLK once again
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2021-04-26
Ville Syrjälä
drm/i915: Restore lost glk ccs w/a
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2021-04-26
Ville Syrjälä
drm/i915: Restore lost glk FBC 16bpp w/a
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2021-04-12
Ville Syrjälä
drm/i915: Don't zero out the Y plane's watermarks
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2021-04-01
Ville Syrjälä
drm/vblank: Do not store a new vblank timestamp in...
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2021-04-01
Ville Syrjälä
drm: Refuse to create zero width/height cmdline modes
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2021-03-29
Ville Syrjälä
drm/i915: Stop adding planes to the commit needlessly
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2021-03-26
Ville Syrjälä
drm/i915: Fix transposed arguments to skl_plane_wm_level()
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2021-03-23
Ville Syrjälä
drm/i915: Fix enabled_planes bitmask
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2021-03-22
Ville Syrjälä
drm/i915: Fix enabled_planes bitmask
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2021-03-19
Ville Syrjälä
drm/i915: Give g4x_{dp,hdmi}.c g4x_ namespace
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2021-03-19
Ville Syrjälä
drm/i915: Introduce g4x_hdmi.c
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2021-03-19
Ville Syrjälä
drm/i915: Introduce g4x_dp.c
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2021-03-19
Ville Syrjälä
drm/i915: Split intel_ddi_encoder_reset() from intel_dp_enco...
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2021-03-19
Ville Syrjälä
drm/i915: Relocate intel_dp_program_link_training_pattern()
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2021-03-19
Ville Syrjälä
drm/i915: Remove dead signal level debugs
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2021-03-19
Ville Syrjälä
drm/i915: Remove dead TPS3->TPS2 fallback code
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2021-03-17
Ville Syrjälä
drm/i915: Workaround async flip + VT-d corruption on...
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2021-03-12
Ville Syrjälä
drm/i915: s/plane_res_b/blocks/ etc.
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2021-03-12
Ville Syrjälä
drm/i915: Extract skl_check_wm_level() and skl_check_nv12_wm...
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2021-03-12
Ville Syrjälä
drm/i915: Calculate min_ddb_alloc for trans_wm
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2021-03-12
Ville Syrjälä
drm/i915: Check SAGV wm min_ddb_alloc rather than plane_res_b
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2021-03-12
Ville Syrjälä
drm/i915: Tighten SAGV constraint for pre-tgl
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2021-03-12
Ville Syrjälä
drm/i915: Workaround async flip + VT-d corruption on...
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2021-03-11
Ville Syrjälä
drm/i915: Tolerate bogus DPLL selection
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2021-03-08
Ville Syrjälä
drm/i915: Extend icl_sanitize_encoder_pll_mapping(...
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2021-03-08
Ville Syrjälä
drm/i915: Add encoder->is_clock_enabled()
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2021-03-08
Ville Syrjälä
drm/i915: Move DDI clock readout to encoder->get_config()
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2021-03-08
Ville Syrjälä
drm/i915: Use pipes instead crtc indices in PLL state...
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2021-03-08
Ville Syrjälä
drm/i915: Do intel_dpll_readout_hw_state() after encoder...
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2021-03-08
Ville Syrjälä
drm/i915: Call primary encoder's .get_config() from...
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2021-03-05
Ville Syrjälä
drm/i915: Fix DSI TE max_vblank_count handling
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2021-03-05
Ville Syrjälä
drm/i915: Return zero as the scanline counter for disabled...
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2021-03-05
Ville Syrjälä
drm/i915: Don't try to query the frame counter for...
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2021-03-05
Ville Syrjälä
drm/i915: Move pipe enable/disable tracepoints to intel_crtc...
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2021-03-03
Ville Syrjälä
drm/i915: Clean up verify_wm_state()
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2021-03-03
Ville Syrjälä
drm/i915: Check tgl+ SAGV watermarks properly
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2021-03-03
Ville Syrjälä
drm/i915: Introduce SAGV transtion watermark
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2021-03-03
Ville Syrjälä
drm/i915: Stuff SAGV watermark into a sub-structure
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2021-03-03
Ville Syrjälä
drm/i915: Print wm changes if sagv_wm0 changes
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2021-03-03
Ville Syrjälä
drm/i915: Zero out SAGV wm when we don't have enough...
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2021-03-03
Ville Syrjälä
drm/i915: Fix TGL+ plane SAGV watermark programming
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2021-03-03
Ville Syrjälä
drm/i915: Readout conn_state->max_bpc
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2021-02-23
Ville Syrjälä
drm/i915: Nuke INTEL_OUTPUT_FORMAT_INVALID
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2021-02-18
Ville Syrjälä
drm/i915: Wait for scanout to stop when sanitizing...
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2021-02-18
Ville Syrjälä
drm/i915: Nuke INTEL_OUTPUT_FORMAT_INVALID
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2021-02-17
Ville Syrjälä
drm/i915: Disallow plane x+w>stride on ilk+ with X...
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2021-02-16
Ville Syrjälä
drm/i915: s/dev_priv/i915/ for the remainder of DDI...
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2021-02-16
Ville Syrjälä
drm/i915: Relocate icl_sanitize_encoder_pll_mapping()
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2021-02-16
Ville Syrjälä
drm/i915: Use .disable_clock() for pll sanitation
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2021-02-16
Ville Syrjälä
drm/i915: Split adl-s/rkl from icl_ddi_combo_{enable...
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2021-02-16
Ville Syrjälä
drm/i915: Extract _cnl_ddi_{enable,disable}_clock()
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2021-02-16
Ville Syrjälä
drm/i915: Sprinkle WARN(!pll) into icl/dg1 .clock_enable()
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2021-02-16
Ville Syrjälä
drm/i915: Sprinkle a few missing locks around shared...
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2021-02-16
Ville Syrjälä
drm/i915: Use intel_de_rmw() for DDI clock routing
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2021-02-16
Ville Syrjälä
drm/i915: Extract icl+ .{enable,disable}_clock() vfuncs
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2021-02-16
Ville Syrjälä
drm/i915: Convert DG1 over to .{enable,disable}_clock()
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2021-02-16
Ville Syrjälä
drm/i195: Extract cnl_ddi_{enable,disable}_clock()
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2021-02-16
Ville Syrjälä
drm/i915: Extract skl_ddi_{enable,disable}_clock()
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2021-02-16
Ville Syrjälä
drm/i915: Extract hsw_ddi_{enable,disable}_clock()
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2021-02-16
Ville Syrjälä
drm/i915: Introduce .{enable,disable}_clock() encoder...
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2021-02-16
Ville Syrjälä
drm/i915: Use intel_ddi_clk_select() for FDI
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2021-02-10
Ville Syrjälä
drm/i915: Fix overlay frontbuffer tracking
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2021-02-09
Ville Syrjälä
drm/i915: Warn when releasing a frontbuffer while in use
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2021-02-09
Ville Syrjälä
drm/i915: Fix overlay frontbuffer tracking
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2021-02-09
Ville Syrjälä
drm/i915: Disallow plane x+w>stride on ilk+ with X...
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2021-02-08
Ville Syrjälä
drm/i915: Reject 446-480MHz HDMI clock on GLK
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2021-02-05
Ville Syrjälä
drm/i915: Use intel_hdmi_port_clock() more
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2021-02-05
Ville Syrjälä
drm/i915: Index min_{cdclk,voltage_level}[] with pipe
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2021-02-05
Ville Syrjälä
drm/i915: Reject 446-480MHz HDMI clock on GLK
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2021-02-02
Ville Syrjälä
drm/i915: Power up combo PHY lanes for for HDMI as...
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2021-02-02
Ville Syrjälä
drm/i915: Extract intel_ddi_power_up_lanes()
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2021-02-02
Ville Syrjälä
drm/i915: Skip vswing programming for TBT
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2021-01-29
Ville Syrjälä
drm/i915: Don't check tc_mode unless dealing with a...
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2021-01-29
Ville Syrjälä
drm/i915: Move HDMI vswing programming to the right...
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2021-01-29
Ville Syrjälä
drm/i915: Power up combo PHY lanes for for HDMI as...
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2021-01-29
Ville Syrjälä
drm/i915: Extract intel_ddi_power_up_lanes()
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2021-01-29
Ville Syrjälä
drm/i915: Skip vswing programming for TBT
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2021-01-29
Ville Syrjälä
drm/i915: Implement async flips for vlv/chv
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2021-01-29
Ville Syrjälä
drm/i915: Implement async flip for ilk/snb
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2021-01-29
Ville Syrjälä
drm/i915: Implement async flip for ivb/hsw
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2021-01-29
Ville Syrjälä
drm/i915: Implement async flips for bdw
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2021-01-29
Ville Syrjälä
drm/i915: Limit plane stride to below TILEOFF.x limit
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2021-01-27
Ville Syrjälä
drm/i915: WARN if plane src coords are too big
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2021-01-26
Ville Syrjälä
drm/i915: Fix ICL MG PHY vswing handling
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2021-01-26
Ville Syrjälä
drm/i915: Do a bit more initial readout for dbuf
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2021-01-26
Ville Syrjälä
drm/i915: Encapsulate dbuf state handling harder
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2021-01-26
Ville Syrjälä
drm/i915: Extract intel_crtc_dbuf_weights()
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2021-01-26
Ville Syrjälä
drm/i915: Add pipe ddb entries into the dbuf state
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2021-01-26
Ville Syrjälä
drm/i915: Introduce skl_ddb_entry_for_slices()
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2021-01-26
Ville Syrjälä
drm/i915: Introduce intel_dbuf_slice_size()
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2021-01-26
Ville Syrjälä
drm/i915: Pass the crtc to skl_compute_dbuf_slices()
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2021-01-26
Ville Syrjälä
drm/i915: Extract intel_crtc_ddb_weight()
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2021-01-25
Ville Syrjälä
drm/i915: Fix vblank evasion with vrr
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2021-01-25
Ville Syrjälä
drm/i915: Fix vblank timestamps with VRR
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2021-01-25
Ville Syrjälä
drm/i915: Add vrr state dump
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2021-01-25
Ville Syrjälä
drm/i915/display: Helpers for VRR vblank min and max...
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2021-01-25
Ville Syrjälä
drm/i915: Rename VRR_CTL reg fields
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