From cde3894904cf7820e8518f9df716ba50e91513fd Mon Sep 17 00:00:00 2001 From: Pratik Vishwakarma Date: Wed, 4 Feb 2026 02:30:42 +0000 Subject: [PATCH] drm/amd/smu: Fix User mode stable P-states SMU15 SMU 15_0_0 exports only soft limits for CLKs Use correct messages Signed-off-by: Pratik Vishwakarma Acked-by: Alex Deucher Signed-off-by: Alex Deucher --- .../gpu/drm/amd/pm/swsmu/smu15/smu_v15_0_0_ppt.c | 15 +++++---------- 1 file changed, 5 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu15/smu_v15_0_0_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu15/smu_v15_0_0_ppt.c index 72a78fc5c827..4dc8f0095713 100644 --- a/drivers/gpu/drm/amd/pm/swsmu/smu15/smu_v15_0_0_ppt.c +++ b/drivers/gpu/drm/amd/pm/swsmu/smu15/smu_v15_0_0_ppt.c @@ -1026,26 +1026,21 @@ static int smu_v15_0_0_set_soft_freq_limited_range(struct smu_context *smu, switch (clk_type) { case SMU_GFXCLK: case SMU_SCLK: - msg_set_min = SMU_MSG_SetHardMinGfxClk; + msg_set_min = SMU_MSG_SetSoftMinGfxclk; msg_set_max = SMU_MSG_SetSoftMaxGfxClk; break; case SMU_FCLK: - msg_set_min = SMU_MSG_SetHardMinFclkByFreq; + msg_set_min = SMU_MSG_SetSoftMinFclk; msg_set_max = SMU_MSG_SetSoftMaxFclkByFreq; break; case SMU_SOCCLK: - msg_set_min = SMU_MSG_SetHardMinSocclkByFreq; + msg_set_min = SMU_MSG_SetSoftMinSocclkByFreq; msg_set_max = SMU_MSG_SetSoftMaxSocclkByFreq; break; case SMU_VCLK: case SMU_DCLK: - msg_set_min = SMU_MSG_SetHardMinVcn0; - msg_set_max = SMU_MSG_SetSoftMaxVcn0; - break; - case SMU_VCLK1: - case SMU_DCLK1: - msg_set_min = SMU_MSG_SetHardMinVcn1; - msg_set_max = SMU_MSG_SetSoftMaxVcn1; + msg_set_min = SMU_MSG_SetSoftMinVcn; + msg_set_max = SMU_MSG_SetSoftMaxVcn; break; default: return -EINVAL; -- 2.30.2