From c2a9f16bc990593f11c53ff547ccdf00d066d348 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Ville=20Syrj=C3=A4l=C3=A4?= Date: Fri, 10 Apr 2026 18:04:46 +0300 Subject: [PATCH] drm/i915: Reject tile4 BIOS FB MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit There is no such thing as tile4 fenced region, so there is no way to have a linear view of the tile4 framebuffer for the CPU. Thus we should never encounter a tile4 BIOS FB, but if we somehow do, then reject it. Signed-off-by: Ville Syrjälä Link: https://patch.msgid.link/20260410150449.9699-8-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula --- drivers/gpu/drm/i915/display/intel_initial_plane.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_initial_plane.c b/drivers/gpu/drm/i915/display/intel_initial_plane.c index 4f1591b55752..5a5adf738d4a 100644 --- a/drivers/gpu/drm/i915/display/intel_initial_plane.c +++ b/drivers/gpu/drm/i915/display/intel_initial_plane.c @@ -81,7 +81,6 @@ intel_alloc_initial_plane_obj(struct intel_display *display, case DRM_FORMAT_MOD_LINEAR: case I915_FORMAT_MOD_X_TILED: case I915_FORMAT_MOD_Y_TILED: - case I915_FORMAT_MOD_4_TILED: break; default: drm_dbg_kms(display->drm, "Unsupported modifier for initial FB: 0x%llx\n", -- 2.30.2