From 78aad33088dd7fc3e222d387a272b2e50dec3fb9 Mon Sep 17 00:00:00 2001 From: Taimur Hassan Date: Fri, 27 Feb 2026 17:40:05 -0500 Subject: [PATCH] drm/amd/display: Promote DC to 3.2.373 This version brings along the following updates: - [FW Promotion] Release 0.1.50.0 - Sync DCN42 with DC 3.2.373 - Add DML support for dcn42 - Enable dcn42 DC clk_mgr - Clean up unused code - Add back missing memory type in array - Fix compile warnings in dml2_0 - Check for S0i3 to be done before DCCG init on DCN21 - Add documentation and cleanup DMUB HW lock manager - Add new types to replay config - Fix HWSS v3 fast path determination - Add missing DCCG register entries for DCN20-DCN316 - Add ESD detection for replay recovery - Update underflow detection - Add COLOR_ENCODING/COLOR_RANGE to overlay planes - Add NV12/P010 formats to primary plane - Set chroma taps to 1 if luma taps are 1 - Add min clock init for DML21 mode programming - Return early from vesa replay enable function - Clean up NULL pointer warnings in dml2 Acked-by: Aurabindo Pillai Signed-off-by: Taimur Hassan Signed-off-by: Alex Hung Tested-by: Dan Wheeler Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/display/dc/dc.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h index 8c49f8083475..c7a09724f569 100644 --- a/drivers/gpu/drm/amd/display/dc/dc.h +++ b/drivers/gpu/drm/amd/display/dc/dc.h @@ -63,7 +63,7 @@ struct dcn_dsc_reg_state; struct dcn_optc_reg_state; struct dcn_dccg_reg_state; -#define DC_VER "3.2.372" +#define DC_VER "3.2.373" /** * MAX_SURFACES - representative of the upper bound of surfaces that can be piped to a single CRTC -- 2.30.2