From 6863d60732acf57c86e70558640ae357a83bce0f Mon Sep 17 00:00:00 2001 From: Andrey Grodzovsky Date: Wed, 4 Mar 2020 13:07:00 -0500 Subject: [PATCH] drm/amdgpu: Wrap clflush_cache_range with x86 ifdef To avoid compile errors on other platforms. Signed-off-by: Andrey Grodzovsky Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c index cff0fd27762e..3836acc2e95e 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c @@ -1883,8 +1883,15 @@ static ssize_t psp_usbc_pd_fw_sysfs_write(struct device *dev, memcpy_toio(cpu_addr, usbc_pd_fw->data, usbc_pd_fw->size); - /*TODO Remove once PSP starts snooping CPU cache */ + /* + * x86 specific workaround. + * Without it the buffer is invisible in PSP. + * + * TODO Remove once PSP starts snooping CPU cache + */ +#ifdef CONFIG_X86 clflush_cache_range(cpu_addr, (usbc_pd_fw->size & ~(L1_CACHE_BYTES - 1))); +#endif mutex_lock(&adev->psp.mutex); ret = psp_load_usbc_pd_fw(&adev->psp, dma_addr); -- 2.20.1