From 460d74a0911c562f56148519a2467271271a73aa Mon Sep 17 00:00:00 2001 From: Andy Teng Date: Wed, 19 Aug 2020 16:43:40 +0800 Subject: [PATCH] scsi: ufs: ufs-mediatek: Modify the minimum RX/TX lane count to 2 MediaTek UFS host now supports 2 lanes. Modify the lane count to 2. This modification shall not impact old 1-lane host because PA_CONNECTEDRXDATALANES and PA_CONNECTEDTXDATALANES will limit the target lanes properly during power mode change. So we could relax the limitation in ufs_dev_params. Link: https://lore.kernel.org/r/20200819084340.7021-1-stanley.chu@mediatek.com Reviewed-by: Stanley Chu Reviewed-by: Avri Altman Signed-off-by: Andy Teng Signed-off-by: Stanley Chu Signed-off-by: Martin K. Petersen --- drivers/scsi/ufs/ufs-mediatek.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/scsi/ufs/ufs-mediatek.h b/drivers/scsi/ufs/ufs-mediatek.h index 8ed24d5fcff9..87657376d27a 100644 --- a/drivers/scsi/ufs/ufs-mediatek.h +++ b/drivers/scsi/ufs/ufs-mediatek.h @@ -33,8 +33,8 @@ /* * Vendor specific pre-defined parameters */ -#define UFS_MTK_LIMIT_NUM_LANES_RX 1 -#define UFS_MTK_LIMIT_NUM_LANES_TX 1 +#define UFS_MTK_LIMIT_NUM_LANES_RX 2 +#define UFS_MTK_LIMIT_NUM_LANES_TX 2 #define UFS_MTK_LIMIT_HSGEAR_RX UFS_HS_G3 #define UFS_MTK_LIMIT_HSGEAR_TX UFS_HS_G3 #define UFS_MTK_LIMIT_PWMGEAR_RX UFS_PWM_G4 -- 2.20.1