From 35090321a297942a2817e1dc2eaf0c25009fb4b0 Mon Sep 17 00:00:00 2001 From: Rasmus Villemoes Date: Wed, 3 Jan 2018 16:45:45 +0100 Subject: [PATCH] ARM: dts: ls1021a: add nodes for on-chip ram Although the two nodes constitute one contiguous 128K region, still describe them separately: - That's how they are described in the reference manual: "Each OCRAM occupies a 64 KB of address region...", and the names ocram1 and ocram2 are also as used in the manual. - The two areas are treated differently by the boot ROM code: OCRAM2 is zero-initialized, while, again quoting the RM, "software must perform the zero initialization of OCRAM1." Signed-off-by: Rasmus Villemoes Signed-off-by: Shawn Guo --- arch/arm/boot/dts/ls1021a.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi index c31dad98f989..fbd2897566c3 100644 --- a/arch/arm/boot/dts/ls1021a.dtsi +++ b/arch/arm/boot/dts/ls1021a.dtsi @@ -788,5 +788,21 @@ clock-names = "ipg", "per"; big-endian; }; + + ocram1: sram@10000000 { + compatible = "mmio-sram"; + reg = <0x0 0x10000000 0x0 0x10000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x0 0x10000000 0x10000>; + }; + + ocram2: sram@10010000 { + compatible = "mmio-sram"; + reg = <0x0 0x10010000 0x0 0x10000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x0 0x10010000 0x10000>; + }; }; }; -- 2.20.1