From 2b8ddf6b820080649176c5695422548114b03f91 Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Fri, 9 Dec 2022 18:48:53 +0200 Subject: [PATCH] clk: qcom: smd-rpm: rename the qcm2290 rf_clk3 clocks Rename the qcm2290_rf_clk3 clocks adding 38m4 prefix to distinguish it from the common (19.2 MHz) rf_clk3. The system (and userspace) name of these clocks remains intact. Reviewed-by: Konrad Dybcio Reviewed-by: Alex Elder Signed-off-by: Dmitry Baryshkov Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20221209164855.128798-18-dmitry.baryshkov@linaro.org --- drivers/clk/qcom/clk-smd-rpm.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/drivers/clk/qcom/clk-smd-rpm.c b/drivers/clk/qcom/clk-smd-rpm.c index 8963ade901ea..4db92d2d91b8 100644 --- a/drivers/clk/qcom/clk-smd-rpm.c +++ b/drivers/clk/qcom/clk-smd-rpm.c @@ -133,6 +133,12 @@ QCOM_SMD_RPM_CLK_BUF_A, r_id, r, \ QCOM_RPM_KEY_SOFTWARE_ENABLE) +#define DEFINE_CLK_SMD_RPM_XO_BUFFER_PREFIX(_platform, _prefix, _name, r_id, r) \ + __DEFINE_CLK_SMD_RPM_BRANCH_PREFIX(_platform, _prefix, \ + _name, _name##_a, \ + QCOM_SMD_RPM_CLK_BUF_A, r_id, r, \ + QCOM_RPM_KEY_SOFTWARE_ENABLE) + #define DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(_platform, _name, r_id, r) \ DEFINE_CLK_SMD_RPM_XO_BUFFER(_platform, _name, r_id, r); \ __DEFINE_CLK_SMD_RPM_BRANCH(_platform, _name##_pin, \ @@ -480,7 +486,7 @@ DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8916, rf_clk2, 5, 19200000); DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8998, rf_clk3, 6, 19200000); DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(qcs404, ln_bb_clk, 8, 19200000); -DEFINE_CLK_SMD_RPM_XO_BUFFER(qcm2290, rf_clk3, 6, 38400000); +DEFINE_CLK_SMD_RPM_XO_BUFFER_PREFIX(qcm2290, 38m4_, rf_clk3, 6, 38400000); DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8974, cxo_d0, 1, 19200000); DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8974, cxo_d1, 2, 19200000); @@ -1170,8 +1176,8 @@ static struct clk_smd_rpm *qcm2290_clks[] = { [RPM_SMD_QDSS_A_CLK] = &sm6125_branch_qdss_a_clk, [RPM_SMD_LN_BB_CLK2] = &msm8998_ln_bb_clk2, [RPM_SMD_LN_BB_CLK2_A] = &msm8998_ln_bb_clk2_a, - [RPM_SMD_RF_CLK3] = &qcm2290_rf_clk3, - [RPM_SMD_RF_CLK3_A] = &qcm2290_rf_clk3_a, + [RPM_SMD_RF_CLK3] = &qcm2290_38m4_rf_clk3, + [RPM_SMD_RF_CLK3_A] = &qcm2290_38m4_rf_clk3_a, [RPM_SMD_CNOC_CLK] = &sm6125_cnoc_clk, [RPM_SMD_CNOC_A_CLK] = &sm6125_cnoc_a_clk, [RPM_SMD_IPA_CLK] = &msm8976_ipa_clk, -- 2.20.1