From 1db522cd03fdf692047e2317cfa16cf89bd42992 Mon Sep 17 00:00:00 2001 From: Alvin Lee Date: Fri, 2 Oct 2020 17:53:35 -0400 Subject: [PATCH] drm/amd/display: Set WM set A to 0 if full pstate not supported [Why] If full pstate is not supported, we should set WM set A to 0 to prevent any hangs [How] If pstate is not supported, set watermark set A to 0 Signed-off-by: Alvin Lee Acked-by: Aurabindo Pillai Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c index cd860d3f161d..0ca3c5a77d59 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c +++ b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c @@ -2313,7 +2313,7 @@ void dcn30_calculate_wm_and_dlg( * calculate DLG based on dummy p-state latency, and max out the set A p-state watermark */ context->bw_ctx.bw.dcn.watermarks.a = context->bw_ctx.bw.dcn.watermarks.c; - context->bw_ctx.bw.dcn.watermarks.a.cstate_pstate.pstate_change_ns = 0x13FFFF; + context->bw_ctx.bw.dcn.watermarks.a.cstate_pstate.pstate_change_ns = 0; } else { /* Set A: * DCFCLK: Min Required -- 2.20.1