drm/i915/display: Fix C20 pll selection for state verification
authorMika Kahola <mika.kahola@intel.com>
Tue, 2 Jan 2024 11:57:39 +0000 (13:57 +0200)
committerMika Kahola <mika.kahola@intel.com>
Thu, 4 Jan 2024 09:42:13 +0000 (11:42 +0200)
commitf4304beadd88d074333b23fdc7f35d00ee763e14
treec18caecf2c8fbbe048c3c0d479cf54eb151008bb
parent93cbc1accbcec2740231755774420934658e2b18
drm/i915/display: Fix C20 pll selection for state verification

Add pll selection check for C20 as well as
clock state verification0. We have been relying
on sw state to select A or B pll's. This is incorrect
as the hw might see this selection differently. This
patch fixes this shortcoming by reading pll selection
for both sw and hw states and compares if these two
selections match.

Fixes: 59be90248b42 ("drm/i915/mtl: C20 state verification")

v2: reword commit message and include fix to a
    original commit (Imre)
    Compare pll selection (Jani)

Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240102115741.118525-2-mika.kahola@intel.com
drivers/gpu/drm/i915/display/intel_cx0_phy.c