x86/cpufeatures: Add virtual TSC_AUX feature bit
authorBabu Moger <babu.moger@amd.com>
Tue, 19 Apr 2022 20:53:52 +0000 (15:53 -0500)
committerPaolo Bonzini <pbonzini@redhat.com>
Fri, 29 Apr 2022 16:49:15 +0000 (12:49 -0400)
commitf30903394eb62316dddea8801b357f5cec4df187
tree92aa1ba94bfaa65a7cd49259bc38732ef348e648
parent71d7c575a673d42ad7175ad5fc27c85c80330311
x86/cpufeatures: Add virtual TSC_AUX feature bit

The TSC_AUX Virtualization feature allows AMD SEV-ES guests to securely use
TSC_AUX (auxiliary time stamp counter data) MSR in RDTSCP and RDPID
instructions.

The TSC_AUX MSR is typically initialized to APIC ID or another unique
identifier so that software can quickly associate returned TSC value
with the logical processor.

Add the feature bit and also include it in the kvm for detection.

Signed-off-by: Babu Moger <babu.moger@amd.com>
Acked-by: Borislav Petkov <bp@suse.de>
Message-Id: <165040157111.1399644.6123821125319995316.stgit@bmoger-ubuntu>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
arch/x86/include/asm/cpufeatures.h