crypto: hisilicon - add hardware SGL support
authorZhou Wang <wangzhou1@hisilicon.com>
Fri, 2 Aug 2019 07:57:51 +0000 (15:57 +0800)
committerHerbert Xu <herbert@gondor.apana.org.au>
Fri, 9 Aug 2019 05:11:53 +0000 (15:11 +1000)
commitdfed0098ab91f647b5720ab6f1e03b5b55139408
tree7e195fc299279dd885b41527ee4bb003951a09a6
parent263c9959c9376ec0217d6adc61222a53469eed3c
crypto: hisilicon - add hardware SGL support

HiSilicon accelerators in Hip08 use same hardware scatterlist for data format.
We support it in this module.

Specific accelerator drivers can use hisi_acc_create_sgl_pool to allocate
hardware SGLs ahead. Then use hisi_acc_sg_buf_map_to_hw_sgl to get one
hardware SGL and pass related information to hardware SGL.

The DMA address of mapped hardware SGL can be passed to SGL src/dst field
in QM SQE.

Signed-off-by: Zhou Wang <wangzhou1@hisilicon.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
drivers/crypto/hisilicon/Kconfig
drivers/crypto/hisilicon/Makefile
drivers/crypto/hisilicon/sgl.c [new file with mode: 0644]
drivers/crypto/hisilicon/sgl.h [new file with mode: 0644]