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(parent: f3a5b56) | patch
mmc: sdhci-pci-gli: Set SDR104's clock to 205MHz and enable SSC for GL9767
authorVictor Shih <victor.shih@genesyslogic.com.tw>
Fri, 9 Jun 2023 07:14:39 +0000 (15:14 +0800)
committerUlf Hansson <ulf.hansson@linaro.org>
Mon, 12 Jun 2023 13:20:08 +0000 (15:20 +0200)
commitd2754355512e51c1e6c37975ccc5bdca635b3718
treeb518789a3aab4e46b8e84af18c5d33991796c9dctree
parentf3a5b56c1286444204c95ba78e1b03961aac580ccommit | diff
mmc: sdhci-pci-gli: Set SDR104's clock to 205MHz and enable SSC for GL9767

Set GL9767 SDR104's clock to 205MHz and enable SSC feature
depend on register 0x888 BIT(1).

Signed-off-by: Ben Chuang <ben.chuang@genesyslogic.com.tw>
Signed-off-by: Victor Shih <victor.shih@genesyslogic.com.tw>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/20230609071441.451464-3-victorshihgli@gmail.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
drivers/mmc/host/sdhci-pci-gli.c diff | blob | history
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