drm/panfrost: Add basic support for speed binning
authorAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Thu, 23 Mar 2023 09:08:22 +0000 (10:08 +0100)
committerBoris Brezillon <boris.brezillon@collabora.com>
Fri, 31 Mar 2023 09:44:11 +0000 (11:44 +0200)
commit7d690f936e9bc9fbd6394fb3d4ad181af03ee393
treedd649d950a84d228bf2fd35ef4ad153335080f0f
parent191308bae4ef67df627158c7effb4f397fa992d4
drm/panfrost: Add basic support for speed binning

Some SoCs implementing ARM Mali GPUs are subject to speed binning:
this means that some versions of the same SoC model may need to be
limited to a slower frequency compared to the other:
this is being addressed by reading nvmem (usually, an eFuse array)
containing a number that identifies the speed binning of the chip,
which is usually related to silicon quality.

To address such situation, add basic support for reading the
speed-bin through nvmem, as to make it possible to specify the
supported hardware in the OPP table for GPUs.
This commit also keeps compatibility with any platform that does
not specify (and does not even support) speed-binning.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230323090822.61766-3-angelogioacchino.delregno@collabora.com
drivers/gpu/drm/panfrost/panfrost_devfreq.c