ARM: sti: Implement dummy L2 cache's write_sec
authorPatrice Chotard <patrice.chotard@st.com>
Tue, 28 Jun 2016 09:21:52 +0000 (11:21 +0200)
committerPatrice Chotard <patrice.chotard@st.com>
Mon, 11 Jul 2016 07:15:44 +0000 (09:15 +0200)
commit7b8e0188fa717cd9abc4fb52587445b421835c2a
tree1a8750b93a459bcb56a257f4b906c902c89c916d
parent50fdda702fe5c833a69aa36bbfe878319bbf443d
ARM: sti: Implement dummy L2 cache's write_sec

This patch implements the write_sec callback that handle PL310
secure registers writes.
This callback is just a stub for now, to avoid system crash.
Later, it could handle SMC calls so that TZ handles the needed writes.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
arch/arm/mach-sti/board-dt.c