powerpc: slightly improve cache helpers
authorChristophe Leroy <christophe.leroy@c-s.fr>
Fri, 10 May 2019 09:24:48 +0000 (09:24 +0000)
committerMichael Ellerman <mpe@ellerman.id.au>
Thu, 4 Jul 2019 15:35:10 +0000 (01:35 +1000)
commit6c5875843b87c3adea2beade9d1b8b3d4523900a
tree3654d6521c3ba3692ad8e73abd3b05b519dd1527
parentac25ba68fa4001c85395f0488b1c7a2421c5aada
powerpc: slightly improve cache helpers

Cache instructions (dcbz, dcbi, dcbf and dcbst) take two registers
that are summed to obtain the target address. Using 'Z' constraint
and '%y0' argument gives GCC the opportunity to use both registers
instead of only one with the second being forced to 0.

Suggested-by: Segher Boessenkool <segher@kernel.crashing.org>
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
arch/powerpc/include/asm/cache.h