x86/insn: Add support for APX EVEX instructions to the opcode map
authorAdrian Hunter <adrian.hunter@intel.com>
Thu, 2 May 2024 10:58:51 +0000 (13:58 +0300)
committerIngo Molnar <mingo@kernel.org>
Thu, 2 May 2024 11:13:46 +0000 (13:13 +0200)
commit690ca3a3067f760bef92ca5db1c42490498ab5de
tree0e515dcf6b17ffeb7f95a9b3eada28ac2305bdae
parent87bbaf1a4be4904fcf04a024e7c1d9f9d1fa945b
x86/insn: Add support for APX EVEX instructions to the opcode map

To support APX functionality, the EVEX prefix is used to:

 - promote legacy instructions
 - promote VEX instructions
 - add new instructions

Promoted VEX instructions require no extra annotation because the opcodes
do not change and the permissive nature of the instruction decoder already
allows them to have an EVEX prefix.

Promoted legacy instructions and new instructions are placed in map 4 which
has not been used before.

Create a new table for map 4 and add APX instructions.

Annotate SCALABLE instructions with "(es)" - refer to patch "x86/insn: Add
support for APX EVEX to the instruction decoder logic". SCALABLE
instructions must be represented in both no-prefix (NP) and 66 prefix
forms.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Link: https://lore.kernel.org/r/20240502105853.5338-9-adrian.hunter@intel.com
arch/x86/lib/x86-opcode-map.txt
tools/arch/x86/lib/x86-opcode-map.txt