clk: samsung: add top clock support for ExynosAuto v920 SoC
authorSunyeal Hong <sunyeal.hong@samsung.com>
Wed, 21 Aug 2024 23:26:52 +0000 (08:26 +0900)
committerKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Fri, 23 Aug 2024 07:21:35 +0000 (09:21 +0200)
commit485e13fe2fb649e60eb49d8bec4404da215c1f5b
tree790b4bbf03bf9cfa19e5a5eb80f806b06e0c7b99
parent9224e288f2e1f9161cf0c54122ac9168b6b68877
clk: samsung: add top clock support for ExynosAuto v920 SoC

This adds support for CMU_TOP which generates clocks for all the
function blocks such as CORE, HSI0/1/2, PERIC0/1 and so on. For
CMU_TOP, PLL_SHARED0,1,2,3,4 and 5 will be the sources of this block
and they will generate bus clocks.

Signed-off-by: Sunyeal Hong <sunyeal.hong@samsung.com>
Link: https://lore.kernel.org/r/20240821232652.1077701-5-sunyeal.hong@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
drivers/clk/samsung/Makefile
drivers/clk/samsung/clk-exynosautov920.c [new file with mode: 0644]