PCI/pwrctl: Add PCI power control core code
authorBartosz Golaszewski <bartosz.golaszewski@linaro.org>
Wed, 12 Jun 2024 08:20:17 +0000 (10:20 +0200)
committerBartosz Golaszewski <bartosz.golaszewski@linaro.org>
Wed, 12 Jun 2024 11:20:56 +0000 (13:20 +0200)
commit4565d2652a37e438e4cd729e2a8dfeffe34c958c
tree2167c3568495c516d57433bde7f90026b595dfbf
parent8fb18619d9102e8f4f6184cdac482422d9293b48
PCI/pwrctl: Add PCI power control core code

Some PCI devices must be powered-on before they can be detected on the
bus. Introduce a simple framework reusing the existing PCI OF
infrastructure.

The way this works is: a DT node representing a PCI device connected to
the port can be matched against its power control platform driver. If
the match succeeds, the driver is responsible for powering-up the device
and calling pci_pwrctl_device_set_ready() which will trigger a PCI bus
rescan as well as subscribe to PCI bus notifications.

When the device is detected and created, we'll make it consume the same
DT node that the platform device did. When the device is bound, we'll
create a device link between it and the parent power control device.

Tested-by: Amit Pundir <amit.pundir@linaro.org>
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8550-QRD, SM8650-QRD & SM8650-HDK
Tested-by: Caleb Connolly <caleb.connolly@linaro.org> # OnePlus 8T
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
Link: https://lore.kernel.org/r/20240612082019.19161-5-brgl@bgdev.pl
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
MAINTAINERS
drivers/pci/Kconfig
drivers/pci/Makefile
drivers/pci/pwrctl/Kconfig [new file with mode: 0644]
drivers/pci/pwrctl/Makefile [new file with mode: 0644]
drivers/pci/pwrctl/core.c [new file with mode: 0644]
include/linux/pci-pwrctl.h [new file with mode: 0644]