pinctrl: aspeed: Add AST2600 pinmux support
authorAndrew Jeffery <andrew@aj.id.au>
Thu, 11 Jul 2019 04:19:42 +0000 (13:49 +0930)
committerLinus Walleij <linus.walleij@linaro.org>
Mon, 5 Aug 2019 10:41:18 +0000 (12:41 +0200)
commit2eda1cdec49f8ae7878e60d1b06bd8157a95424f
tree37e7778f68b8f7ad4e697fe9f6dd01195574d34e
parent86392fac9a9c92f36c0a422a3075865a0fe959f9
pinctrl: aspeed: Add AST2600 pinmux support

The AST2600 pinmux is fairly similar to the previous generations of
ASPEED BMC SoCs in terms of architecture, though differ in some of the
design details. The complexity of the pin expressions is largely reduced
(e.g. there are no-longer signals with multiple expressions muxing them
to the associated pin), and there are now signals and buses with
multiple pin groups.

The driver implements pinmux support for all 244 GPIO-capable pins plus
a further four pins that are not GPIO capable but which expose multiple
signals. pinconf will be implemented in a follow-up patch.

The implementation has been smoke-tested under qemu, and run on hardware
by ASPEED.

Debugged-by: Johnny Huang <johnny_huang@aspeedtech.com>
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Link: https://lore.kernel.org/r/20190711041942.23202-7-andrew@aj.id.au
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
drivers/pinctrl/aspeed/Kconfig
drivers/pinctrl/aspeed/Makefile
drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c [new file with mode: 0644]