dt-bindings: Add common bindings for ARM and RISC-V idle states
authorAnup Patel <anup.patel@wdc.com>
Thu, 10 Feb 2022 05:49:46 +0000 (11:19 +0530)
committerPalmer Dabbelt <palmer@rivosinc.com>
Thu, 10 Mar 2022 17:29:56 +0000 (09:29 -0800)
commit1bd524f7e8d8f194cd94bc4535df91391d0f1dc8
tree6483ac61aa7a3bc119bdbe5dfdc810ee01172cca
parent6abf32f1d9c5009dcccded2c1e7ca899a4ab587b
dt-bindings: Add common bindings for ARM and RISC-V idle states

The RISC-V CPU idle states will be described in under the
/cpus/idle-states DT node in the same way as ARM CPU idle
states.

This patch adds common bindings documentation for both ARM
and RISC-V idle states.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Guo Ren <guoren@kernel.org>
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Documentation/devicetree/bindings/arm/idle-states.yaml [deleted file]
Documentation/devicetree/bindings/arm/msm/qcom,idle-state.txt
Documentation/devicetree/bindings/arm/psci.yaml
Documentation/devicetree/bindings/cpu/idle-states.yaml [new file with mode: 0644]
Documentation/devicetree/bindings/riscv/cpus.yaml