drivers: perf: Add LLC-TAD perf counter support
authorBhaskara Budiredla <bbudiredla@marvell.com>
Mon, 15 Nov 2021 04:35:05 +0000 (10:05 +0530)
committerWill Deacon <will@kernel.org>
Tue, 14 Dec 2021 12:23:01 +0000 (12:23 +0000)
commit036a7584bede317d0df6b854e4f531b7a2dd8b33
treee1df695ff6d1c69746fc580f8655b2b32b7058d4
parentd58071a8a76d779eedab38033ae4c821c30295a5
drivers: perf: Add LLC-TAD perf counter support

This driver adds support for Last-level cache tag-and-data unit
(LLC-TAD) PMU that is featured in some of the Marvell's CN10K
infrastructure silicons.

The LLC is divided into 2N slices distributed across N Mesh tiles
in a single-socket configuration. The driver always configures the
same counter for all of the TADs. The user would end up effectively
reserving one of eight counters in every TAD to look across all TADs.
The occurrences of events are aggregated and presented to the user
at the end of an application run. The driver does not provide a way
for the user to partition TADs so that different TADs are used for
different applications.

The event counters are zeroed to start event counting to avoid any
rollover issues. TAD perf counters are 64-bit, so it's not currently
possible to overflow event counters at current mesh and core
frequencies.

To measure tad pmu events use perf tool stat command. For instance:

perf stat -e tad_dat_msh_in_dss,tad_req_msh_out_any <application>
perf stat -e tad_alloc_any,tad_hit_any,tad_tag_rd <application>

Signed-off-by: Bhaskara Budiredla <bbudiredla@marvell.com>
Link: https://lore.kernel.org/r/20211115043506.6679-2-bbudiredla@marvell.com
Signed-off-by: Will Deacon <will@kernel.org>
drivers/perf/Kconfig
drivers/perf/Makefile
drivers/perf/marvell_cn10k_tad_pmu.c [new file with mode: 0644]