Aurabindo Pillai [Thu, 4 Jul 2024 18:41:58 +0000 (18:41 +0000)]
drm/amd/display: rename dcn401_soc to dcn4_variant_a_soc
To distinguish between different soc with same DCN IP, use variants
starting with alphabets
Reviewed-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com>
Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Aurabindo Pillai [Thu, 4 Jul 2024 18:33:02 +0000 (18:33 +0000)]
drm/amd/display: rename dcn3/dcn4 to more sound terms
Use more accurate names to refer to the asic architecture.
dcn3 in DML actually refers to DCN32 and DCN321, so rename it to dcn32x
dcn4 refers to any DCN4x soc., and hence rename dcn4 to dcn4x
Reviewed-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com>
Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Hansen Dsouza [Thu, 11 Jul 2024 14:58:51 +0000 (10:58 -0400)]
drm/amd/display: Add source select helper functions
[why & how]
Add source select helpers based on DCCG spec
Reviewed-by: Daniel Miess <daniel.miess@amd.com>
Signed-off-by: Hansen Dsouza <hansen.dsouza@amd.com>
Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Austin Zheng [Wed, 10 Jul 2024 18:15:57 +0000 (14:15 -0400)]
drm/amd/display: Check if Mode is Supported Before Returning Result
[Why]
Even if the mode is not supported dml2_check_mode_supported() would still return true.
This causes an unsupported mode to be programmed.
[How]
Check if the mode is supported or not and return the proper result.
Reviewed-by: Chaitanya Dhere <chaitanya.dhere@amd.com>
Signed-off-by: Austin Zheng <austin.zheng@amd.com>
Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Samson Tam [Wed, 10 Jul 2024 21:09:04 +0000 (17:09 -0400)]
drm/amd/display: ensure EASF and ISHARP coefficients are programmed together
[Why]
EASF coefficients are programmed to RAM and then RAM selector is toggled.
ISHARP coefficients are programmed after so they will not be in the same
RAM block
[How]
Move ISHARP programming before EASF programming
Add flag if ISHARP coefficients are updated. If so, then
force EASF coefficients programming
Reviewed-by: Alvin Lee <alvin.lee2@amd.com>
Signed-off-by: Samson Tam <samson.tam@amd.com>
Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Ryan Seto [Wed, 10 Jul 2024 21:03:32 +0000 (17:03 -0400)]
drm/amd/display: Fix visual confirm bug for SubVP
[Why]
Visual confirm was incorrect on dual monitor SubVP setup
[How]
Adjusted p_state assignment for dual monitor SubVP setup
Signed-off-by: Ryan Seto <ryanseto@amd.com>
Reviewed-by: Chaitanya Dhere <chaitanya.dhere@amd.com>
Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Hansen Dsouza [Tue, 9 Jul 2024 20:50:05 +0000 (16:50 -0400)]
drm/amd/display: Add RCG helper functions
[why & how]
Add standard RCG helpers based on DCCG spec
Reviewed-by: Daniel Miess <daniel.miess@amd.com>
Reviewed-by: Muhammad Ahmed <ahmed.ahmed@amd.com>
Signed-off-by: Hansen Dsouza <hansen.dsouza@amd.com>
Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rodrigo Siqueira [Thu, 4 Jul 2024 17:54:34 +0000 (11:54 -0600)]
drm/amd/display: Remove ASSERT if significance is zero in math_ceil2
In the DML math_ceil2 function, there is one ASSERT if the significance
is equal to zero. However, significance might be equal to zero
sometimes, and this is not an issue for a ceil function, but the current
ASSERT will trigger warnings in those cases. This commit removes the
ASSERT if the significance is equal to zero to avoid unnecessary noise.
Cc: Mario Limonciello <mario.limonciello@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Reviewed-by: Chaitanya Dhere <chaitanya.dhere@amd.com>
Signed-off-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com>
Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Revalla Hari Krishna [Mon, 8 Jul 2024 10:05:08 +0000 (15:35 +0530)]
drm/amd/display: Refactoring HPO
[Why]
To refactor HPO files
[How]
Moved hpo related files to specific hpo folder and
update Makefiles.
Reviewed-by: Martin Leung <martin.leung@amd.com>
Signed-off-by: Revalla Hari Krishna <harikrishna.revalla@amd.com>
Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Hansen Dsouza [Tue, 9 Jul 2024 19:56:36 +0000 (15:56 -0400)]
drm/amd/display: Add private data type for RCG
[why & how]
Add private data types for better RCG control
Reviewed-by: Chris Park <chris.park@amd.com>
Reviewed-by: Yihan Zhu <yihan.zhu@amd.com>
Signed-off-by: Hansen Dsouza <hansen.dsouza@amd.com>
Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Sung Joon Kim [Mon, 8 Jul 2024 23:29:49 +0000 (19:29 -0400)]
drm/amd/display: Check for NULL pointer
[why & how]
Need to make sure plane_state is initialized
before accessing its members.
Cc: Mario Limonciello <mario.limonciello@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Reviewed-by: Xi (Alex) Liu <xi.liu@amd.com>
Signed-off-by: Sung Joon Kim <sungjoon.kim@amd.com>
Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Dillon Varone [Wed, 3 Jul 2024 18:44:15 +0000 (14:44 -0400)]
drm/amd/display: Remove hardmax usage for dcn401
[WHY&HOW]
Hardmax message will be retired for dcn4, so this removes it.
Reviewed-by: Alvin Lee <alvin.lee2@amd.com>
Signed-off-by: Dillon Varone <dillon.varone@amd.com>
Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Philip Yang [Thu, 20 Jun 2024 15:53:50 +0000 (11:53 -0400)]
drm/amdkfd: Refactor queue wptr_bo GART mapping
Add helper function kfd_queue_acquire_buffers to get queue wptr_bo
reference from queue write_ptr if it is mapped to the KFD node with
expected size.
Add wptr_bo to structure queue_properties because structure queue is
allocated after queue buffers are validated, then we can remove wptr_bo
parameter from pqm_create_queue.
Rename structure queue wptr_bo_gart to hold wptr_bo reference for GART
mapping and umapping. Move MES wptr_bo_gart mapping to init_user_queue,
the same location with queue ctx_bo GART mapping.
Signed-off-by: Philip Yang <Philip.Yang@amd.com>
Reviewed-by: Felix Kuehling <felix.kuehling@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Sunil Khatri [Wed, 17 Jul 2024 13:10:47 +0000 (18:40 +0530)]
drm/amdgpu: Add sdma_v4_4_2 ip dump for devcoredump
Add ip dump for sdma_v4_4_2 for devcoredump for all
instances of sdma.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sunil Khatri <sunil.khatri@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Sunil Khatri [Wed, 17 Jul 2024 11:42:56 +0000 (17:12 +0530)]
drm/amdgpu: add print support for sdma_v_4_0 ip_dump
Add print support for ip dump for sdma_v_4_0 in
devcoredump.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sunil Khatri <sunil.khatri@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Philip Yang [Sun, 14 Jul 2024 15:11:05 +0000 (11:11 -0400)]
drm/amdkfd: amdkfd_free_gtt_mem clear the correct pointer
Pass pointer reference to amdgpu_bo_unref to clear the correct pointer,
otherwise amdgpu_bo_unref clear the local variable, the original pointer
not set to NULL, this could cause use-after-free bug.
Signed-off-by: Philip Yang <Philip.Yang@amd.com>
Reviewed-by: Felix Kuehling <felix.kuehling@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Philip Yang [Thu, 20 Jun 2024 15:17:59 +0000 (11:17 -0400)]
drm/amdkfd: kfd_bo_mapped_dev support partition
Change amdgpu_amdkfd_bo_mapped_to_dev to use drm_priv as parameter
instead of adev, to support spatial partition. This is only used by CRIU
checkpoint restore now. No functional change.
Signed-off-by: Philip Yang <Philip.Yang@amd.com>
Reviewed-by: Felix Kuehling <felix.kuehling@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Jane Jian [Mon, 15 Jul 2024 10:48:31 +0000 (18:48 +0800)]
drm/amdgpu/vcn: Use offsets local to VCN/JPEG in VF
For VCN/JPEG 4.0.3, use only the local addressing scheme.
- Mask bit higher than AID0 range
v2
remain the case for mmhub use master XCC
Signed-off-by: Jane Jian <Jane.Jian@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Lijo Lazar [Mon, 11 Dec 2023 05:48:42 +0000 (11:18 +0530)]
drm/amdgpu: Add empty HDP flush function to VCN v4.0.3
VCN 4.0.3 does not HDP flush with RRMT enabled. Instead, mmsch
will do the HDP flush.
This change is necessary for VCN v4.0.3, no need for backward compatibility
Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Jane Jian <Jane.Jian@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Lijo Lazar [Mon, 11 Dec 2023 05:15:38 +0000 (10:45 +0530)]
drm/amdgpu: Add empty HDP flush function to JPEG v4.0.3
JPEG v4.0.3 doesn't support HDP flush when RRMT is enabled. Instead,
mmsch fw will do the flush.
This change is necessary for JPEG v4.0.3, no need for backward compatibility
Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Jane Jian <Jane.Jian@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Pierre-Eric Pelloux-Prayer [Tue, 2 Jul 2024 09:54:30 +0000 (11:54 +0200)]
drm/amdgpu: disallow multiple BO_HANDLES chunks in one submit
Before this commit, only submits with both a BO_HANDLES chunk and a
'bo_list_handle' would be rejected (by amdgpu_cs_parser_bos).
But if UMD sent multiple BO_HANDLES, what would happen is:
* only the last one would be really used
* all the others would leak memory as amdgpu_cs_p1_bo_handles would
overwrite the previous p->bo_list value
This commit rejects submissions with multiple BO_HANDLES chunks to
match the implementation of the parser.
Signed-off-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Sunil Khatri [Wed, 17 Jul 2024 11:40:33 +0000 (17:10 +0530)]
drm/amdgpu: Add sdma_v4_0 ip dump for devcoredump
Add ip dump for sdma_v4_0 for devcoredump for all
instances of sdma.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sunil Khatri <sunil.khatri@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Sunil Khatri [Wed, 17 Jul 2024 06:33:33 +0000 (12:03 +0530)]
drm/amdgpu: add print support for sdma_v_7_0 ip_dump
Add print support for ip dump for sdma_v_7_0 in
devcoredump.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sunil Khatri <sunil.khatri@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Ma Ke [Thu, 18 Jul 2024 14:17:35 +0000 (22:17 +0800)]
drm/amd/amdgpu: Fix uninitialized variable warnings
Return 0 to avoid returning an uninitialized variable r.
Cc: stable@vger.kernel.org
Fixes:
230dd6bb6117 ("drm/amd/amdgpu: implement mode2 reset on smu_v13_0_10")
Signed-off-by: Ma Ke <make24@iscas.ac.cn>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Ma Ke [Thu, 18 Jul 2024 14:11:41 +0000 (22:11 +0800)]
drm/amdgpu: fix a possible null pointer dereference
In amdgpu_connector_add_common_modes(), the return value of drm_cvt_mode()
is assigned to mode, which will lead to a NULL pointer dereference on
failure of drm_cvt_mode(). Add a check to avoid npd.
Cc: stable@vger.kernel.org
Fixes:
d38ceaf99ed0 ("drm/amdgpu: add core driver (v4)")
Signed-off-by: Ma Ke <make24@iscas.ac.cn>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
David Belanger [Mon, 10 Jun 2024 20:38:55 +0000 (16:38 -0400)]
drm/amdgpu: Fix atomics on GFX12
If PCIe supports atomics, configure register to prevent DF from
breaking atomics in separate load/store operations.
Signed-off-by: David Belanger <david.belanger@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Sunil Khatri [Wed, 17 Jul 2024 06:31:36 +0000 (12:01 +0530)]
drm/amdgpu: Add sdma_v7_0 ip dump for devcoredump
Add ip dump for sdma_v7_0 for devcoredump for all
instances of sdma.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sunil Khatri <sunil.khatri@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Tue, 9 Jul 2024 21:54:11 +0000 (17:54 -0400)]
drm/amdgpu/sdma5.2: Update wptr registers as well as doorbell
We seem to have a case where SDMA will sometimes miss a doorbell
if GFX is entering the powergating state when the doorbell comes in.
To workaround this, we can update the wptr via MMIO, however,
this is only safe because we disallow gfxoff in begin_ring() for
SDMA 5.2 and then allow it again in end_ring().
Enable this workaround while we are root causing the issue with
the HW team.
Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/3440
Tested-by: Friedrich Vock <friedrich.vock@gmx.de>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Srinivasan Shanmugam [Thu, 18 Jul 2024 04:00:01 +0000 (09:30 +0530)]
drm/amd/display: Add 'pstate_keepout' kdoc entry in 'optc1_program_timing'
Fixes the below with gcc W=1:
Function parameter or struct member 'pstate_keepout' not described in 'optc1_program_timing'
Cc: Tom Chung <chiahsuan.chung@amd.com>
Cc: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Cc: Roman Li <roman.li@amd.com>
Cc: Alex Hung <alex.hung@amd.com>
Cc: Aurabindo Pillai <aurabindo.pillai@amd.com>
Cc: Harry Wentland <harry.wentland@amd.com>
Cc: Hamza Mahfooz <hamza.mahfooz@amd.com>
Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>
Reviewed-by: Tom Chung <chiahsuan.chung@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Ma Ke [Thu, 18 Jul 2024 13:13:29 +0000 (21:13 +0800)]
drm/radeon: fix null pointer dereference in radeon_add_common_modes
In radeon_add_common_modes(), the return value of drm_cvt_mode() is
assigned to mode, which will lead to a possible NULL pointer dereference
on failure of drm_cvt_mode(). Add a check to avoid npd.
Cc: stable@vger.kernel.org
Fixes:
d50ba256b5f1 ("drm/kms: start adding command line interface using fb.")
Signed-off-by: Ma Ke <make24@iscas.ac.cn>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
YiPeng Chai [Thu, 11 Jul 2024 08:27:08 +0000 (16:27 +0800)]
drm/amdgpu: Remove unused code
Remove unused code.
Signed-off-by: YiPeng Chai <YiPeng.Chai@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
YiPeng Chai [Thu, 11 Jul 2024 08:14:22 +0000 (16:14 +0800)]
drm/amdgpu: optimize logging deferred error info
1. Use pa_pfn as the radix-tree key index to log
deferred error info.
2. Use local array to store a row of bad pages.
Signed-off-by: YiPeng Chai <YiPeng.Chai@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
YiPeng Chai [Thu, 11 Jul 2024 08:06:25 +0000 (16:06 +0800)]
drm/amdgpu: optimize umc v12 address conversion function
Split into 3 parts:
1. Convert soc physical address via ras ta.
2. Expand bad pages from soc physical address.
3. Dump bad address info.
Signed-off-by: YiPeng Chai <YiPeng.Chai@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Wu Hoi Pok [Sun, 30 Jun 2024 16:59:22 +0000 (12:59 -0400)]
drm/radeon: change drm_dev_alloc to devm_drm_dev_alloc
"drm_dev_alloc" is deprecated, in order to use the newer "devm_drm_dev_alloc",
the "drm_device" is stored inside "radeon_device", by changing "rdev_to_drm(rdev)"
other functions still gain access to the member "drm_device". Also, "devm_drm_dev_alloc"
is now allocating "radeon_device", allocation inside "radeon_driver_load_kms" has to be
removed.
In "radeon_device_init", it originally assigned "rdev->dev" etc. However it is already
done right after "devm_drm_dev_alloc" as you can see down below. It is better remove them.
Reviewed-by: Thomas Zimmermann <tzimmermann@suse.de>
Tested-by: Thomas Zimmermann <tzimmermann@suse.de>
Signed-off-by: Wu Hoi Pok <wuhoipok@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Wu Hoi Pok [Sun, 30 Jun 2024 16:59:21 +0000 (12:59 -0400)]
drm/radeon: change rdev->ddev to rdev_to_drm(rdev)
This patch changes the way "drm_device" is accessed. It uses "rdev_to_drm(rdev)"
instead of accessing the struct member directly.
Reviewed-by: Thomas Zimmermann <tzimmermann@suse.de>
Tested-by: Thomas Zimmermann <tzimmermann@suse.de>
Signed-off-by: Wu Hoi Pok <wuhoipok@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Wu Hoi Pok [Sun, 30 Jun 2024 16:59:20 +0000 (12:59 -0400)]
drm/radeon: add helper rdev_to_drm(rdev)
Add helper rdev_to_drm(rdev), similar to amdgpu, most function should
access the "drm_device" with "rdev_to_drm(rdev)" instead, where amdgpu has
"adev_to_drm(adev)". It also makes changing from "*drm_device" to "drm_device"
in "radeon_devicce" later on easier.
Reviewed-by: Thomas Zimmermann <tzimmermann@suse.de>
Tested-by: Thomas Zimmermann <tzimmermann@suse.de>
Signed-off-by: Wu Hoi Pok <wuhoipok@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Wu Hoi Pok [Sun, 30 Jun 2024 16:59:19 +0000 (12:59 -0400)]
drm/radeon: use variable flags as parameter
To be consistent with amdgpu driver, use "flags" as the parameter because
it is already assigned as "ent->driver_data".
Reviewed-by: Thomas Zimmermann <tzimmermann@suse.de>
Tested-by: Thomas Zimmermann <tzimmermann@suse.de>
Signed-off-by: Wu Hoi Pok <wuhoipok@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Wu Hoi Pok [Sun, 30 Jun 2024 16:59:18 +0000 (12:59 -0400)]
drm/radeon: remove load callback from kms_driver
The ".load" callback in "struct drm_driver" is deprecated. In order to remove
the callback, we have to manually call "radeon_driver_load_kms" instead.
Acked-by: Thomas Zimmermann <tzimmermann@suse.de>
Tested-by: Thomas Zimmermann <tzimmermann@suse.de>
Signed-off-by: Wu Hoi Pok <wuhoipok@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Wu Hoi Pok [Sun, 30 Jun 2024 16:59:17 +0000 (12:59 -0400)]
drm/radeon: change variable name "dev" to "ddev" for consistency
In the probe function of amdgpu, it uses "ddev" as the name of "struct drm_device *",
so I suggest renaming it to be consistent.
Reviewed-by: Thomas Zimmermann <tzimmermann@suse.de>
Tested-by: Thomas Zimmermann <tzimmermann@suse.de>
Signed-off-by: Wu Hoi Pok <wuhoipok@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Aric Cyr [Mon, 8 Jul 2024 14:03:28 +0000 (10:03 -0400)]
drm/amd/display: 3.2.292
* FW Release 0.0.225.0
* DML2 fixes
* Allow display DCC for DCN401
* Refactor DWB, OPP, MPC, MMHUBBUB
* Fix dscclk Programming issue on DCN401
Acked-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com>
Signed-off-by: Jerry Zuo <jerry.zuo@amd.com>
Signed-off-by: Aric Cyr <aric.cyr@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rodrigo Siqueira [Tue, 9 Jul 2024 20:34:25 +0000 (14:34 -0600)]
drm/amd/display: Remove unused dml2_core_ip_params struct
Acked-by: Jerry Zuo <jerry.zuo@amd.com>
Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Joshua Aberback [Thu, 4 Jul 2024 19:22:13 +0000 (15:22 -0400)]
drm/amd/display: Remove unnecessary DSC power gating for DCN401
[Why]
In some cases during topology changes, a pipe that was used to drive a
stream being removed can be re-assigned to drive a different stream. In
these cases, DSC power gating is not handled properly, leading to
situations where DSC is being setup while power gated.
[How]
- remove enable_stream_gating and disable_stream_gating for DCN401
Reviewed-by: Wenjing Liu <wenjing.liu@amd.com>
Signed-off-by: Jerry Zuo <jerry.zuo@amd.com>
Signed-off-by: Joshua Aberback <joshua.aberback@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Aurabindo Pillai [Wed, 3 Jul 2024 20:41:52 +0000 (16:41 -0400)]
drm/amd/display: free bo used for dmub bounding box
fix a memleak introduced by not removing the buffer object for use with
early dmub bounding box value storage
Fixes:
234e94555800 ("drm/amd/display: Enable copying of bounding box data from VBIOS DMUB")
Reviewed-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com>
Reviewed-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Jerry Zuo <jerry.zuo@amd.com>
Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Duncan Ma [Thu, 27 Jun 2024 16:11:58 +0000 (12:11 -0400)]
drm/amd/display: Add visual confirm for Idle State
[Why]
Visual Confirm would tell us if it ever
entered idle state.
[How]
Add debug option for IPS visual confirm
Reviewed-by: Ovidiu Bunea <ovidiu.bunea@amd.com>
Signed-off-by: Jerry Zuo <jerry.zuo@amd.com>
Signed-off-by: Duncan Ma <duncan.ma@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Daniel Sa [Thu, 4 Jul 2024 17:41:15 +0000 (13:41 -0400)]
drm/amd/display: Set Cursor Matrix to bypass instead of Input Plane
why:
When the cursor disappears/reappears on fullscreen video, there is a
short transitional period where the cursor's color matrix is using the
same format as the video plane. This sets the cursor to the wrong color
momentarily before the UI plane appears, correcting the color.
how:
Instead of defaulting to using the color space from the input plane,
default to bypass mode.
Reviewed-by: Nevenko Stupar <nevenko.stupar@amd.com>
Signed-off-by: Jerry Zuo <jerry.zuo@amd.com>
Signed-off-by: Daniel Sa <daniel.sa@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Sung Joon Kim [Wed, 3 Jul 2024 20:15:59 +0000 (16:15 -0400)]
drm/amd/display: Check stream pointer is initialized before accessing
[why & how]
We calculate static screen wait frames based
on the current timing info in the active stream.
If stream is not initialized, then we should skip
the calculation and go with the default values.
Reviewed-by: Gabe Teeger <gabe.teeger@amd.com>
Signed-off-by: Jerry Zuo <jerry.zuo@amd.com>
Signed-off-by: Sung Joon Kim <sungjoon.kim@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Dillon Varone [Wed, 3 Jul 2024 18:00:14 +0000 (14:00 -0400)]
drm/amd/display: Export additional FAMS2 global configuration options from DML
[WHY&HOW]
Some global configuration options were previously hardcoded in DC, now they are
exported by DML and sent to FW.
Reviewed-by: Martin Leung <martin.leung@amd.com>
Signed-off-by: Jerry Zuo <jerry.zuo@amd.com>
Signed-off-by: Dillon Varone <dillon.varone@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Mudimela [Tue, 2 Jul 2024 06:25:56 +0000 (11:55 +0530)]
drm/amd/display: Refactoring DWB related files from dcn30 Files
[Why]
To refactor DWB related files from dcn30 Files
[How]
Moved DWB related files from dcn30 to specific DWB folder and
updated Makefiles to fix Compilation.
Reviewed-by: Martin Leung <martin.leung@amd.com>
Signed-off-by: Jerry Zuo <jerry.zuo@amd.com>
Signed-off-by: Mudimela <lmudimel@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Fudongwang [Mon, 1 Jul 2024 08:47:28 +0000 (16:47 +0800)]
drm/amd/display: add dmcub support check
[Why & How]
For DCN harvest case, if there is no dmcub support, we should return false
to avoid bugcheck later.
Reviewed-by: Aric Cyr <aric.cyr@amd.com>
Signed-off-by: Jerry Zuo <jerry.zuo@amd.com>
Signed-off-by: Fudongwang <fudong.wang@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Hung [Wed, 3 Jul 2024 16:50:35 +0000 (10:50 -0600)]
drm/amd/display: Increase array size of dummy_boolean
[WHY]
dml2_core_shared_mode_support and dml_core_mode_support access the third
element of dummy_boolean, i.e. hw_debug5 = &s->dummy_boolean[2], when
dummy_boolean has size of 2. Any assignment to hw_debug5 causes an
OVERRUN.
[HOW]
Increase dummy_boolean's array size to 3.
This fixes 2 OVERRUN issues reported by Coverity.
Reviewed-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com>
Signed-off-by: Jerry Zuo <jerry.zuo@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Hung [Tue, 25 Jun 2024 16:37:35 +0000 (10:37 -0600)]
drm/amd/display: Check null pointers before multiple uses
[WHAT & HOW]
Poniters, such as stream_enc and dc->bw_vbios, are null checked previously
in the same function, so Coverity warns "implies that stream_enc and
dc->bw_vbios might be null". They are used multiple times in the
subsequent code and need to be checked.
This fixes 10 FORWARD_NULL issues reported by Coverity.
Reviewed-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com>
Signed-off-by: Jerry Zuo <jerry.zuo@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Hung [Tue, 25 Jun 2024 16:35:52 +0000 (10:35 -0600)]
drm/amd/display: Check null pointers before used
[WHAT & HOW]
Poniters, such as dc->clk_mgr, are null checked previously in the same
function, so Coverity warns "implies that "dc->clk_mgr" might be null".
As a result, these pointers need to be checked when used again.
This fixes 10 FORWARD_NULL issues reported by Coverity.
Reviewed-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com>
Signed-off-by: Jerry Zuo <jerry.zuo@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Hung [Thu, 27 Jun 2024 22:45:39 +0000 (16:45 -0600)]
drm/amd/display: Check link_res->hpo_dp_link_enc before using it
[WHAT & HOW]
Functions dp_enable_link_phy and dp_disable_link_phy can pass link_res
without initializing hpo_dp_link_enc and it is necessary to check for
null before dereferencing.
This fixes 2 FORWARD_NULL issues reported by Coverity.
Reviewed-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com>
Signed-off-by: Jerry Zuo <jerry.zuo@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Dillon Varone [Wed, 3 Jul 2024 16:55:26 +0000 (12:55 -0400)]
drm/amd/display: Add P-State Keepout to dcn401 Global Sync
[WHY&HOW]
OTG has new functionality to allow P-State relative to VStartup. Keepout region
for this should be configured based on DML outputs same as other global sync
params.
Reviewed-by: Alvin Lee <alvin.lee2@amd.com>
Signed-off-by: Jerry Zuo <jerry.zuo@amd.com>
Signed-off-by: Dillon Varone <dillon.varone@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Samson Tam [Wed, 3 Jul 2024 16:23:02 +0000 (12:23 -0400)]
drm/amd/display: remove dc dependencies from SPL library
[Why]
Make SPL library dc-independent so it can be reused by other
components
[How]
Create separate set of fixed31_32 calls in SPL
Make all inputs and outputs to SPL use primitive types
For ratios and inits, return as uint32 from SPL. So
add conversion from uint32 back to fixed point in
SPL-to-dc translate function
Reviewed-by: Relja Vojvodic <relja.vojvodic@amd.com>
Signed-off-by: Jerry Zuo <jerry.zuo@amd.com>
Signed-off-by: Samson Tam <samson.tam@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Nevenko Stupar [Wed, 3 Jul 2024 17:29:55 +0000 (13:29 -0400)]
drm/amd/display: Issue with 3 or more mcaches per surface
[Why & How]
Current logic in mcache admissibility check has flaw if
calculated number of maches are 3 or more per surface,
so sometimes the check may pass when it should fail,
and sometimes may fail when it should pass, fix the
issue and also adding additional check to make sure that
required number of mcaches per surface cannot be
higher than number of pipes + 1, used on that surface.
Reviewed-by: Chaitanya Dhere <chaitanya.dhere@amd.com>
Signed-off-by: Jerry Zuo <jerry.zuo@amd.com>
Signed-off-by: Nevenko Stupar <nevenko.stupar@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alvin Lee [Wed, 3 Jul 2024 15:36:34 +0000 (11:36 -0400)]
drm/amd/display: Calculate ODM width using odm slice rect, not recout
[Description]
There are scenarios where ODM4:1 is used but the
surface is entirely outside of the first and last
ODM slice. In this case the recout.width for the
first and last slice is 0 because there's no overlap
with the surface and that ODM slice, but this causes
the x_pos for the cursor in this scenario to be
calculated incorrectly. Instead we should use the
ODM slice width instead of the recout width.
Reviewed-by: Nevenko Stupar <nevenko.stupar@amd.com>
Signed-off-by: Jerry Zuo <jerry.zuo@amd.com>
Signed-off-by: Alvin Lee <alvin.lee2@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Dillon Varone [Wed, 3 Jul 2024 14:41:26 +0000 (10:41 -0400)]
drm/amd/display: Add blanked streams override to DML2.1
[WHY]
DML2.1 currently has no concept of a "blanked" stream. For cases like DPMS off,
things like UCLK p-state is always allowed, so PMO is not required to optimize
for it.
[HOW]
Add flag to DML2.1 display configuration to indicate all streams are blanked,
so certain operations and optimizations can be skipped for optimal programming
when displays are blanked.
Reviewed-by: Chaitanya Dhere <chaitanya.dhere@amd.com>
Signed-off-by: Jerry Zuo <jerry.zuo@amd.com>
Signed-off-by: Dillon Varone <dillon.varone@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tom Chung [Wed, 3 Jul 2024 08:47:57 +0000 (16:47 +0800)]
drm/amd/display: Fix VRR cannot enable
[Why]
Sometimes the VRR cannot enable after login to the desktop.
User space may call the DRM_IOCTL_MODE_GETCONNECTOR right after
the DRM_IOCTL_MODE_RMFB.
After calling DRM_IOCTL_MODE_RMFB to remove all the frame buffer
and it will cause the driver to disable the crtc and disable the
link while calling the link_set_dpms_off().
It will cause the dpcd read failed in amdgpu_dm_update_freesync_caps()
while try to get the DP_MSA_TIMING_PAR_IGNORED capability and think
the sink side does not support VRR.
[How]
Use the dpcd_caps.allow_invalid_MSA_timing_param flag instead of
reading from dpcd directly.
dpcd_caps.allow_invalid_MSA_timing_param flag is updated during HPD.
It is safe to replace the original method.
Reviewed-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com>
Signed-off-by: Jerry Zuo <jerry.zuo@amd.com>
Signed-off-by: Tom Chung <chiahsuan.chung@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Mounika Adhuri [Wed, 26 Jun 2024 13:21:04 +0000 (18:51 +0530)]
drm/amd/display: Refactoring MPC
[Why]
To refactor MPC files
[How]
Moved MPC files to respective folders and
updated makefiles appropriately.
Reviewed-by: Martin Leung <martin.leung@amd.com>
Signed-off-by: Jerry Zuo <jerry.zuo@amd.com>
Signed-off-by: Mounika Adhuri <moadhuri@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Chaitanya Dhere [Tue, 2 Jul 2024 14:50:04 +0000 (10:50 -0400)]
drm/amd/display: DML2.1 resynchronization
July update for DML2.1 library from hardware team targeting DCN401
Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Jerry Zuo <jerry.zuo@amd.com>
Signed-off-by: Chaitanya Dhere <chaitanya.dhere@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Sung Joon Kim [Tue, 2 Jul 2024 17:30:36 +0000 (13:30 -0400)]
drm/amd/display: Do 1-to-1 mapping between OPP and DSC in DML2
[why]
To determine which block instance to power-gate,
we look at the available pipe resource for both plane
and stream. On MPO, DSC3 was falsely powered on even
though only 1 stream path was enabled because
the resource mapping was not done correctly.
[how]
Acquire the correct DSC instance to power on / off based
on the instance of OPP which determines the backend
pipe index.
Reviewed-by: Swapnil Patel <swapnil.patel@amd.com>
Signed-off-by: Jerry Zuo <jerry.zuo@amd.com>
Signed-off-by: Sung Joon Kim <sungjoon.kim@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Revalla Hari Krishna [Tue, 2 Jul 2024 11:47:40 +0000 (17:17 +0530)]
drm/amd/display: Refactoring MMHUBBUB
[Why]
To refactor MMHUBBUB files
[How]
Moved mmhubbub files from dcn20 to /mmhubbub/ folder and
update makefile to fix compilation.
Reviewed-by: Martin Leung <martin.leung@amd.com>
Signed-off-by: Jerry Zuo <jerry.zuo@amd.com>
Signed-off-by: Revalla Hari Krishna <harikrishna.revalla@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Chris Park [Fri, 28 Jun 2024 19:09:06 +0000 (15:09 -0400)]
drm/amd/display: Deallocate DML memory if allocation fails
[Why]
When DC state create DML memory allocation fails, memory is not
deallocated subsequently, resulting in uninitialized structure
that is not NULL.
[How]
Deallocate memory if DML memory allocation fails.
Reviewed-by: Joshua Aberback <joshua.aberback@amd.com>
Signed-off-by: Jerry Zuo <jerry.zuo@amd.com>
Signed-off-by: Chris Park <chris.park@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Hung [Fri, 28 Jun 2024 02:05:14 +0000 (20:05 -0600)]
drm/amd/display: Check stream before comparing them
[WHAT & HOW]
amdgpu_dm can pass a null stream to dc_is_stream_unchanged. It is
necessary to check for null before dereferencing them.
This fixes 1 FORWARD_NULL issue reported by Coverity.
Reviewed-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com>
Signed-off-by: Jerry Zuo <jerry.zuo@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Hung [Thu, 27 Jun 2024 23:38:16 +0000 (17:38 -0600)]
drm/amd/display: Check null pointers before using them
[WHAT & HOW]
These pointers are null checked previously in the same function,
indicating they might be null as reported by Coverity. As a result,
they need to be checked when used again.
This fixes 3 FORWARD_NULL issue reported by Coverity.
Reviewed-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com>
Signed-off-by: Jerry Zuo <jerry.zuo@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Hung [Thu, 27 Jun 2024 17:51:27 +0000 (11:51 -0600)]
drm/amd/display: Pass non-null to dcn20_validate_apply_pipe_split_flags
[WHAT & HOW]
"dcn20_validate_apply_pipe_split_flags" dereferences merge, and thus it
cannot be a null pointer. Let's pass a valid pointer to avoid null
dereference.
This fixes 2 FORWARD_NULL issues reported by Coverity.
Reviewed-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com>
Signed-off-by: Jerry Zuo <jerry.zuo@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Hung [Fri, 21 Jun 2024 02:23:41 +0000 (20:23 -0600)]
drm/amd/display: Check phantom_stream before it is used
dcn32_enable_phantom_stream can return null, so returned value
must be checked before used.
This fixes 1 NULL_RETURNS issue reported by Coverity.
Reviewed-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com>
Signed-off-by: Jerry Zuo <jerry.zuo@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Hung [Thu, 27 Jun 2024 23:34:18 +0000 (17:34 -0600)]
drm/amd/display: Check null-initialized variables
[WHAT & HOW]
drr_timing and subvp_pipe are initialized to null and they are not
always assigned new values. It is necessary to check for null before
dereferencing.
This fixes 2 FORWARD_NULL issues reported by Coverity.
Reviewed-by: Nevenko Stupar <nevenko.stupar@amd.com>
Reviewed-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com>
Signed-off-by: Jerry Zuo <jerry.zuo@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Hung [Tue, 18 Jun 2024 20:05:08 +0000 (14:05 -0600)]
drm/amd/display: Initialize denominators' default to 1
[WHAT & HOW]
Variables used as denominators and maybe not assigned to other values,
should not be 0. Change their default to 1 so they are never 0.
This fixes 10 DIVIDE_BY_ZERO issues reported by Coverity.
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Jerry Zuo <jerry.zuo@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Revalla Hari Krishna [Wed, 26 Jun 2024 12:33:16 +0000 (18:03 +0530)]
drm/amd/display: Refactoring OPP
[Why]
To refactor OPP files
[How]
Moved opp related files to specific opp folder and
updated Makefiles.
Acked-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com>
Signed-off-by: Jerry Zuo <jerry.zuo@amd.com>
Signed-off-by: Revalla Hari Krishna <harikrishna.revalla@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Gabe Teeger [Fri, 28 Jun 2024 20:05:36 +0000 (16:05 -0400)]
drm/amd/display: Fix DP-DVI dongle hotplug
[why]
Hotplugging with a DVI-DP dongle on pre-rdna embedded platform
working about half the time. The regression was found to be the
setting of link->type here.
[what]
Reverts fix besides the logging added.
Reviewed-by: Wenjing Liu <wenjing.liu@amd.com>
Signed-off-by: Jerry Zuo <jerry.zuo@amd.com>
Signed-off-by: Gabe Teeger <gabe.teeger@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alvin Lee [Thu, 27 Jun 2024 15:56:47 +0000 (11:56 -0400)]
drm/amd/display: Disable subvp based on HW cursor requirement
[Description]
- There are situations where HW cursor is required
- In these scenarios we should disable subvp based on the HW cursor
requirement
Reviewed-by: Dillon Varone <dillon.varone@amd.com>
Signed-off-by: Jerry Zuo <jerry.zuo@amd.com>
Signed-off-by: Alvin Lee <alvin.lee2@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alvin Lee [Thu, 27 Jun 2024 14:42:26 +0000 (10:42 -0400)]
drm/amd/display: When resync fifo ensure to use correct pipe ctx
We resync the FIFO after each pipe update in apply_ctx_to_hw.
However, this means that some pipes (in hardware) are based on the
new context and some are based on the current_state (since the pipes
are updated on at a time). In this case we must ensure to use the
pipe_ctx that's currently still configured in hardware when turning
off / on OTG's and reconfiguring ODM during the resync.
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Jerry Zuo <jerry.zuo@amd.com>
Signed-off-by: Alvin Lee <alvin.lee2@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Sridevi Arvindekar [Thu, 27 Jun 2024 13:39:33 +0000 (09:39 -0400)]
drm/amd/display: Add option to allow transition when odm is forced
Added option to allow transition for forced odm.
Add the variation to the nightly run.
Reviewed-by: Wenjing Liu <wenjing.liu@amd.com>
Signed-off-by: Jerry Zuo <jerry.zuo@amd.com>
Signed-off-by: Sridevi Arvindekar <sarvinde@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Jingwen Zhu [Tue, 25 Jun 2024 08:20:58 +0000 (16:20 +0800)]
drm/amd/display: avoid disable otg when dig was disabled
[Why]
This is a workaround for an dcn3.1 hang that happens if otg dispclk
is ramped while otg is on and stream enc is off.
But this w/a should not trigger when we have a dig active.
[How]
Avoid disable otg when dig FE/BE FIFO was not switched.
Acked-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com>
Signed-off-by: Jerry Zuo <jerry.zuo@amd.com>
Signed-off-by: Jingwen Zhu <jingwen.zhu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Relja Vojvodic [Thu, 27 Jun 2024 21:41:36 +0000 (17:41 -0400)]
drm/amd/display: Implement bias and scale pre scl
why:
New scaler needs the input to be full range color space. This will also fix
issues that come up due to not having a predefined limited color space matrix
for certain color spaces
how:
Use bias and scale HW to expand the range of limited color spaces to full
before the scaler
Reviewed-by: Krunoslav Kovac <krunoslav.kovac@amd.com>
Signed-off-by: Jerry Zuo <jerry.zuo@amd.com>
Signed-off-by: Relja Vojvodic <relja.vojvodic@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Wenjing Liu [Fri, 31 May 2024 15:37:15 +0000 (11:37 -0400)]
drm/amd/display: apply vmin optimization even if it doesn't reach vmin level
[why]
Based on power measurement result, in most cases when display clock is higher
than Vmin display clock, lowering display clock using dynamic ODM will improve
overall power consumption by 0 to 4 watts even if we can't reach Vmin.
[how]
Allow vmin optimization applied even if dispclk can't reach Vmin.
Reviewed-by: Jun Lei <jun.lei@amd.com>
Signed-off-by: Jerry Zuo <jerry.zuo@amd.com>
Signed-off-by: Wenjing Liu <wenjing.liu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Wenjing Liu [Tue, 25 Jun 2024 19:22:25 +0000 (15:22 -0400)]
drm/amd/display: fix dscclk programming sequence on DCN401
[why]
The mux to switch between refclk and dto_dsc_clk is non double buffered.
However dto dsc clk's phase and modulo divider registers are currently
configured as double buffered update. This causes a problem when we switch to
use dto dsc clk and program phase and modulo in the same sequence. In this
sequence dsc clk is switched to dto but the clock divider programming doesn't
take effect until next frame. When we try to program DSCC registers, SMN bus
will hang because dto dsc clk divider phase is set to 0.
[how]
Configure phase and modulo to take effect immediately. Always switch to dto dsc
clk before DSC clock is unagted. Switch back to refclk after DSC clock is gated.
Acked-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com>
Reviewed-by: Jerry Zuo <jerry.zuo@amd.com>
Signed-off-by: Wenjing Liu <wenjing.liu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Hung [Tue, 25 Jun 2024 19:06:43 +0000 (13:06 -0600)]
drm/amd/display: Revert "Check HDCP returned status"
This reverts commit
5d93060d430b359e16e7c555c8f151ead1ac614b due to a
power consumption regression.
Reviewed-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com>
Signed-off-by: Jerry Zuo <jerry.zuo@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Roman Li [Tue, 25 Jun 2024 17:23:36 +0000 (13:23 -0400)]
drm/amd/display: Replace assert with error message in dp_retrieve_lttpr_cap()
[Why]
When assert in dp_retrieve_lttpr_cap() is hit, dmesg has traces like:
RIP: 0010:dp_retrieve_lttpr_cap+0xcc/0x1a0 [amdgpu]
Call Trace:
<TASK>
dp_retrieve_lttpr_cap+0xcc/0x1a0 [amdgpu]
report_bug+0x1e8/0x240
handle_bug+0x46/0x80
link_detect+0x35/0x580 [amdgpu]
It happens when LTTPRs fail to increment dpcd repeater count.
We have a recovery action in place for such cases.
Assert is misleading, an indicative error in dmesg is more useful.
[How]
Remove ASSERT and use DC_LOG_ERROR instead.
Reviewed-by: Michael Strauss <michael.strauss@amd.com>
Signed-off-by: Jerry Zuo <jerry.zuo@amd.com>
Signed-off-by: Roman Li <roman.li@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Ryan Seto [Wed, 26 Jun 2024 18:53:26 +0000 (14:53 -0400)]
drm/amd/display: Added logging for automated DPM testing
[Why]
Added clock logs to automate DPM testing
[How]
Added logs and helper functions to output clocks
Co-authored-by: Ryan Seto <ryanseto@amd.com>
Reviewed-by: Alvin Lee <alvin.lee2@amd.com>
Signed-off-by: Jerry Zuo <jerry.zuo@amd.com>
Signed-off-by: Ryan Seto <ryanseto@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alvin Lee [Tue, 25 Jun 2024 20:40:51 +0000 (16:40 -0400)]
drm/amd/display: Don't consider cursor for no plane case in DML1
[Description]
For no plane scenarios we should not consider cursor as there cannot
be any cursor if there's no planes. This fixes an issue where
dc_commit_streams fails due to prefetch bandwidth requirements
(the display config + dummy planes + cursor causes the prefetch
bandwidth to exceed what is possible).
Reviewed-by: Chaitanya Dhere <chaitanya.dhere@amd.com>
Signed-off-by: Jerry Zuo <jerry.zuo@amd.com>
Signed-off-by: Alvin Lee <alvin.lee2@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Samson Tam [Thu, 20 Jun 2024 19:42:45 +0000 (15:42 -0400)]
drm/amd/display: quality improvements for EASF and ISHARP
[Why]
Update coefficients and LUT tables for scaler and sharpener
to improve quality and support different use cases (SDR/HDR)
[How]
Move scaler coefficients to new file dc_spl_scl_easf_filters.c
Remove older coefficients file dc_sp_scl_filters_old.c
Update default taps for EASF support
Update LLS policy for DON'T CARE case
Update cositing offset from 0.5 to 0.25
Add support to adjust sharpness based on level, use case,
and scaling ratio ( using discrete levels )
Apply sharpness to all RGB surfaces and both NV12 and P010
video ( in fullscreen only ). Upscale and 1:1 ratios only
Enable scaler when sharpening 1:1 ratios
Add support for coefficients that are in S1.10 format
(convert to S1.12 format)
Reviewed-by: Jun Lei <jun.lei@amd.com>
Signed-off-by: Jerry Zuo <jerry.zuo@amd.com>
Signed-off-by: Samson Tam <samson.tam@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alvin Lee [Tue, 12 Sep 2023 18:51:47 +0000 (14:51 -0400)]
drm/amd/display: Disable HBR audio for DP2 for certain ASICs
[Description]
Due to a HW bug, HBR audio is not supported for
DP2 encoders for certain ASICs.
Reviewed-by: Alvin Lee <alvin.lee2@amd.com>
Signed-off-by: Jerry Zuo <jerry.zuo@amd.com>
Signed-off-by: Alvin Lee <alvin.lee2@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tom Chung [Wed, 26 Jun 2024 08:14:24 +0000 (16:14 +0800)]
drm/amd/display: Disable replay if VRR capability is false
[Why]
The VRR need to be supported for panel replay feature.
If VRR capability is false, panel replay capability also
need to be disabled.
[How]
After update the vrr capability, the panel replay capability
also need to be check if need.
Reviewed-by: Wayne Lin <wayne.lin@amd.com>
Signed-off-by: Jerry Zuo <jerry.zuo@amd.com>
Signed-off-by: Tom Chung <chiahsuan.chung@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Sunil Khatri [Tue, 16 Jul 2024 10:45:57 +0000 (16:15 +0530)]
drm/amdgpu: add print support for sdma_v_5_0 ip_dump
Add support for ip dump for sdma_v_5_0 in devcoredump.
Signed-off-by: Sunil Khatri <sunil.khatri@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Sunil Khatri [Tue, 16 Jul 2024 10:40:26 +0000 (16:10 +0530)]
drm/amdgpu: Add sdma_v5_0 ip dump for devcoredump
Add ip dump for sdma_v5_0 for devcoredump for all
instances of sdma.
Signed-off-by: Sunil Khatri <sunil.khatri@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Sunil Khatri [Tue, 16 Jul 2024 10:13:44 +0000 (15:43 +0530)]
drm/amdgpu: add print support for sdma_v_6_0 ip_dump
Add print support for ip dump for sdma_v_6_0 in
devcoredump.
Signed-off-by: Sunil Khatri <sunil.khatri@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Sunil Khatri [Tue, 16 Jul 2024 09:52:56 +0000 (15:22 +0530)]
drm/amdgpu: Add sdma_v6_0 ip dump for devcoredump
Add ip dump for sdma_v6_0 for devcoredump for all
instances of sdma.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sunil Khatri <sunil.khatri@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Sunil Khatri [Fri, 12 Jul 2024 12:25:33 +0000 (17:55 +0530)]
drm/amdgpu: fix the print message in devcoredump
Fix the memory type logged for gtt memory size
which is wrongly logged as visible vram size.
Signed-off-by: Sunil Khatri <sunil.khatri@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Sunil Khatri [Tue, 16 Jul 2024 10:20:49 +0000 (15:50 +0530)]
drm/amdgpu: fix the extra space between two functions
fix extra line space between two functions.
Signed-off-by: Sunil Khatri <sunil.khatri@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Sunil Khatri [Fri, 12 Jul 2024 11:14:36 +0000 (16:44 +0530)]
drm/amdgpu: add print support for sdma_v_5_2 ip_dump
Add support for ip dump for sdma_v_5_2 in devcoredump.
Signed-off-by: Sunil Khatri <sunil.khatri@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Sunil Khatri [Fri, 12 Jul 2024 10:47:46 +0000 (16:17 +0530)]
drm/amdgpu: Add sdma_v5_2 ip dump for devcoredump
Add ip dump for sdma_v5_2 for devcoredump for all
instances of sdma.
Signed-off-by: Sunil Khatri <sunil.khatri@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Dave Airlie [Mon, 22 Jul 2024 03:03:42 +0000 (13:03 +1000)]
Merge tag 'amd-drm-fixes-6.11-2024-07-18' of https://gitlab.freedesktop.org/agd5f/linux into drm-next
amd-drm-fixes-6.11-2024-07-18:
amdgpu:
- Bump driver version for GFX12 DCC
- DC documention warning fixes
- VCN unified queue power fix
- SMU fix
- RAS fix
- Display corruption fix
Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Alex Deucher <alexander.deucher@amd.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240718215258.79356-1-alexander.deucher@amd.com
Dave Airlie [Mon, 22 Jul 2024 02:52:55 +0000 (12:52 +1000)]
Merge tag 'drm-misc-next-fixes-2024-07-19' of https://gitlab.freedesktop.org/drm/misc/kernel into drm-next
Two fixes for v3d to fix an array indexing on newer V3D revisions.
Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Maxime Ripard <mripard@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240719-emerald-newt-of-skill-89b54a@houat
Dave Airlie [Mon, 22 Jul 2024 01:51:48 +0000 (11:51 +1000)]
Merge tag 'drm-xe-next-fixes-2024-07-18' of https://gitlab.freedesktop.org/drm/xe/kernel into drm-next
- Xe_exec ioctl minor fix on sync entry cleanup upon error (Ashutosh)
- SRIOV: limit VF LMEM provisioning (Michal)
- Wedge mode fixes (Brost)
Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/Zpk6CI0FDoTJwkSb@intel.com
Dave Airlie [Mon, 22 Jul 2024 00:51:47 +0000 (10:51 +1000)]
Merge tag 'drm-intel-next-fixes-2024-07-18' of https://gitlab.freedesktop.org/drm/i915/kernel into drm-next
- Reset intel_dp->link_trained before retraining the link [dp] (Imre Deak)
- Don't switch the LTTPR mode on an active link [dp] (Imre Deak)
Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Tvrtko Ursulin <tursulin@igalia.com>
Link: https://patchwork.freedesktop.org/patch/msgid/ZpjgtowjpUZoHvrl@linux
Matthew Brost [Tue, 16 Jul 2024 06:39:02 +0000 (23:39 -0700)]
drm/xe: Don't suspend device upon wedge
When wedging a device we shouldn't be suspending device as state for
debug will be lost.
Also this appears to not work as the below stack trace pops upon trying
to resume a wedged device:
[ 304.245044] INFO: task cat:12115 blocked for more than 151 seconds.
[ 304.251333] Tainted: G W 6.10.0-rc7-xe+ #3518
[ 304.257617] "echo 0 > /proc/sys/kernel/hung_task_timeout_secs" disables this message.
[ 304.265459] task:cat state:D stack:13384 pid:12115 tgid:12115 ppid:3986 flags:0x00000006
[ 304.265465] Call Trace:
[ 304.265467] <TASK>
[ 304.265469] __schedule+0x3c4/0xdf0
[ 304.265478] schedule+0x3c/0x140
[ 304.265481] rpm_resume+0x1cc/0x740
[ 304.265484] ? __pfx_autoremove_wake_function+0x10/0x10
[ 304.265489] __pm_runtime_resume+0x49/0x80
[ 304.265494] guc_info+0x6b/0xb0 [xe]
[ 304.265538] ? __pfx___drm_printfn_seq_file+0x10/0x10
[ 304.265541] ? __pfx___drm_puts_seq_file+0x10/0x10
[ 304.265545] seq_read_iter+0x111/0x4c0
[ 304.265551] seq_read+0xfc/0x140
[ 304.265556] full_proxy_read+0x58/0x80
[ 304.265560] vfs_read+0xa7/0x360
[ 304.265563] ? find_held_lock+0x2b/0x80
[ 304.265568] ksys_read+0x64/0xe0
[ 304.265571] do_syscall_64+0x68/0x140
[ 304.265575] entry_SYSCALL_64_after_hwframe+0x76/0x7e
[ 304.265578] RIP: 0033:0x7f4254d14992
[ 304.265580] RSP: 002b:
00007ffc558666f8 EFLAGS:
00000246 ORIG_RAX:
0000000000000000
[ 304.265583] RAX:
ffffffffffffffda RBX:
0000000000020000 RCX:
00007f4254d14992
[ 304.265584] RDX:
0000000000020000 RSI:
00007f4254ebb000 RDI:
0000000000000003
[ 304.265586] RBP:
00007f4254ebb000 R08:
00007f4254eba010 R09:
00007f4254eba010
[ 304.265587] R10:
0000000000000022 R11:
0000000000000246 R12:
0000000000022000
[ 304.265588] R13:
0000000000000003 R14:
0000000000020000 R15:
0000000000020000
[ 304.265593] </TASK>
[ 304.265594]
Showing all locks held in the system:
[ 304.265598] 1 lock held by khungtaskd/57:
[ 304.265599] #0:
ffffffff8273b860 (rcu_read_lock){....}-{1:2}, at: debug_show_all_locks+0x36/0x1c0
[ 304.265607] 3 locks held by kworker/6:1/90:
[ 304.265610] 1 lock held by in:imklog/547:
[ 304.265611] #0:
ffff88810498cd88 (&f->f_pos_lock){+.+.}-{3:3}, at: __fdget_pos+0x76/0xc0
[ 304.265620] 1 lock held by dmesg/1310:
v2: Drop local 'err' variable (Jonathan)
Fixes:
8ed9aaae39f3 ("drm/xe: Force wedged state and block GT reset upon any GPU hang")
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240716063902.1390130-2-matthew.brost@intel.com
(cherry picked from commit
452bca0edbd0764ca0284239d5438b3edd305ab3)
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Matthew Brost [Tue, 16 Jul 2024 06:39:01 +0000 (23:39 -0700)]
drm/xe: Wedge the entire device
Wedge the entire device, not just GT which may have triggered the wedge.
To implement this, cleanup the layering so xe_device_declare_wedged()
calls into the lower layers (GT) to ensure entire device is wedged.
While we are here, also signal any pending GT TLB invalidations upon
wedging device.
Lastly, short circuit reset wait if device is wedged.
v2:
- Short circuit reset wait if device is wedged (Local testing)
Fixes:
8ed9aaae39f3 ("drm/xe: Force wedged state and block GT reset upon any GPU hang")
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240716063902.1390130-1-matthew.brost@intel.com
(cherry picked from commit
7dbe8af13c189f5937e87e9fb924d5bbc49e6f71)
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>