linux-2.6-microblaze.git
7 years agodrm/amd/powerplay: using MinFClock/MaxFclock to report Min/Max memory clock limits
Hawking Zhang [Tue, 23 May 2017 10:26:14 +0000 (18:26 +0800)]
drm/amd/powerplay: using MinFClock/MaxFclock to report Min/Max memory clock limits

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/radeon: Cleanup pageflipping IRQ handling for evergreen, si
Lyude [Fri, 19 May 2017 23:48:39 +0000 (19:48 -0400)]
drm/radeon: Cleanup pageflipping IRQ handling for evergreen, si

Same as the previous patch, but for pageflipping now. This also lets us
clear up the copy paste for vblank/vline IRQs.

Changes since v1:
- Preserve the order all registers are written back

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Lyude <lyude@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/radeon: Cleanup HDMI audio interrupt handling for evergreen
Lyude [Fri, 19 May 2017 23:48:38 +0000 (19:48 -0400)]
drm/radeon: Cleanup HDMI audio interrupt handling for evergreen

Same as the previous patch, but now for handling HDMI audio interrupts.

Changes since v1:
- Preserve the order we write back all registers

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Lyude <lyude@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/radeon: Cleanup display interrupt handling for evergreen, si
Lyude [Fri, 19 May 2017 23:48:37 +0000 (19:48 -0400)]
drm/radeon: Cleanup display interrupt handling for evergreen, si

The current code here is really, really bad. A huge amount of it looks
to be copy pasted, it has some weird hatred of arrays and code sharing,
switch cases everywhere for things that really don't need them, and it
makes the file seem immensely more complex then it actually is. This is
a pain for maintanence, and is vulnerable to more weird irq handling
bugs.

So, let's start cleaning this up a bit. Modify all of the IRQ handlers
for evergreen/si so that they just use for loops. As well, we add a
helper function radeon_irq_kms_set_irq_n_enabled(), whose purpose is
just to update the state of registers that enable/disable interrupts
while printing any changes to the set of enabled interrupts to the
kernel log.

Note in this commit, since vblank/vline irq acking is intertwined with
page flip irq acking, we can't cut out all of the copy paste in
evergreen/si_irq_ack() just yet.

Changes since v1:
- Preserve order we write back all registers

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Lyude <lyude@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu/gfx9: Switch baremetal to use KIQ for compute ring management. (v4)
Alex Deucher [Mon, 17 Apr 2017 21:51:00 +0000 (17:51 -0400)]
drm/amdgpu/gfx9: Switch baremetal to use KIQ for compute ring management. (v4)

KIQ is the Kernel Interface Queue for managing the MEC.  Rather than setting
up rings via direct MMIO of ring registers, the rings are configured via
special packets sent to the KIQ.  The allows the MEC to better manage shared
resources and certain power events. It also reduces the code paths in the
driver to support and is required for MEC powergating.

v2: drop gfx_v9_0_cp_compute_fini() as well
v3: rebase on latest changes derived from gfx8, add unmap queues on
hw_fini
v4: fix copy/paste typo in error message (Rex)

Acked-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu/gfx9: fix resume of KIQ and KCQs (v2)
Alex Deucher [Mon, 17 Apr 2017 21:24:47 +0000 (17:24 -0400)]
drm/amdgpu/gfx9: fix resume of KIQ and KCQs (v2)

No need to reset the wptr and clear the rings.  The UNMAP_QUEUES
packet writes the current MQD state back the MQD on suspend,
so there is no need to reset it as well.

v2: fix from gfx8 (Rex)

Acked-by: Tom St Denis <tom.stdenis@amd.com>
Acked-by: monk liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu/gfx9: move SET_RESOURCES into the same command stream
Alex Deucher [Mon, 17 Apr 2017 21:10:11 +0000 (17:10 -0400)]
drm/amdgpu/gfx9: move SET_RESOURCES into the same command stream

As the KCQ setup.  This way we only have to wait once for the
entire MEC.

Acked-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu/gfx9: wait once for all KCQs to be created
Alex Deucher [Mon, 17 Apr 2017 21:05:02 +0000 (17:05 -0400)]
drm/amdgpu/gfx9: wait once for all KCQs to be created

Rather than waiting for each queue.

Acked-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: monk liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: split gfx_v9_0_kiq_init_queue into two
Alex Deucher [Mon, 17 Apr 2017 20:39:13 +0000 (16:39 -0400)]
drm/amdgpu: split gfx_v9_0_kiq_init_queue into two

One for KIQ and one for the KCQ. This simplifies the logic and
allows for future optimizations.

Acked-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: properly byteswap gpu_info firmware
Alex Deucher [Thu, 11 May 2017 23:09:49 +0000 (19:09 -0400)]
drm/amdgpu: properly byteswap gpu_info firmware

It's stored in LE format.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/powerplay: PP/DAL interface changes for dynamic clock switch
Rex Zhu [Fri, 21 Apr 2017 06:02:10 +0000 (14:02 +0800)]
drm/amd/powerplay: PP/DAL interface changes for dynamic clock switch

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/powerplay: add function set_clock_limit for Rv.
Rex Zhu [Fri, 21 Apr 2017 05:15:05 +0000 (13:15 +0800)]
drm/amd/powerplay: add function set_clock_limit for Rv.

Sets floors for various clocks depending on current
requirements.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/powerplay: add new clock type in struct gfx_arbit.
Rex Zhu [Fri, 21 Apr 2017 05:14:01 +0000 (13:14 +0800)]
drm/amd/powerplay: add new clock type in struct gfx_arbit.

Add the new clock type to the gfx arbitor so we can determine
the proper clock floors for it.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/powerplay: add new clock type for Rv
Rex Zhu [Fri, 21 Apr 2017 06:01:30 +0000 (14:01 +0800)]
drm/amd/powerplay: add new clock type for Rv

New clock type on RV.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/powerplay: print msg id when smu failed.
Rex Zhu [Fri, 21 Apr 2017 02:32:09 +0000 (10:32 +0800)]
drm/amd/powerplay: print msg id when smu failed.

Print the failed msg when it fails.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/powerplay: add new smu message for Rv
Rex Zhu [Fri, 21 Apr 2017 07:04:07 +0000 (15:04 +0800)]
drm/amd/powerplay: add new smu message for Rv

Add additional smu messages.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/powerplay: delete duplicated code in vega10_hwmgr.c
Rex Zhu [Tue, 23 May 2017 05:16:09 +0000 (13:16 +0800)]
drm/amd/powerplay: delete duplicated code in vega10_hwmgr.c

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: add an INFO query for monitoring VRAM CPU page faults
Marek Olšák [Wed, 17 May 2017 18:05:08 +0000 (20:05 +0200)]
drm/amdgpu: add an INFO query for monitoring VRAM CPU page faults

v2: bump the DRM version

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/amdgpu: Return error if initiating read out of range on vram
Tom St Denis [Tue, 23 May 2017 15:35:22 +0000 (11:35 -0400)]
drm/amd/amdgpu: Return error if initiating read out of range on vram

If you initiate a read that is out of the VRAM address space return
ENXIO instead of 0.

Reads that begin below that point will read upto the VRAM limit as
before.

Cc: stable@vger.kernel.org
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/radeon: Add module param to control CIK support
Felix Kuehling [Thu, 20 Apr 2017 18:41:34 +0000 (14:41 -0400)]
drm/radeon: Add module param to control CIK support

If AMDGPU supports CIK, add a module parameter to control CIK
support in radeon. It's off by default in radeon, while it will be
on by default in AMDGPU.

Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Acked-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/amdgpu: Clean up gmc6 wait_for_idle
Tom St Denis [Mon, 15 May 2017 18:22:39 +0000 (14:22 -0400)]
drm/amd/amdgpu: Clean up gmc6 wait_for_idle

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/amdgpu: Tidy up static int dce_v6_0_get_num_crtc()
Tom St Denis [Mon, 15 May 2017 14:46:17 +0000 (10:46 -0400)]
drm/amd/amdgpu: Tidy up static int dce_v6_0_get_num_crtc()

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/amdgpu: Drop commented out stub function
Tom St Denis [Mon, 15 May 2017 13:23:25 +0000 (09:23 -0400)]
drm/amd/amdgpu: Drop commented out stub function

Drop the function gmc_v6_0_init_compute_vmid() since it wasn't
implemented and commented out.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/amdgpu: Tidy up of gfx_v6_0_setup_rb()
Tom St Denis [Mon, 15 May 2017 13:22:05 +0000 (09:22 -0400)]
drm/amd/amdgpu: Tidy up of gfx_v6_0_setup_rb()

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/amdgpu: gfx6 tidy up raster config
Tom St Denis [Mon, 15 May 2017 13:19:48 +0000 (09:19 -0400)]
drm/amd/amdgpu: gfx6 tidy up raster config

Clean up coding style in gfx_v6_0_write_harvested_raster_configs()

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/amdgpu: Clean up GFX6 tilemode programming
Tom St Denis [Mon, 15 May 2017 12:27:06 +0000 (08:27 -0400)]
drm/amd/amdgpu: Clean up GFX6 tilemode programming

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: fix merge of vcn_v1_0.c v2
Christian König [Mon, 22 May 2017 11:22:34 +0000 (13:22 +0200)]
drm/amdgpu: fix merge of vcn_v1_0.c v2

That line got missed during the merge.

v2: fix vcn_v1_0_enc_ring_emit_vm_flush as well

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: move adjust adjust_mc_addr into the GFX9 vm_flush functions
Christian König [Fri, 12 May 2017 12:46:23 +0000 (14:46 +0200)]
drm/amdgpu: move adjust adjust_mc_addr into the GFX9 vm_flush functions

That GFX9 needs a PDE in the registers is entirely GFX9 specific.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: change default of amdgpu_vram_page_split to 512
Christian König [Wed, 10 May 2017 12:26:09 +0000 (14:26 +0200)]
drm/amdgpu: change default of amdgpu_vram_page_split to 512

512 is enough for one PD entry on Vega10.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: fix ocl test performance drop
Flora Cui [Thu, 18 May 2017 05:56:22 +0000 (13:56 +0800)]
drm/amdgpu: fix ocl test performance drop

partial revert commit <6971d3d> - drm/amdgpu: cleanup logic in
amdgpu_vm_flush

Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <David1.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu/sdma3: correct wptr initialization for sdma
Yintian Tao [Fri, 12 May 2017 06:55:56 +0000 (14:55 +0800)]
drm/amdgpu/sdma3: correct wptr initialization for sdma

If doorbell is used for wptr update, we also need to use it
to initialize wptr to 0.

Signed-off-by: Yintian Tao <yttao@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: cleanup VM manager init/fini
Christian König [Thu, 11 May 2017 14:21:20 +0000 (16:21 +0200)]
drm/amdgpu: cleanup VM manager init/fini

VM is mandatory for all hw amdgpu supports. So remove the leftovers
to make it optionally.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: add dep_sync for amdgpu job
Chunming Zhou [Thu, 18 May 2017 07:19:03 +0000 (15:19 +0800)]
drm/amdgpu: add dep_sync for amdgpu job

The fence in dep_sync cannot be optimized.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Tested and Reviewed-by: Roger.He <Hongbo.He@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu/gfx9: update golden settings
Ken Wang [Thu, 18 May 2017 05:33:54 +0000 (13:33 +0800)]
drm/amdgpu/gfx9: update golden settings

Update gfx9 golden settings.

Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: skip all jobs of guilty vm
Chunming Zhou [Tue, 16 May 2017 06:34:27 +0000 (14:34 +0800)]
drm/amdgpu: skip all jobs of guilty vm

If the vm is guilty of a GPU reset, skips all its jobs.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: return -ENODEV to user space when vram is lost v2
Chunming Zhou [Mon, 15 May 2017 08:48:27 +0000 (16:48 +0800)]
drm/amdgpu: return -ENODEV to user space when vram is lost v2

below ioctl will return -ENODEV:
amdgpu_cs_ioctl
amdgpu_cs_wait_ioctl
amdgpu_cs_wait_fences_ioctl
amdgpu_gem_va_ioctl
amdgpu_info_ioctl

v2: only for map and replace cases in amdgpu_gem_va_ioctl

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: check if vram is lost v2
Chunming Zhou [Mon, 15 May 2017 06:20:00 +0000 (14:20 +0800)]
drm/amdgpu: check if vram is lost v2

backup first 64 byte of gart table as reset magic, check if magic is same
after gpu hw reset.
v2: use memcmp instead of manual innovation.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/powerplay: Fix Vega10 power profile switching
Felix Kuehling [Mon, 15 May 2017 08:08:28 +0000 (04:08 -0400)]
drm/amd/powerplay: Fix Vega10 power profile switching

Clock index 0 is a valid index that is needed to restore the default
graphics power profile. Use ~0 to indicate a failure to find a clock
index. This fixes the clocks getting stuck in the compute power
profile after running a compute application on Vega10.

Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Reviewed-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: add raven gpu_info support
Alex Deucher [Tue, 9 May 2017 16:27:35 +0000 (12:27 -0400)]
drm/amdgpu: add raven gpu_info support

Add support for parsing the gpu info table on raven.
This is required to get the gpu config data for raven.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: correct emit frame size for vcn dec/enc ring
Hawking Zhang [Mon, 15 May 2017 10:08:18 +0000 (18:08 +0800)]
drm/amdgpu: correct emit frame size for vcn dec/enc ring

only mmhub will be invalidated during vcn dec/enc vm flush

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: correct vmhub for vcn dec/enc ring
Hawking Zhang [Mon, 15 May 2017 09:03:02 +0000 (17:03 +0800)]
drm/amdgpu: correct vmhub for vcn dec/enc ring

This got missed due to differences in the trees
when raven support was merged.

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: ken wang <Qingqing.Wang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/powerplay: fix array_size.cocci warnings
kbuild test robot [Thu, 11 May 2017 01:30:28 +0000 (09:30 +0800)]
drm/amd/powerplay: fix array_size.cocci warnings

drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/rv_hwmgr.c:75:42-43: WARNING: Use ARRAY_SIZE
drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/rv_hwmgr.c:466:22-23: WARNING: Use ARRAY_SIZE
drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/rv_hwmgr.c:468:22-23: WARNING: Use ARRAY_SIZE
drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/rv_hwmgr.c:470:20-21: WARNING: Use ARRAY_SIZE
drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/rv_hwmgr.c:473:22-23: WARNING: Use ARRAY_SIZE
drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/rv_hwmgr.c:475:21-22: WARNING: Use ARRAY_SIZE
drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/rv_hwmgr.c:477:21-22: WARNING: Use ARRAY_SIZE

 Use ARRAY_SIZE instead of dividing sizeof array with sizeof an element

Semantic patch information:
 This makes an effort to find cases where ARRAY_SIZE can be used such as
 where there is a division of sizeof the array by the sizeof its first
 element or by any indexed element or the element type. It replaces the
 division of the two sizeofs by ARRAY_SIZE.

Generated by: scripts/coccinelle/misc/array_size.cocci

CC: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Fengguang Wu <fengguang.wu@intel.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu/vcn: remove duplicate mask
Alex Deucher [Thu, 11 May 2017 20:44:56 +0000 (16:44 -0400)]
drm/amdgpu/vcn: remove duplicate mask

Looks like a copy past issue.

Reported-by: Julia Lawall <julia.lawall@lip6.fr>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: add RAVEN pci id (v2)
Chunming Zhou [Thu, 11 May 2017 20:31:52 +0000 (16:31 -0400)]
drm/amdgpu: add RAVEN pci id (v2)

Add the RAVEN pci id.

v2: add exp flag for now (Alex)

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd: Add DCN ivsrcids (v2)
Andrey Grodzovsky [Wed, 1 Feb 2017 15:12:19 +0000 (10:12 -0500)]
drm/amd: Add DCN ivsrcids (v2)

v2: squash in some updates (Alex)

Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu/powerplay/raven: add smu block and enable powerplay
Hawking Zhang [Thu, 11 May 2017 20:30:31 +0000 (16:30 -0400)]
drm/amdgpu/powerplay/raven: add smu block and enable powerplay

Add the ip block and enable powerplay on raven.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu/raven: power up/down VCN via the SMU (v2)
Alex Deucher [Tue, 14 Mar 2017 21:57:35 +0000 (17:57 -0400)]
drm/amdgpu/raven: power up/down VCN via the SMU (v2)

By default VCN is powered down like SDMA, power it up/down
on driver load/unload.

[Rui: Fix to add the parameter 0 to un-gate VCN] v2

Acked-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/powerplay/rv: power up/down sdma via the SMU
Chunming Zhou [Fri, 10 Mar 2017 06:48:09 +0000 (14:48 +0800)]
drm/amd/powerplay/rv: power up/down sdma via the SMU

sdma is powered down by default in vbios,
need to power up in driver init.  Power it down
again on driver tear down.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/powerplay: add raven support in hwmgr. (v2)
Rex Zhu [Thu, 11 May 2017 20:38:38 +0000 (16:38 -0400)]
drm/amd/powerplay: add raven support in hwmgr. (v2)

hwmgr handles the GPU power state management.

v2: squash in updates (Alex)

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/powerplay: add raven support in smumgr. (v2)
Rex Zhu [Mon, 6 Mar 2017 11:10:08 +0000 (19:10 +0800)]
drm/amd/powerplay: add raven support in smumgr. (v2)

smumgr provides the interface for interacting with the
smu firmware which handles power management.

v2: squash in updates (Alex)

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/powerplay: add ppt_v3 define
Rex Zhu [Sun, 5 Feb 2017 10:50:22 +0000 (18:50 +0800)]
drm/amd/powerplay: add ppt_v3 define

defines clock dependencies for raven.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: add raven related define in pptable.h.
Rex Zhu [Sun, 5 Feb 2017 06:53:36 +0000 (14:53 +0800)]
drm/amdgpu: add raven related define in pptable.h.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu/powerplay: add header file for smu10. (v2)
Rex Zhu [Sat, 4 Feb 2017 06:24:02 +0000 (14:24 +0800)]
drm/amdgpu/powerplay: add header file for smu10. (v2)

Headers define the driver/fw interface for smu10.

v2: squash in updates (Alex)

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: enable sw clock gating for vcn
Huang Rui [Thu, 20 Apr 2017 02:18:13 +0000 (10:18 +0800)]
drm/amdgpu: enable sw clock gating for vcn

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu/vcn: add sw clock gating
Huang Rui [Thu, 20 Apr 2017 01:42:41 +0000 (09:42 +0800)]
drm/amdgpu/vcn: add sw clock gating

Add sw controlled clockgating for VCN.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: update vcn decode create msg
Leo Liu [Thu, 30 Mar 2017 16:00:25 +0000 (12:00 -0400)]
drm/amdgpu: update vcn decode create msg

Based on new vcn firmware interface changes

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: add vcn firmware header offset
Leo Liu [Wed, 29 Mar 2017 18:15:15 +0000 (14:15 -0400)]
drm/amdgpu: add vcn firmware header offset

New firmware add psp header.

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: get cs support for AMDGPU_HW_IP_VCN_ENC
Leo Liu [Tue, 21 Feb 2017 16:24:09 +0000 (11:24 -0500)]
drm/amdgpu: get cs support for AMDGPU_HW_IP_VCN_ENC

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: add AMDGPU_HW_IP_VCN_ENC to info query
Leo Liu [Tue, 21 Feb 2017 16:23:28 +0000 (11:23 -0500)]
drm/amdgpu: add AMDGPU_HW_IP_VCN_ENC to info query

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: add vcn enc ib test
Leo Liu [Mon, 8 May 2017 21:31:31 +0000 (17:31 -0400)]
drm/amdgpu: add vcn enc ib test

Update and enable the vcn encode IB test.

Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: enable vcn encode ring tests
Leo Liu [Tue, 21 Feb 2017 15:38:42 +0000 (10:38 -0500)]
drm/amdgpu: enable vcn encode ring tests

Wire up the callback and enable them.

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: add vcn enc irq support
Leo Liu [Tue, 21 Feb 2017 20:19:18 +0000 (15:19 -0500)]
drm/amdgpu: add vcn enc irq support

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: add vcn enc ring type and functions
Leo Liu [Tue, 21 Feb 2017 15:36:15 +0000 (10:36 -0500)]
drm/amdgpu: add vcn enc ring type and functions

Add the ring function callbacks for the encode rings.

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: add vcn enc rings
Leo Liu [Tue, 21 Feb 2017 20:21:18 +0000 (15:21 -0500)]
drm/amdgpu: add vcn enc rings

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: change vcn dec rb command specific for decode
Leo Liu [Wed, 15 Feb 2017 15:16:25 +0000 (10:16 -0500)]
drm/amdgpu: change vcn dec rb command specific for decode

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: add vcn ip block to soc15
Leo Liu [Wed, 28 Dec 2016 18:36:00 +0000 (13:36 -0500)]
drm/amdgpu: add vcn ip block to soc15

Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: implement new vcn cache window programming
Leo Liu [Tue, 7 Feb 2017 21:11:20 +0000 (16:11 -0500)]
drm/amdgpu: implement new vcn cache window programming

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: Disable uvd and vce free handles for raven
Leo Liu [Sun, 5 Feb 2017 20:19:57 +0000 (15:19 -0500)]
drm/amdgpu: Disable uvd and vce free handles for raven

Not required on raven.

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: get cs support of AMDGPU_HW_IP_VCN_DEC
Leo Liu [Wed, 25 Jan 2017 20:05:53 +0000 (15:05 -0500)]
drm/amdgpu: get cs support of AMDGPU_HW_IP_VCN_DEC

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: add AMDGPU_HW_IP_VCN_DEC to info query
Leo Liu [Wed, 25 Jan 2017 20:04:20 +0000 (15:04 -0500)]
drm/amdgpu: add AMDGPU_HW_IP_VCN_DEC to info query

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agouapi/drm: add AMDGPU_HW_IP_VCN_ENC for encode CS
Leo Liu [Wed, 15 Feb 2017 15:24:55 +0000 (10:24 -0500)]
uapi/drm: add AMDGPU_HW_IP_VCN_ENC for encode CS

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agouapi/drm: add AMDGPU_HW_IP_VCN_DEC for decode CS
Leo Liu [Tue, 7 Feb 2017 16:57:08 +0000 (11:57 -0500)]
uapi/drm: add AMDGPU_HW_IP_VCN_DEC for decode CS

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu/vcn: implement ib tests with new message buffer interface
Leo Liu [Sun, 5 Feb 2017 17:40:30 +0000 (12:40 -0500)]
drm/amdgpu/vcn: implement ib tests with new message buffer interface

Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: implement insert end ring function for vcn decode
Leo Liu [Wed, 25 Jan 2017 19:37:41 +0000 (14:37 -0500)]
drm/amdgpu: implement insert end ring function for vcn decode

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: implement vcn start RB command
Leo Liu [Tue, 7 Feb 2017 16:52:00 +0000 (11:52 -0500)]
drm/amdgpu: implement vcn start RB command

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: add a ring func for vcn start command
Leo Liu [Thu, 11 May 2017 20:29:08 +0000 (16:29 -0400)]
drm/amdgpu: add a ring func for vcn start command

Needed for the proper command sequence for VCN.

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: expose vcn RB command
Leo Liu [Tue, 7 Feb 2017 16:47:12 +0000 (11:47 -0500)]
drm/amdgpu: expose vcn RB command

Signed-off-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: move vcn ring test to amdgpu_vcn.c
Leo Liu [Mon, 6 Feb 2017 16:52:46 +0000 (11:52 -0500)]
drm/amdgpu: move vcn ring test to amdgpu_vcn.c

Hope it will be generic for vcn later

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: re-group the functions in amdgpu_vcn.c
Leo Liu [Mon, 6 Feb 2017 15:52:46 +0000 (10:52 -0500)]
drm/amdgpu: re-group the functions in amdgpu_vcn.c

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: move amdgpu_vcn structure to vcn header
Leo Liu [Thu, 11 May 2017 20:27:33 +0000 (16:27 -0400)]
drm/amdgpu: move amdgpu_vcn structure to vcn header

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: add vcn ip block and type
Leo Liu [Wed, 28 Dec 2016 18:04:16 +0000 (13:04 -0500)]
drm/amdgpu: add vcn ip block and type

Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: add vcn irq functions
Leo Liu [Wed, 28 Dec 2016 18:22:18 +0000 (13:22 -0500)]
drm/amdgpu: add vcn irq functions

Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: add vcn decode ring type and functions
Leo Liu [Fri, 5 May 2017 15:40:59 +0000 (11:40 -0400)]
drm/amdgpu: add vcn decode ring type and functions

Add the ring function callbacks for the decode ring.

Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: add vcn decode ring support
Leo Liu [Wed, 28 Dec 2016 17:16:48 +0000 (12:16 -0500)]
drm/amdgpu: add vcn decode ring support

Add the decode ring init.

Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: add vcn ip block functions (v2)
Leo Liu [Wed, 28 Dec 2016 16:57:38 +0000 (11:57 -0500)]
drm/amdgpu: add vcn ip block functions (v2)

Fill in the core VCN 1.0 setup functionality.

v2: squash in fixup (Alex)

Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: add encode tests for vcn
Leo Liu [Wed, 21 Dec 2016 18:56:44 +0000 (13:56 -0500)]
drm/amdgpu: add encode tests for vcn

Add encode ring and ib tests.

Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: add initial vcn support and decode tests
Leo Liu [Wed, 21 Dec 2016 18:21:52 +0000 (13:21 -0500)]
drm/amdgpu: add initial vcn support and decode tests

VCN is the new media block on Raven. Add core support
and the ring and ib tests for decode.

Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu/soc15: add psp ip block
Huang Rui [Thu, 11 May 2017 20:26:16 +0000 (16:26 -0400)]
drm/amdgpu/soc15: add psp ip block

Signed-off-by: Huang Rui <ray.huang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: register the psp v10 function pointers at psp sw_init
Huang Rui [Fri, 16 Dec 2016 02:08:48 +0000 (10:08 +0800)]
drm/amdgpu: register the psp v10 function pointers at psp sw_init

Add the psp 10.0 callbacks for PSP.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: add psp v10 ip block
Huang Rui [Fri, 16 Dec 2016 02:01:55 +0000 (10:01 +0800)]
drm/amdgpu: add psp v10 ip block

Add the ip block version structure for psp 10.0.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: add psp v10 function callback for raven
Huang Rui [Thu, 4 May 2017 19:28:30 +0000 (15:28 -0400)]
drm/amdgpu: add psp v10 function callback for raven

PSP is the security processor.  These are the support
functions.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: add nbio MGCG for raven
Huang Rui [Mon, 27 Feb 2017 06:01:55 +0000 (14:01 +0800)]
drm/amdgpu: add nbio MGCG for raven

Add medium grained nbio clockgating implementation.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: apply nbio7 for Raven (v3)
Chunming Zhou [Thu, 4 May 2017 19:06:25 +0000 (15:06 -0400)]
drm/amdgpu: apply nbio7 for Raven (v3)

nbio handles misc bus io operations. Handle
differences between different nbio bus versions.

v2: switch checks from RAVEN to APU (Alex)
    squash in raven rev id fetch
    squash in fix uninitalized hdp flush reg index for raven
v3: add some missed RAVEN to APU checks (Alex)

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: add nbio7 support
Chunming Zhou [Thu, 4 May 2017 18:59:54 +0000 (14:59 -0400)]
drm/amdgpu: add nbio7 support

NBIO handles misc bus io functions on the chip.  This
helper lib has the apppropriate functions for NBIO 7.0.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: enable sdma power gating for raven
Huang Rui [Fri, 5 May 2017 18:29:42 +0000 (14:29 -0400)]
drm/amdgpu: enable sdma power gating for raven

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu/sdma4: add dynamic power gating for raven
Huang Rui [Tue, 28 Feb 2017 08:13:32 +0000 (16:13 +0800)]
drm/amdgpu/sdma4: add dynamic power gating for raven

Add the functions to enable dynamic powergating.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: init sdma power gating for raven
Huang Rui [Tue, 28 Feb 2017 08:07:48 +0000 (16:07 +0800)]
drm/amdgpu: init sdma power gating for raven

Initialize sdma for powergating.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: enable sdma v4 MGCG and LS for raven
Huang Rui [Fri, 5 May 2017 18:28:27 +0000 (14:28 -0400)]
drm/amdgpu: enable sdma v4 MGCG and LS for raven

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: reuse sdma v4 MGCG and LS function for raven
Huang Rui [Tue, 17 Jan 2017 07:09:37 +0000 (15:09 +0800)]
drm/amdgpu: reuse sdma v4 MGCG and LS function for raven

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: add Raven sdma golden setting and chip id case
Chunming Zhou [Thu, 8 Dec 2016 05:56:16 +0000 (13:56 +0800)]
drm/amdgpu: add Raven sdma golden setting and chip id case

Add golden settings for SDMA.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>