Vinod Koul [Tue, 30 May 2023 16:24:52 +0000 (21:54 +0530)]
arm64: dts: qcom: sc8180x: Add pmics
SC8180X based platforms have PM8150, PM8150C, PMC8180 and SMB2351 PMICs,
so add these as well
Co-developed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230530162454.51708-14-vkoul@kernel.org
Vinod Koul [Tue, 30 May 2023 16:24:51 +0000 (21:54 +0530)]
arm64: dts: qcom: sc8180x: Add display and gpu nodes
This patch adds gpu, gmu, gpucc, dispcc and finally the mdss node with
dsi0/1, dp0/1 and edp subnodes as found in this SoC
Co-developed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230530162454.51708-13-vkoul@kernel.org
Vinod Koul [Tue, 30 May 2023 16:24:50 +0000 (21:54 +0530)]
arm64: dts: qcom: sc8180x: Add remoteprocs, wifi and usb nodes
This patch adds remoteprocs, wifi and usb and usb phy nodes
for this SoC
Co-developed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230530162454.51708-12-vkoul@kernel.org
Vinod Koul [Tue, 30 May 2023 16:24:49 +0000 (21:54 +0530)]
arm64: dts: qcom: sc8180x: Add PCIe instances
This patch adds PCIe instances found on this SoC
Co-developed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230530162454.51708-11-vkoul@kernel.org
Vinod Koul [Tue, 30 May 2023 16:24:48 +0000 (21:54 +0530)]
arm64: dts: qcom: sc8180x: Add QUPs
This patch adds qup instances and i2c, spi, serial ports
Co-developed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230530162454.51708-10-vkoul@kernel.org
Vinod Koul [Tue, 30 May 2023 16:24:47 +0000 (21:54 +0530)]
arm64: dts: qcom: sc8180x: Add thermal zones
This patch adds tsens nodes and thermal zones for sc8180x SoC
Co-developed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230530162454.51708-9-vkoul@kernel.org
Vinod Koul [Tue, 30 May 2023 16:24:46 +0000 (21:54 +0530)]
arm64: dts: qcom: sc8180x: Add interconnects and lmh
This add interconnect nodes and add LMH to sc8180x SoC dtsi
Co-developed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230530162454.51708-8-vkoul@kernel.org
Bjorn Andersson [Tue, 30 May 2023 16:24:45 +0000 (21:54 +0530)]
arm64: dts: qcom: Introduce the SC8180x platform
Introduce a base dtsi for the Qualcomm SC8180x platform, with CPUs,
global clock controller, SMMU, rpmh clocks, rpmh power-domains,
CPUfreq etc
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230530162454.51708-7-vkoul@kernel.org
Stephan Gerhold [Mon, 29 May 2023 12:47:03 +0000 (14:47 +0200)]
arm64: dts: qcom: msm8916: Move aliases to boards
MSM8939 has the aliases defined separately for each board (because
there could be (theoretically) a board where the slots are numbered
differently. To make MSM8916 and MSM8939 more consistent do the same
for all MSM8916 boards and move aliases there.
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230525-msm8916-labels-v1-6-bec0f5fb46fb@gerhold.net
Stephan Gerhold [Mon, 29 May 2023 12:47:02 +0000 (14:47 +0200)]
arm64: dts: qcom: pm8916: Rename &wcd_codec -> &pm8916_codec
All definitions in pm8916.dtsi use the &pm8916_ label prefix, only the
codec uses the &wcd_codec label. &wcd_codec is confusing because the
codec on MSM8916 is split into a "wcd-digital" and "wcd-analog" part
and both could be described with &wcd_codec.
Let's just name it &pm8916_codec so it's consistent with all other PMIC
device nodes.
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230525-msm8916-labels-v1-5-bec0f5fb46fb@gerhold.net
Stephan Gerhold [Mon, 29 May 2023 12:47:01 +0000 (14:47 +0200)]
arm64: dts: qcom: msm8916/39: Clean up MDSS labels
Right now MDSS related definitions cannot be properly grouped together
in board DTs because the labels do not use consistent prefixes. The DSI
PHY label is particularly weird because the DSI number is at the end
(&dsi_phy0) while DSI itself is called &dsi0.
Follow the example of more recent SoCs and give all the MDSS related
nodes a consistent label that allows proper grouping.
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230525-msm8916-labels-v1-4-bec0f5fb46fb@gerhold.net
Stephan Gerhold [Mon, 29 May 2023 12:47:00 +0000 (14:47 +0200)]
arm64: dts: qcom: msm8916/39: Use consistent name for I2C/SPI pinctrl
Make the labels for the BLSP I2C/SPI pinctrl consistent with the one
used for UART by adding the missing blsp_ prefix. This allows having
them properly grouped together.
The nodes are only reordered in msm8939.dtsi for now since the pinctrl
definitions in msm8916-pins.dtsi are currently still unordered anyway.
(I will try fixing this in a future patch.)
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230525-msm8916-labels-v1-3-bec0f5fb46fb@gerhold.net
Stephan Gerhold [Mon, 29 May 2023 12:46:59 +0000 (14:46 +0200)]
arm64: dts: qcom: msm8916/39: Rename &blsp1_uartN -> &blsp_uartN
For some reason the BLSP UART controllers have a label with a number
behind blsp (&blsp1_uartN) while I2C/SPI are named without (&blsp_i2cN).
This is confusing, especially for proper node ordering in board DTs.
Right now all board DTs are ordered as if the number behind blsp does
not exist (&blsp_i2cN comes before &blsp1_uartN). Strictly speaking
correct ordering would be the other way around ('1' comes before '_').
End this confusion by giving the UART controllers consistent labels.
There is just one BLSP on MSM8916/39 so the number is redundant.
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230525-msm8916-labels-v1-2-bec0f5fb46fb@gerhold.net
Stephan Gerhold [Mon, 29 May 2023 12:46:58 +0000 (14:46 +0200)]
arm64: dts: qcom: msm8916: Rename &msmgpio -> &tlmm
MSM8916 is the only ARM64 Qualcomm SoC that is still using the old
&msmgpio name. Change this to &tlmm to avoid confusion.
Note that the node ordering does not change because the MSM8916 device
trees have pinctrl separated at the bottom (similar to sc7180).
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230525-msm8916-labels-v1-1-bec0f5fb46fb@gerhold.net
Bhupesh Sharma [Tue, 16 May 2023 15:05:11 +0000 (20:35 +0530)]
arm64: dts: qcom: qrb4210-rb2: Enable USB node
Enable the USB controller and HS/SS PHYs on qrb4210-rb2 board.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230516150511.2346357-5-bhupesh.sharma@linaro.org
Bhupesh Sharma [Tue, 16 May 2023 15:05:10 +0000 (20:35 +0530)]
arm64: dts: qcom: sm6115: Add USB SS qmp phy node
Add USB superspeed qmp phy node to dtsi.
Make sure that the various board dts files (which include sm4250.dtsi file)
continue to work as intended.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230516150511.2346357-4-bhupesh.sharma@linaro.org
Kathiravan T [Tue, 9 May 2023 16:01:33 +0000 (21:31 +0530)]
arm64: dts: qcom: ipq5332: add support for the RDP442 variant
Add the initial device tree support for the Reference Design
Platform(RDP) 442 based on IPQ5332 family of SoC. This patch carries
the support for Console UART, SPI NOR, eMMC and I2C.
Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230509160133.3794-3-quic_kathirav@quicinc.com
Kathiravan T [Tue, 9 May 2023 16:01:32 +0000 (21:31 +0530)]
dt-bindings: arm: qcom: document MI01.3 board based on IPQ5332 family
Document the MI01.3 (Reference Design Platform 442) board based on IPQ5332
family of SoCs.
Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230509160133.3794-2-quic_kathirav@quicinc.com
Jagadeesh Kona [Wed, 24 May 2023 18:18:00 +0000 (23:48 +0530)]
arm64: dts: qcom: sm8550: Add graphics clock controller
Add device node for graphics clock controller on Qualcomm
SM8550 platform.
Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230524181800.28717-4-quic_jkona@quicinc.com
Bjorn Andersson [Sat, 27 May 2023 01:27:58 +0000 (18:27 -0700)]
Merge branch 'sm8450-sm8550-gpucc-binding' into arm64-for-6.5
Introduce DeviceTree bindings for SM8450 and SM8550 GPU clock
controller, to introduce the constants necessary to referr to these
clocks.
Jagadeesh Kona [Wed, 24 May 2023 18:17:58 +0000 (23:47 +0530)]
dt-bindings: clock: qcom: Add SM8550 graphics clock controller
Add device tree bindings for the graphics clock controller on
Qualcomm SM8550 platform.
Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230524181800.28717-2-quic_jkona@quicinc.com
Konrad Dybcio [Wed, 17 May 2023 16:40:38 +0000 (18:40 +0200)]
dt-bindings: clock: Add Qcom SM8450 GPUCC
Add device tree bindings for the graphics clock controller on Qualcomm
Technology Inc's SM8450 SoCs.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230517-topic-waipio-gpucc-v1-1-4f40e282af1d@linaro.org
Shazad Hussain [Fri, 26 May 2023 13:31:21 +0000 (19:01 +0530)]
arm64: dts: qcom: sa8775p-ride: enable i2c11
This enables the i2c11 node on sa8775p-ride board for A2B controller
and audio port expander.
Signed-off-by: Shazad Hussain <quic_shazhuss@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230526133122.16443-6-quic_shazhuss@quicinc.com
Shazad Hussain [Fri, 26 May 2023 13:31:20 +0000 (19:01 +0530)]
arm64: dts: qcom: sa8775p: add uart5 and uart9 nodes
Add remaining uart5 and uart9 nodes for UART bus present on sa8775p
SoC.
Signed-off-by: Shazad Hussain <quic_shazhuss@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230526133122.16443-5-quic_shazhuss@quicinc.com
Shazad Hussain [Fri, 26 May 2023 13:31:19 +0000 (19:01 +0530)]
arm64: dts: qcom: sa8775p: add missing spi nodes
Add the missing nodes of the SPI buses present on sa8775p platform.
Signed-off-by: Shazad Hussain <quic_shazhuss@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230526133122.16443-4-quic_shazhuss@quicinc.com
Shazad Hussain [Fri, 26 May 2023 13:31:18 +0000 (19:01 +0530)]
arm64: dts: qcom: sa8775p: add missing i2c nodes
Add the missing nodes for the i2c buses present on sa8775p Soc.
Signed-off-by: Shazad Hussain <quic_shazhuss@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230526133122.16443-3-quic_shazhuss@quicinc.com
Shazad Hussain [Fri, 26 May 2023 13:31:17 +0000 (19:01 +0530)]
arm64: dts: qcom: sa8775p: add the QUPv3 #0 and #3 node
Add zeroth and third instance of the QUPv3 engine to the sa8775p.dtsi.
Signed-off-by: Shazad Hussain <quic_shazhuss@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230526133122.16443-2-quic_shazhuss@quicinc.com
Krzysztof Kozlowski [Sun, 7 May 2023 17:45:16 +0000 (19:45 +0200)]
arm64: dts: qcom: apq8096: fix fixed regulator name property
Correct the typo in 'regulator-name' property.
apq8096-ifc6640.dtb: v1p05-regulator: 'regulator-name' is a required property
apq8096-ifc6640.dtb: v1p05-regulator: Unevaluated properties are not allowed ('reglator-name' was unexpected)
Fixes:
6cbdec2d3ca6 ("arm64: dts: qcom: msm8996: Introduce IFC6640")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230507174516.264936-3-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Sun, 7 May 2023 17:45:15 +0000 (19:45 +0200)]
arm64: dts: qcom: msm8996: correct MMCC clocks order
Re-order the clocks for MMCC clock controller node to match the bindings (Linux
driver takes by name):
msm8996-mtp.dtb: clock-controller@8c0000: clock-names:1: 'gpll0' was expected
msm8996-mtp.dtb: clock-controller@8c0000: clock-names:2: 'gcc_mmss_noc_cfg_ahb_clk' was expected
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230507174516.264936-2-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Sun, 7 May 2023 17:45:14 +0000 (19:45 +0200)]
arm64: dts: qcom: msm8916: correct LPASS CPU clocks order
Re-order the clocks for LPASS CPU node to match the bindings (Linux
driver takes by name):
msm8916-asus-z00l.dtb: audio-controller@
7708000: clock-names:1: 'mi2s-bit-clk0' was expected
msm8916-asus-z00l.dtb: audio-controller@
7708000: clock-names:2: 'mi2s-bit-clk1' was expected
msm8916-asus-z00l.dtb: audio-controller@
7708000: clock-names:3: 'mi2s-bit-clk2' was expected
msm8916-asus-z00l.dtb: audio-controller@
7708000: clock-names:4: 'mi2s-bit-clk3' was expected
msm8916-asus-z00l.dtb: audio-controller@
7708000: clock-names:5: 'pcnoc-mport-clk' was expected
msm8916-asus-z00l.dtb: audio-controller@
7708000: clock-names:6: 'pcnoc-sway-clk' was expected
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230507174516.264936-1-krzysztof.kozlowski@linaro.org
Vijaya Krishna Nivarthi [Mon, 24 Apr 2023 09:32:40 +0000 (15:02 +0530)]
arm64: dts: qcom: sdm845: Add stream-id of qspi to iommus
As part of DMA mode support to qspi driver.
Signed-off-by: Vijaya Krishna Nivarthi <quic_vnivarth@quicinc.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/1682328761-17517-5-git-send-email-quic_vnivarth@quicinc.com
Vijaya Krishna Nivarthi [Mon, 24 Apr 2023 09:32:39 +0000 (15:02 +0530)]
arm64: dts: qcom: sc7280: Add stream-id of qspi to iommus
As part of DMA mode support to qspi driver.
Signed-off-by: Vijaya Krishna Nivarthi <quic_vnivarth@quicinc.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/1682328761-17517-4-git-send-email-quic_vnivarth@quicinc.com
Vijaya Krishna Nivarthi [Mon, 24 Apr 2023 09:32:38 +0000 (15:02 +0530)]
arm64: dts: qcom: sc7180: Add stream-id of qspi to iommus
As part of DMA mode support to qspi driver.
Signed-off-by: Vijaya Krishna Nivarthi <quic_vnivarth@quicinc.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/1682328761-17517-3-git-send-email-quic_vnivarth@quicinc.com
Krzysztof Kozlowski [Thu, 20 Apr 2023 18:07:44 +0000 (20:07 +0200)]
arm64: dts: qcom: msm8996: correct /soc/bus ranges
The bus@0 node should have reg or ranges to fix dtbs W=1 warnings:
Warning (unit_address_vs_reg): /soc@0/bus@0: node has a unit name, but no reg or ranges property
Warning (simple_bus_reg): /soc@0/bus@0: missing or empty reg/ranges property
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Tested-by: Konrad Dybcio <konrad.dybcio@linaro.org> # MSM8996 Kagura
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230420180746.860934-1-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Wed, 19 Apr 2023 21:19:21 +0000 (23:19 +0200)]
arm64: dts: qcom: sdm630-nile: correct duplicated reserved memory node
SoC DTSI already comes with
85800000 reserved memory node, so assume the
author wanted to update its length. This fixes dtbs W=1 warning:
Warning (unique_unit_address_if_enabled): /reserved-memory/qhee-code@
85800000: duplicate unit-address (also used in node /reserved-memory/reserved@
85800000)
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230419211921.79871-1-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Sun, 16 Apr 2023 12:37:30 +0000 (14:37 +0200)]
arm64: dts: qcom: sm6125-sprout: align ADC channel node names with bindings
Bindings expect ADC channel node names to follow specific pattern:
sm6125-xiaomi-laurel-sprout.dtb: adc@3100: 'adc-chan@4d', 'adc-chan@4e', 'adc-chan@52', 'adc-chan@54' do not match any of the regexes: ...
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230416123730.300863-6-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Sun, 16 Apr 2023 12:37:29 +0000 (14:37 +0200)]
arm64: dts: qcom: sm8550-qrd: add missing PCIE1 PHY AUX clock frequency
The SM8550 DTSI defines a fixed PCIE1 PHY AUX clock and expects boards
to define frequency. Use the same as in MTP8550 to fix:
sm8550-qrd.dtb: pcie-1-phy-aux-clk: 'clock-frequency' is a required property
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230416123730.300863-5-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Sun, 16 Apr 2023 12:37:28 +0000 (14:37 +0200)]
arm64: dts: qcom: sm8250: add missing qcom,smmu-500 fallback
Since commit
6c84bbd103d8 ("dt-bindings: arm-smmu: Add generic
qcom,smmu-500 bindings") the SMMU is supposed to use qcom,smmu-500
compatible fallback:
['qcom,sm8250-smmu-500', 'qcom,adreno-smmu', 'qcom,smmu-500', 'arm,mmu-500'] is too long
'qcom,sm8250-smmu-500' is not one of ['qcom,msm8996-smmu-v2', 'qcom,msm8998-smmu-v2', 'qcom,sdm630-smmu-v2']
'qcom,sm8250-smmu-500' is not one of ['qcom,msm8996-smmu-v2', 'qcom,sc7180-smmu-v2', 'qcom,sdm630-smmu-v2', 'qcom,sdm845-smmu-v2'
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230416123730.300863-4-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Sun, 16 Apr 2023 12:37:27 +0000 (14:37 +0200)]
arm64: dts: qcom: qdu1000: add missing qcom,smmu-500 fallback
Since commit
6c84bbd103d8 ("dt-bindings: arm-smmu: Add generic
qcom,smmu-500 bindings") the SMMU is supposed to use qcom,smmu-500
compatible fallback:
['qcom,qdu1000-smmu-500', 'arm,mmu-500'] is too short
['qcom,qdu1000-smmu-500', 'arm,mmu-500'] is too long
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230416123730.300863-3-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Sun, 16 Apr 2023 12:37:26 +0000 (14:37 +0200)]
arm64: dts: qcom: ipq8074: drop incorrect SPI bus spi-max-frequency
The spi-max-frequency property belongs to SPI devices, not SPI
controller:
ipq8074-hk01.dtb: spi@
78b5000: Unevaluated properties are not allowed ('spi-max-frequency' was unexpected)
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230416123730.300863-2-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Sun, 16 Apr 2023 12:37:25 +0000 (14:37 +0200)]
arm64: dts: qcom: ipq6018: drop incorrect SPI bus spi-max-frequency
The spi-max-frequency property belongs to SPI devices, not SPI
controller:
ipq6018-cp01-c1.dtb: spi@
78b5000: Unevaluated properties are not allowed ('spi-max-frequency' was unexpected)
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230416123730.300863-1-krzysztof.kozlowski@linaro.org
Vignesh Viswanathan [Fri, 26 May 2023 11:06:53 +0000 (16:36 +0530)]
arm64: dts: qcom: add few more reserved memory region
In IPQ SoCs, bootloader will collect the system RAM contents upon crash
for the post morterm analysis. If we don't reserve the memory region used
by bootloader, obviously linux will consume it and upon next boot on
crash, bootloader will be loaded in the same region, which will lead to
loose some of the data, sometimes we may miss out critical information.
So lets reserve the region used by the bootloader.
Similarly SBL copies some data into the reserved region and it will be
used in the crash scenario. So reserve 1MB for SBL as well.
While at it, drop the size padding in the reserved memory region,
wherever applicable.
Signed-off-by: Vignesh Viswanathan <quic_viswanat@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230526110653.27777-4-quic_viswanat@quicinc.com
Vignesh Viswanathan [Fri, 26 May 2023 11:06:52 +0000 (16:36 +0530)]
arm64: dts: qcom: enable the download mode support
Like any other Qualcomm SoCs, IPQ8074 and IPQ6018 also supports the
download mode to collect the RAM dumps if system crashes, to perform
the post mortem analysis. Add support for the same.
Signed-off-by: Vignesh Viswanathan <quic_viswanat@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230526110653.27777-3-quic_viswanat@quicinc.com
Neil Armstrong [Fri, 26 May 2023 19:22:10 +0000 (00:52 +0530)]
arm64: dts: qcom: sm8450: add crypto nodes
Add crypto engine (CE) and CE BAM related nodes and definitions
for the SM8450 SoC.
Tested-by: Anders Roxell <anders.roxell@linaro.org>
Tested-by: Linux Kernel Functional Testing <lkft@linaro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
[Bhupesh: Corrected the compatible list]
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230526192210.3146896-12-bhupesh.sharma@linaro.org
Bhupesh Sharma [Fri, 26 May 2023 19:22:09 +0000 (00:52 +0530)]
arm64: dts: qcom: sm8350: Add Crypto Engine support
Add crypto engine (CE) and CE BAM related nodes and definitions to
'sm8350.dtsi'.
Co-developed-by and Signed-off-by: Robert Foss <rfoss@kernel.org>
[Bhupesh: Switch to '#interconnect-cells = <2>', available since commit
4f287e31ff5f]
Tested-by: Anders Roxell <anders.roxell@linaro.org>
Tested-by: Linux Kernel Functional Testing <lkft@linaro.org>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230526192210.3146896-11-bhupesh.sharma@linaro.org
Bhupesh Sharma [Fri, 26 May 2023 19:22:08 +0000 (00:52 +0530)]
arm64: dts: qcom: sm8250: Add Crypto Engine support
Add crypto engine (CE) and CE BAM related nodes and definitions to
'sm8250.dtsi'.
Co-developed-by and Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Tested-by: Anders Roxell <anders.roxell@linaro.org>
Tested-by: Linux Kernel Functional Testing <lkft@linaro.org>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230526192210.3146896-10-bhupesh.sharma@linaro.org
Bhupesh Sharma [Fri, 26 May 2023 19:22:07 +0000 (00:52 +0530)]
arm64: dts: qcom: sm8150: Add Crypto Engine support
Add crypto engine (CE) and CE BAM related nodes and definitions to
'sm8150.dtsi'.
Tested-by: Anders Roxell <anders.roxell@linaro.org>
Tested-by: Linux Kernel Functional Testing <lkft@linaro.org>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230526192210.3146896-9-bhupesh.sharma@linaro.org
Bhupesh Sharma [Fri, 26 May 2023 19:22:06 +0000 (00:52 +0530)]
arm64: dts: qcom: sm6115: Add Crypto Engine support
Add crypto engine (CE) and CE BAM related nodes and definitions to
'sm6115.dtsi'.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Tested-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Tested-by: Anders Roxell <anders.roxell@linaro.org>
Tested-by: Linux Kernel Functional Testing <lkft@linaro.org>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230526192210.3146896-8-bhupesh.sharma@linaro.org
Bhupesh Sharma [Fri, 26 May 2023 19:22:03 +0000 (00:52 +0530)]
arm64: dts: qcom: sdm845: Fix the slimbam DMA engine compatible string
As per documentation, Qualcomm SDM845 SoC supports SLIMBAM DMA
engine v1.7.4, so use the correct compatible strings.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Tested-by: Anders Roxell <anders.roxell@linaro.org>
Tested-by: Linux Kernel Functional Testing <lkft@linaro.org>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230526192210.3146896-5-bhupesh.sharma@linaro.org
Bhupesh Sharma [Fri, 26 May 2023 19:22:02 +0000 (00:52 +0530)]
arm64: dts: qcom: sdm8550: Fix the BAM DMA engine compatible string
As per documentation, Qualcomm SM8550 SoC supports BAM DMA
engine v1.7.4, so use the correct compatible strings.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Tested-by: Anders Roxell <anders.roxell@linaro.org>
Tested-by: Linux Kernel Functional Testing <lkft@linaro.org>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230526192210.3146896-4-bhupesh.sharma@linaro.org
Kathiravan T [Fri, 26 May 2023 12:53:05 +0000 (18:23 +0530)]
arm64: dts: qcom: ipq9574: add QFPROM node
IPQ9574 has efuse region to determine the various HW quirks. Lets
add the initial support and the individual fuses will be added as they
are required.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230526125305.19626-5-quic_kathirav@quicinc.com
Kathiravan T [Fri, 26 May 2023 12:53:04 +0000 (18:23 +0530)]
arm64: dts: qcom: ipq6018: add QFPROM node
IPQ6018 has efuse region to determine the various HW quirks. Lets
add the initial support and the individual fuses will be added as they
are required.
Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230526125305.19626-4-quic_kathirav@quicinc.com
Kathiravan T [Fri, 26 May 2023 12:53:03 +0000 (18:23 +0530)]
arm64: dts: qcom: ipq5332: add QFPROM node
IPQ5332 has efuse region to determine the various HW quirks. Lets
add the initial support and the individual fuses will be added as they
are required.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230526125305.19626-3-quic_kathirav@quicinc.com
Kathiravan T [Fri, 26 May 2023 12:53:02 +0000 (18:23 +0530)]
dt-bindings: nvmem: qfprom: add compatible for few IPQ SoCs
Add the QFPROM compatible for IPQ5332, IPQ6018 and IPQ9574
Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230526125305.19626-2-quic_kathirav@quicinc.com
Devi Priya [Fri, 26 May 2023 15:31:52 +0000 (21:01 +0530)]
arm64: dts: qcom: ipq9574: add support for RDP453 variant
Add the initial device tree support for the Reference Design Platform (RDP)
453 based on IPQ9574 family of SoCs. This patch adds support for Console
UART, SPI NOR and SMPA1 regulator node.
Signed-off-by: Devi Priya <quic_devipriy@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230526153152.777-3-quic_devipriy@quicinc.com
Devi Priya [Fri, 26 May 2023 15:31:51 +0000 (21:01 +0530)]
dt-bindings: arm: qcom: document AL02-C8 board based on IPQ9574 family
Document AL02-C8 (Reference Design Platform 453) board based on IPQ9574
family of SoCs.
Signed-off-by: Devi Priya <quic_devipriy@quicinc.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230526153152.777-2-quic_devipriy@quicinc.com
Devi Priya [Tue, 16 May 2023 13:50:13 +0000 (19:20 +0530)]
arm64: dts: qcom: ipq9574: add support for RDP449 variant
Add the initial device tree support for the Reference Design Platform (RDP)
449 based on IPQ9574 family of SoCs. This patch adds support for Console
UART, SPI NOR and SMPA1 regulator node.
Signed-off-by: Devi Priya <quic_devipriy@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230516135013.3547-3-quic_devipriy@quicinc.com
Devi Priya [Tue, 16 May 2023 13:50:12 +0000 (19:20 +0530)]
dt-bindings: arm: qcom: document AL02-C6 board based on IPQ9574 family
Document AL02-C6 (Reference Design Platform 449) board based on IPQ9574
family of SoCs.
Signed-off-by: Devi Priya <quic_devipriy@quicinc.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230516135013.3547-2-quic_devipriy@quicinc.com
Devi Priya [Wed, 10 May 2023 10:43:59 +0000 (16:13 +0530)]
arm64: dts: qcom: ipq9574: add support for RDP418 variant
Add the initial device tree support for the Reference Design Platform (RDP)
418 based on IPQ9574 family of SoCs. This patch adds support for Console
UART, SPI NOR, eMMC and SMPA1 regulator node.
Co-developed-by: Anusha Rao <quic_anusha@quicinc.com>
Signed-off-by: Anusha Rao <quic_anusha@quicinc.com>
Signed-off-by: Devi Priya <quic_devipriy@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230510104359.16678-3-quic_devipriy@quicinc.com
Devi Priya [Wed, 10 May 2023 10:43:58 +0000 (16:13 +0530)]
dt-bindings: arm: qcom: document AL02-C2 board based on IPQ9574 family
Document AL02-C2 (Reference Design Platform 418) board based on IPQ9574
family of SoCs.
Signed-off-by: Devi Priya <quic_devipriy@quicinc.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230510104359.16678-2-quic_devipriy@quicinc.com
Devi Priya [Wed, 17 May 2023 17:25:27 +0000 (22:55 +0530)]
arm64: dts: qcom: ipq9574: Add cpufreq support
Add cpu freq nodes in the device tree to bump cpu frequency above 800MHz.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Co-developed-by: Praveenkumar I <quic_ipkumar@quicinc.com>
Signed-off-by: Praveenkumar I <quic_ipkumar@quicinc.com>
Signed-off-by: Devi Priya <quic_devipriy@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230517172527.1968-4-quic_devipriy@quicinc.com
Devi Priya [Wed, 17 May 2023 17:25:26 +0000 (22:55 +0530)]
arm64: dts: qcom: ipq9574: Add SMPA1 regulator node
Add support for SMPA1 regulator node in IPQ9574.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Co-developed-by: Praveenkumar I <quic_ipkumar@quicinc.com>
Signed-off-by: Praveenkumar I <quic_ipkumar@quicinc.com>
Signed-off-by: Devi Priya <quic_devipriy@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230517172527.1968-3-quic_devipriy@quicinc.com
Devi Priya [Wed, 17 May 2023 17:25:25 +0000 (22:55 +0530)]
arm64: dts: qcom: ipq9574: Add RPM related nodes
Add RPM Glink & RPM message RAM nodes to support frequency scaling
on IPQ9574.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Co-developed-by: Praveenkumar I <quic_ipkumar@quicinc.com>
Signed-off-by: Praveenkumar I <quic_ipkumar@quicinc.com>
Signed-off-by: Devi Priya <quic_devipriy@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230517172527.1968-2-quic_devipriy@quicinc.com
Devi Priya [Thu, 6 Apr 2023 06:13:13 +0000 (11:43 +0530)]
arm64: dts: qcom: ipq9574: Add support for APSS clock controller
Add the APCS & A73 PLL nodes to support CPU frequency scaling.
Signed-off-by: Devi Priya <quic_devipriy@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230406061314.10916-5-quic_devipriy@quicinc.com
Devi Priya [Tue, 25 Apr 2023 08:40:10 +0000 (14:10 +0530)]
arm64: dts: qcom: ipq9574: rename al02-c7 dts to rdp433
Rename the dts after Reference Design Platform(RDP) to adopt
standard naming convention.
Acked-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Devi Priya <quic_devipriy@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230425084010.15581-7-quic_devipriy@quicinc.com
Luca Weiss [Fri, 7 Apr 2023 07:45:44 +0000 (09:45 +0200)]
arm64: dts: qcom: pm7250b: add missing spmi-vadc include
This file is using definitions from the spmi-vadc header, so we need to
include it.
Fixes:
11975b9b8135 ("arm64: dts: qcom: Add pm7250b PMIC")
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230407-pm7250b-sid-v1-1-fc648478cc25@fairphone.com
Bryan O'Donoghue [Fri, 7 Apr 2023 19:49:05 +0000 (20:49 +0100)]
arm64: dts: qcom: Add msm8939 Sony Xperia M4 Aqua
Add a basic booting DTS for the Sony Xperia M4 Aqua aka "tulip".
Tulip is paired with:
- wcn3660
- smb1360 battery charger
- 720p Truly NT35521 Panel
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230407194905.611461-6-bryan.odonoghue@linaro.org
Bryan O'Donoghue [Fri, 7 Apr 2023 19:49:04 +0000 (20:49 +0100)]
arm64: dts: qcom: Add Square apq8039-t2 board
The apq8039-t2 is an apq8039 based board paired with a wcn3680b WiFi
chipset.
Co-developed-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Co-developed-by: Jun Nie <jun.nie@linaro.org>
Signed-off-by: Jun Nie <jun.nie@linaro.org>
Co-developed-by: Benjamin Li <benl@squareup.com>
Signed-off-by: Benjamin Li <benl@squareup.com>
Co-developed-by: James Willcox <jwillcox@squareup.com>
Signed-off-by: James Willcox <jwillcox@squareup.com>
Co-developed-by: Leo Yan <leo.yan@linaro.org>
Signed-off-by: Leo Yan <leo.yan@linaro.org>
Co-developed-by: Joseph Gates <jgates@squareup.com>
Signed-off-by: Joseph Gates <jgates@squareup.com>
Co-developed-by: Max Chen <mchen@squareup.com>
Signed-off-by: Max Chen <mchen@squareup.com>
Co-developed-by: Zac Crosby <zac@squareup.com>
Signed-off-by: Zac Crosby <zac@squareup.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230407194905.611461-5-bryan.odonoghue@linaro.org
Stephan Gerhold [Fri, 7 Apr 2023 19:49:03 +0000 (20:49 +0100)]
arm64: dts: qcom: Add msm8939-pm8916.dtsi include
The msm8939-pm8916.dtsi include configures the regulator supplies of
MSM8939 used together with PM8916, as recommended by Qualcomm. In rare
cases where boards deviate from the recommended design they can just
avoid using this include.
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230407194905.611461-4-bryan.odonoghue@linaro.org
Bryan O'Donoghue [Fri, 7 Apr 2023 19:49:02 +0000 (20:49 +0100)]
arm64: dts: qcom: Add msm8939 SoC
Add msm8939 a derivative SoC of msm8916. This SoC contains a number of key
differences to msm8916.
- big.LITTLE Octa Core - quad 1.5GHz + quad 1.0GHz
- DRAM 1x800 LPDDR3
- Camera 4+4 lane CSI
- Venus @ 1080p60 HEVC
- DSI x 2
- Adreno A405
- WiFi wcn3660/wcn3680b 802.11ac
Co-developed-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Co-developed-by: Jun Nie <jun.nie@linaro.org>
Signed-off-by: Jun Nie <jun.nie@linaro.org>
Co-developed-by: Benjamin Li <benl@squareup.com>
Signed-off-by: Benjamin Li <benl@squareup.com>
Co-developed-by: James Willcox <jwillcox@squareup.com>
Signed-off-by: James Willcox <jwillcox@squareup.com>
Co-developed-by: Leo Yan <leo.yan@linaro.org>
Signed-off-by: Leo Yan <leo.yan@linaro.org>
Co-developed-by: Joseph Gates <jgates@squareup.com>
Signed-off-by: Joseph Gates <jgates@squareup.com>
Co-developed-by: Max Chen <mchen@squareup.com>
Signed-off-by: Max Chen <mchen@squareup.com>
Co-developed-by: Zac Crosby <zac@squareup.com>
Signed-off-by: Zac Crosby <zac@squareup.com>
Co-developed-by: Vincent Knecht <vincent.knecht@mailoo.org>
Signed-off-by: Vincent Knecht <vincent.knecht@mailoo.org>
Co-developed-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230407194905.611461-3-bryan.odonoghue@linaro.org
Bryan O'Donoghue [Fri, 7 Apr 2023 19:49:01 +0000 (20:49 +0100)]
dt-bindings: vendor-prefixes: Add Square
Add vendor prefix for Square (https://squareup.com).
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230407194905.611461-2-bryan.odonoghue@linaro.org
Rudraksha Gupta [Wed, 24 May 2023 23:03:37 +0000 (19:03 -0400)]
dt-bindings: arm: qcom: Add missing msm8960
The list of supported 'SoC's didn't include msm8960 even though
qcom,msm8960-cdp exists.
Signed-off-by: Rudraksha Gupta <guptarud@gmail.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230524230338.120619-1-guptarud@gmail.com
Luca Weiss [Tue, 23 May 2023 20:41:29 +0000 (22:41 +0200)]
arm64: dts: qcom: sdm632-fairphone-fp3: Add notification LED
The phone features a notification LED connected to the pmi632. Configure
the RGB led found on it.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230414-pmi632-v3-2-079d2cada699@z3ntu.xyz
Luca Weiss [Tue, 23 May 2023 20:41:28 +0000 (22:41 +0200)]
arm64: dts: qcom: Add PMI632 PMIC
The PMI632, commonly found on SoCs with SDM632 has various standard
functions like ADC, GPIOs, LPG and more.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230414-pmi632-v3-1-079d2cada699@z3ntu.xyz
Dylan Van Assche [Thu, 18 May 2023 13:31:13 +0000 (15:31 +0200)]
arm64: dts: qcom: sdm845-shift-axolotl: enable flash LEDs
The SHIFT6mq (axolotl) is an SDM845-based smartphone with 2 flash LEDs.
One LED is white, the other one is yellow. Define both LEDs in the DTS
so they can be used as flash or torch and enable the flash LED
controller to control them in PMI8998.
Signed-off-by: Dylan Van Assche <me@dylanvanassche.be>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230518133113.273880-4-me@dylanvanassche.be
Dylan Van Assche [Thu, 18 May 2023 13:31:12 +0000 (15:31 +0200)]
arm64: dts: qcom: pmi8998: add flash LED controller
Qualcomm PMIC PMI8998 has a 3 channel flash LED driver which is used
by many phones for 1 or 2 flash LEDs. Each LED can be used in flash mode
or torch mode. Add the flash LED controller node to PMI8998 DTS.
Signed-off-by: Dylan Van Assche <me@dylanvanassche.be>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230518133113.273880-3-me@dylanvanassche.be
Bhupesh Sharma [Thu, 18 May 2023 08:00:31 +0000 (13:30 +0530)]
arm64: dts: qcom: sm6115: Add CPU idle-states
Add CPU idle-state nodes and power-domains in Qualcomm sm6115 SoC dtsi.
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230518080031.2509250-1-bhupesh.sharma@linaro.org
Stephan Gerhold [Wed, 17 May 2023 18:48:47 +0000 (20:48 +0200)]
arm64: dts: qcom: msm8916-pm8916: Mark always-on regulators
Some of the regulators must be always-on to ensure correct operation of
the system, e.g. PM8916 L2 for the LPDDR RAM, L5 for most digital I/O
and L7 for the CPU PLL (strictly speaking the CPU PLL might only need
an active-only vote but this is not supported for regulators in
mainline currently).
The RPM firmware seems to enforce that internally, these supplies stay
on even if we vote for them to power off (and there is no other
processor running). This means it's pointless to keep sending
enable/disable requests because they will just be ignored.
Also, drivers are much more likely to get a wrong impression of the
regulator status, because regulator_is_enabled() will return false when
there are no users, even though the regulator is always on.
Describe this properly by marking the regulators as always-on.
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230510-msm8916-regulators-v1-8-54d4960a05fc@gerhold.net
Stephan Gerhold [Wed, 17 May 2023 18:48:46 +0000 (20:48 +0200)]
arm64: dts: qcom: msm8916: Define regulator constraints next to usage
Right now each MSM8916 device has a huge block of regulator constraints
with allowed voltages for each regulator. For lack of better
documentation these voltages are often copied as-is from the vendor
device tree, without much extra thought.
Unfortunately, the voltages in the vendor device trees are often
misleading or even wrong, e.g. because:
- There is a large voltage range allowed and the actual voltage is
only set somewhere hidden in some messy vendor driver. This is often
the case for pm8916_{l14,l15,l16} because they have a broad range of
1.8-3.3V by default.
- The voltage is actually wrong but thanks to the voltage constraints
in the RPM firmware it still ends up applying the correct voltage.
To have proper regulator constraints it is important to review them in
context of the usage. The current setup in the MSM8916 device trees
makes this quite hard because each device duplicates the standard
voltages for components of the SoC and mixes those with minor
device-specific additions and dummy voltages for completely unused
regulators.
The actual usage of the regulators for the SoC components is in
msm8916-pm8916.dtsi, so it can and should also define the related
voltage constraints. These are not board-specific but defined in the
APQ8016E/PM8916 Device Specification. The board DT can then focus on
describing the actual board-specific regulators, which makes it much
easier to review and spot potential mistakes there.
Note that this commit does not make any functional change. All used
regulators still have the same regulator constraints as before. Unused
regulators do not have regulator constraints anymore because most of
these were too broad or even entirely wrong. They should be added back
with proper voltage constraints when there is an actual usage.
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230510-msm8916-regulators-v1-7-54d4960a05fc@gerhold.net
Stephan Gerhold [Wed, 17 May 2023 18:48:45 +0000 (20:48 +0200)]
arm64: dts: qcom: msm8916-pm8916: Clarify purpose
Goal of the msm8916-pm8916.dtsi is to reduce the boilerplate necessary
to create a device tree for a typical board with the MSM8916 SoC
combined with the PM8916 PMIC. > 99% of all MSM8916 boards use the same
standard setup where many of the PM8916 regulators have a fixed purpose
and only some are left up for board-specific use.
While MSM8916 (and perhaps MSM8939 soon) is currently the only platform
with such an include, it has definitely proven useful. With more than
30 boards using it (not all of them upstream yet) it simplifies the
review a lot and reduces the chance of configuring the standard
components incorrectly.
In preparation of extending its scope slightly, add a comment at the
top that clearly explains what the .dtsi represents and when it should
(or should not) be used.
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230510-msm8916-regulators-v1-6-54d4960a05fc@gerhold.net
Stephan Gerhold [Wed, 17 May 2023 18:48:44 +0000 (20:48 +0200)]
arm64: dts: qcom: pm8916: Move default regulator "-supply"s
Some of the power supplies for the analog audio codec in PM8916 are
wired externally. While most boards use the regulators currently
specified in pm8916.dtsi, in theory it could be connected differently.
We already have msm8916-pm8916.dtsi that models that standard setup
used by most devices so move the -supply properties there and keep
the base pm8916.dtsi independent.
Currently all MSM8916 boards in mainline make use of
msm8916-pm8916.dtsi, so it is not necessary to adjust any other boards.
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230510-msm8916-regulators-v1-5-54d4960a05fc@gerhold.net
Stephan Gerhold [Wed, 17 May 2023 18:48:43 +0000 (20:48 +0200)]
arm64: dts: qcom: msm8916: Disable audio codecs by default
Not every device has something connected to the digital audio codec
in MSM8916 and/or the analog audio codec in PM8916. Disable those by
default so the hardware is only powered up when necessary.
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230510-msm8916-regulators-v1-4-54d4960a05fc@gerhold.net
Stephan Gerhold [Wed, 17 May 2023 18:48:42 +0000 (20:48 +0200)]
arm64: dts: qcom: msm8916: Fix regulator constraints
The regulator constraints for most MSM8916 devices (except DB410c) were
originally taken from Qualcomm's msm-3.10 vendor device tree (for lack
of better documentation). Unfortunately it turns out that Qualcomm's
voltages are slightly off as well and do not match the voltage
constraints applied by the RPM firmware.
This means that we sometimes request a specific voltage but the RPM
firmware actually applies a much lower or higher voltage. This is
particularly critical for pm8916_l11 which is used as SD card VMMC
regulator: The SD card can choose a voltage from the current range of
1.8 - 2.95V. If it chooses to run at 1.8V we pretend that this is fine
but the RPM firmware will still silently end up configuring 2.95V.
This can be easily reproduced with a multimeter or by checking the
SPMI hardware registers of the regulator.
Fix this by making the voltages match the actual "specified range" in
the PM8916 Device Specification which is enforced by the RPM firmware.
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230510-msm8916-regulators-v1-3-54d4960a05fc@gerhold.net
Stephan Gerhold [Wed, 17 May 2023 18:48:41 +0000 (20:48 +0200)]
arm64: dts: qcom: apq8016-sbc: Fix 1.8V power rail on LS expansion
The 96Boards specification expects a 1.8V power rail on the low-speed
expansion connector that is able to provide at least 0.18W / 100 mA.
According to the DB410c hardware user manual this is done by connecting
both L15 and L16 in parallel with up to 55mA each (for 110 mA total) [1].
Unfortunately the current regulator setup in the DB410c device tree
does not implement the specification correctly and only provides 5 mA:
- Only L15 is marked always-on, so L16 is never enabled.
- Without specifying a load the regulator is put into LPM where
it can only provide 5 mA.
Fix this by:
- Adding proper voltage constraints for L16.
- Making L16 always-on.
- Adding regulator-system-load for both L15 and L16. 100 mA should be
available in total, so specify 50 mA for each. (The regulator
hardware can only be in normal (55 mA) or low-power mode (5 mA) so
this will actually result in the expected 110 mA total...)
[1]: https://www.96boards.org/documentation/consumer/dragonboard/dragonboard410c/hardware-docs/hardware-user-manual.md.html#power-supplies
Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Fixes:
828dd5d66f0f ("arm64: dts: apq8016-sbc: make 1.8v available on LS expansion")
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230510-msm8916-regulators-v1-2-54d4960a05fc@gerhold.net
Stephan Gerhold [Wed, 17 May 2023 18:48:40 +0000 (20:48 +0200)]
arm64: dts: qcom: apq8016-sbc: Fix regulator constraints
For some reason DB410c has completely bogus regulator constraints that
actually just correspond to the programmable voltages which are already
provided by the regulator driver. Some of them are not just outside the
recommended operating conditions of the APQ8016E SoC but even exceed
the absolute maximum ratings, potentially risking permanent device
damage.
In practice it's not quite as dangerous thanks to the RPM firmware:
It turns out that it has its own voltage constraints and silently
clamps all regulator requests. For example, requesting 3.3V for L5
(allowed by the current regulator constraints!) still results in 1.8V
being programmed in the actual regulator hardware.
Experimentation with various voltages shows that the internal RPM
voltage constraints roughly correspond to the safe "specified range"
in the PM8916 Device Specification (rather than the "programmable
range" used inside apq8016-sbc.dtsi right now).
Combine those together with some fixed voltages used in the old
msm-3.10 device tree from Qualcomm to give DB410c some actually valid
voltage constraints.
Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Fixes:
4c7d53d16d77 ("arm64: dts: apq8016-sbc: add regulators support")
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230510-msm8916-regulators-v1-1-54d4960a05fc@gerhold.net
Jianhua Lu [Wed, 17 May 2023 13:33:40 +0000 (21:33 +0800)]
arm64: dts: qcom: sm8250-xiaomi-elish: remove redundant empty line
Remove a redundant empty line introduced by
commit
51c4c2bd6f31 ("arm64: dts: qcom: sm8250-xiaomi-elish-boe: Add mdss and dsi panel")
Signed-off-by: Jianhua Lu <lujianhua000@gmail.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230517133340.21111-1-lujianhua000@gmail.com
Kathiravan T [Wed, 17 May 2023 07:28:06 +0000 (12:58 +0530)]
arm64: dts: qcom: ipq9574: add few device nodes
Add QUP(SPI / I2C) peripheral, PRNG, WDOG and the remaining UART nodes.
While at it, enable the SPI NOR in RDP433 board.
Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230517072806.13170-1-quic_kathirav@quicinc.com
Krzysztof Kozlowski [Tue, 16 May 2023 15:45:39 +0000 (17:45 +0200)]
arm64: dts: qcom: sm8550-qrd: add display and panel
Enable Display Subsystem with Visionox VTDR6130 Panel (same as on
MTP8550).
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230516154539.238655-3-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Tue, 16 May 2023 15:45:38 +0000 (17:45 +0200)]
arm64: dts: qcom: sm8550-mtp: drop redundant MDP status
MDP in sm8550.dtsi is not disabled (although its parent MDSS is), so
board DTS does not have to enable it.
Suggested-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230516154539.238655-2-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Tue, 16 May 2023 15:45:37 +0000 (17:45 +0200)]
arm64: dts: qcom: sm8550: enable DISPCC by default
Enable the Display Clock Controller by default in SoC DTSI so unused
clocks can be turned off. It does not require any external resources,
so as core SoC component should be always available to boards.
Suggested-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230516154539.238655-1-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Tue, 16 May 2023 15:02:02 +0000 (17:02 +0200)]
arm64: dts: qcom: sm8550-qrd: add flash LEDs
Enable PM8550 PMIC flash LED controller and add two flash LEDs using
four current outputs.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230516150202.188655-3-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Tue, 16 May 2023 15:02:01 +0000 (17:02 +0200)]
arm64: dts: qcom: pm8550: add flash LED controller
Add node for PM8550 PMIC flash LED controller.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230516150202.188655-2-krzysztof.kozlowski@linaro.org
Luca Weiss [Tue, 16 May 2023 06:56:14 +0000 (08:56 +0200)]
arm64: dts: qcom: sm6350: Move wifi node to correct place
Somehow wifi was placed further up in the file than where it should be.
Move it down so the nodes are sorted by reg again.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230516-sm6350-order-v1-1-5c3b7c4cd761@fairphone.com
Konrad Dybcio [Tue, 16 May 2023 00:53:06 +0000 (02:53 +0200)]
arm64: dts: qcom: sm8450: Add missing RPMhPD OPP levels
We need more granularity for things like the GPU. Add the missing levels.
This unfortunately requires some re-indexing, resulting in an ugly diff.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230516005306.952821-1-konrad.dybcio@linaro.org
Nikita Travkin [Mon, 15 May 2023 09:37:44 +0000 (14:37 +0500)]
arm64: dts: qcom: Add Acer Aspire 1
Acer Aspire 1 is a WoA laptop based on Snapdragon 7c gen1 platform.
The laptop design is similar to trogdor in the choice of primary
components but the specifics on usage of those differ slightly.
Add the devicetree for the laptop with support for most of the
hardware present.
Signed-off-by: Nikita Travkin <nikita@trvn.ru>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230515093744.289045-5-nikita@trvn.ru
Nikita Travkin [Mon, 15 May 2023 09:37:43 +0000 (14:37 +0500)]
dt-bindings: arm: qcom: Add Acer Aspire 1
Acer Aspire 1 is a laptop based on sc7180. Document it's compatible.
Signed-off-by: Nikita Travkin <nikita@trvn.ru>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230515093744.289045-4-nikita@trvn.ru
Nikita Travkin [Mon, 15 May 2023 09:37:42 +0000 (14:37 +0500)]
arm64: dts: qcom: sc7180: Drop redundant disable in mdp
mdss is useless without a display controller which makes explicitly
enabling mdp redundant. Have it enabled by default to drop the extra
node for all users.
Signed-off-by: Nikita Travkin <nikita@trvn.ru>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230515093744.289045-3-nikita@trvn.ru
Nikita Travkin [Mon, 15 May 2023 09:37:41 +0000 (14:37 +0500)]
arm64: dts: qcom: sc7180: Don't enable lpass clocks by default
lpass clocks are usually blocked from HLOS by the firmware and
instead are managed by the ADSP. Mark them as reserved and explicitly
enable in the CrOS boards that have special, cooperative firmware.
The IDP board gets lpass clocks disabled as it doesn't make use of sound
anyway and might use Qualcomm firmware that blocks those clocks. [1]
[1] https://lore.kernel.org/all/ZBJhmDd3zK%2FAiwBD@google.com/
Signed-off-by: Nikita Travkin <nikita@trvn.ru>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230515093744.289045-2-nikita@trvn.ru
Krzysztof Kozlowski [Fri, 12 May 2023 16:04:52 +0000 (18:04 +0200)]
arm64: dts: qcom: sm8550-mtp: add WCD9385 audio-codec
Add Qualcomm Aqstic WCD9385 audio codec on two Soundwire interfaces: RX
and TX.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230512160452.206585-2-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Fri, 12 May 2023 16:04:51 +0000 (18:04 +0200)]
arm64: dts: qcom: sm8550-qrd: add WCD9385 audio-codec
Add Qualcomm Aqstic WCD9385 audio codec on two Soundwire interfaces: RX
and TX.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230512160452.206585-1-krzysztof.kozlowski@linaro.org
projects / linux-2.6-microblaze.git / log