Rosen Penev [Fri, 27 Mar 2026 02:58:49 +0000 (19:58 -0700)]
mmc: mmc_test: use kzalloc_flex
Simplifies allocations by using a flexible array member in these structs.
Add __counted_by to get extra runtime analysis.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Cathy Xu [Thu, 26 Mar 2026 03:05:16 +0000 (11:05 +0800)]
mmc: mtk-sd: disable new_tx/rx and modify related settings for mt8189
Disable new_tx/rx to avoid data transmission instability, and adjust
.data_tune, .stop_dly_sel, and .pop_en_cnt to fit the overall
configuration after disabling new_tx/rx, making it more compatible
with mt8189.
Fixes:
846a3a2fdff5 ("mmc: mtk-sd: add support for MT8189 SoC")
Tested-by: Louis-Alexis Eyraud <louisalexis.eyraud@collabora.com>
Signed-off-by: Cathy Xu <ot_cathy.xu@mediatek.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Bhargav Joshi [Wed, 25 Mar 2026 22:54:38 +0000 (04:24 +0530)]
dt-bindings: mmc: hisilicon,hi3660-dw-mshc: Convert to DT schema
Convert the Hisilicon DesignWare Mobile Storage Host Controller
(dw-mshc) bindings from text format to DT schema.
As part of this conversion, the binding file is renamed from
k3-dw-mshc.txt to hisilicon,hi3660-dw-mshc.yaml to align with compatible
string naming conventions. Examples have been updated to pass schema
validation.
Note: synopsys-dw-mshc binding specifies clock names as "biu" followed
by "ciu". However, this Hisilicon binding reverses the order to 'ciu'
then 'biu' to match both the legacy text binding and in-kernel Hisilicon
DTS board files.
Signed-off-by: Bhargav Joshi <rougueprince47@gmail.com>
Acked-by: Zhangfei Gao <zhangfei.gao@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Kathiravan Thirumoorthy [Wed, 25 Mar 2026 11:40:19 +0000 (17:10 +0530)]
dt-bindings: mmc: sdhci-msm: add IPQ9650 compatible
The IPQ9650 supports eMMC with an SDHCI controller. Add the appropriate
compatible to the documentation.
Signed-off-by: Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Bin Liu [Wed, 25 Mar 2026 13:49:47 +0000 (08:49 -0500)]
mmc: block: use single block write in retry
Due to errata i2493[0], multi-block write would still fail in retries.
With i2493, the MMC interface has the potential of write failures when
issuing multi-block writes operating in HS200 mode with excessive IO
supply noise.
While the errata provides guidance in hardware design and layout to
minimize the IO supply noise, in theory the write failure cannot be
resolved in hardware. The software solution to ensure the data integrity
is to add minimum 5us delay between block writes. Single-block write is
the practical way to introduce the delay.
This patch reuses recovery_mode flag, and switches to single-block
write in retry when multi-block write fails. It covers both CQE and
non-CQE cases.
[0] https://www.ti.com/lit/pdf/sprz582
Cc: stable@vger.kernel.org
Suggested-by: Jens Axboe <axboe@kernel.dk>
Signed-off-by: Bin Liu <b-liu@ti.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Ronald Claveau [Thu, 26 Mar 2026 09:59:13 +0000 (10:59 +0100)]
dt-bindings: mmc: amlogic: Add compatible for T7 mmc
Add amlogic,t7-mmc compatible string, falling back to amlogic,meson-axg-mmc
as the T7 MMC controller is compatible with the AXG implementation.
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Xianwei Zhao <xianwei.zhao@amlogic.com>
Signed-off-by: Ronald Claveau <linux-kernel-dev@aliel.fr>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Shawn Lin [Tue, 24 Mar 2026 08:42:16 +0000 (16:42 +0800)]
mmc: sdhci-of-arasan: Use standard mmc_clk_phase_map infrastructure
Convert the Arasan SDHCI driver to use the mainline standard
mmc_clk_phase_map infrastructure instead of custom clk_phase_in/out
arrays as well as arasan_dt_read_clk_phase().
The phase values for ZynqMP, Versal, and Versal-NET platforms are
still initialized from the predefined tables.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Reviewed-by: Sai Krishna Potthuri <sai.krishna.potthuri@amd.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Ryan Chen [Tue, 24 Mar 2026 01:58:50 +0000 (09:58 +0800)]
mmc: sdhci-of-aspeed: Handle optional controller reset
Get the optional reset line for the ASPEED SD controller during probe by
using devm_reset_control_get_optional_exclusive_deasserted().
This allows platforms such as AST2700, which require the SD controller
to be taken out of reset before use, to work with the existing driver.
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ryan Chen <ryan_chen@aspeedtech.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Ryan Chen [Tue, 24 Mar 2026 01:58:49 +0000 (09:58 +0800)]
dt-bindings: mmc: sdhci-of-aspeed: Add AST2700 compatible
AST2700 SDHCI controller is fully compatible with AST2600.
However, it is necessary to take the AST2700 SD controller out of
reset, so require the 'resets' property.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Ryan Chen <ryan_chen@aspeedtech.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Andy Shevchenko [Fri, 20 Mar 2026 22:02:21 +0000 (23:02 +0100)]
mmc: sdhci-pci: Drop unused include
This driver includes the legacy header <linux/gpio.h> but does
not use any symbols from it. Drop the inclusion.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Jiayu Du [Thu, 19 Mar 2026 14:07:04 +0000 (22:07 +0800)]
mmc: sdhci-dwcmshc: Add Canaan K230 DWCMSHC controller support
Add SDHCI controller driver for Canaan k230 SoC. Implement custom
sdhci_ops for set_clock, phy init, init and reset.
Tested-by: Junhui Liu <junhui.liu@pigmoral.tech>
Signed-off-by: Jiayu Du <jiayu.riscv@isrc.iscas.ac.cn>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Jiayu Du [Thu, 19 Mar 2026 14:07:03 +0000 (22:07 +0800)]
dt-bindings: mmc: Add sdhci support for Canaan k230
The Canaan k230 uses the SDHCI from Synopsys. Add compatible strings
to the k230. The k230 has two controllers. MMC0 supports eMMC, while
MMC1 supports SDIO.
Signed-off-by: Jiayu Du <jiayu.riscv@isrc.iscas.ac.cn>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Nick Hawkins [Mon, 16 Mar 2026 15:01:15 +0000 (10:01 -0500)]
mmc: sdhci-of-dwcmshc: Add HPE GSC eMMC support
Add support for the eMMC controller integrated in the HPE GSC (ARM64
Cortex-A53) BMC SoC under the new 'hpe,gsc-dwcmshc' compatible
string.
The HPE GSC eMMC controller is based on the DesignWare Cores MSHC IP
but requires several platform-specific adjustments:
Clock mux (dwcmshc_hpe_set_clock):
The GSC SoC wires SDHCI_CLOCK_CONTROL.freq_sel directly to a clock
mux rather than a divider. Forcing freq_sel = 1 when the requested
clock is 200 MHz (HS200) selects the correct high-speed clock source.
Using the generic sdhci_set_clock() would otherwise leave the mux on
the wrong source after tuning.
Auto-tuning / vendor config (dwcmshc_hpe_vendor_specific):
Disables the command-conflict check (DWCMSHC_HOST_CTRL3 BIT(0)) and
programs the ATCTRL register using existing AT_CTRL_* macros:
AT_CTRL_AT_EN auto-tuning circuit enable
AT_CTRL_SWIN_TH_EN sampling window threshold enable
AT_CTRL_TUNE_CLK_STOP_EN tune-clock-stop enable
PRE_CHANGE_DLY = 3 pre-change delay
POST_CHANGE_DLY = 3 post-change delay
SWIN_TH_VAL = 2 sampling window threshold
This combination is required for reliable HS200 signal integrity on
the GSC PCB trace topology.
eMMC mode (dwcmshc_hpe_set_emmc):
Helper that sets DWCMSHC_CARD_IS_EMMC unconditionally. Called from
both the reset and UHS-signaling paths.
Reset (dwcmshc_hpe_reset):
Calls dwcmshc_reset(), re-applies the vendor config above via
dwcmshc_hpe_vendor_specific(), and then calls dwcmshc_hpe_set_emmc().
The GSC controller clears the CARD_IS_EMMC bit on every reset;
leaving it clear causes card-detect mis-identification on an
eMMC-only slot.
UHS signaling (dwcmshc_hpe_set_uhs_signaling):
Wraps dwcmshc_set_uhs_signaling() and calls dwcmshc_hpe_set_emmc()
to ensure CARD_IS_EMMC is set for all timing modes, not just HS400.
Init (dwcmshc_hpe_gsc_init):
Obtains the SoC register block and MSHCCS offset via the
'hpe,gxp-sysreg' syscon phandle argument and sets SCGSyncDis
(BIT(18)) to allow the HS200 RX delay lines to settle while the
card clock is stopped during auto-tuning. Enables SDHCI v4 mode.
Quirks:
SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN: base clock not advertised in
capabilities; must be obtained from the DTS 'clocks' property.
SDHCI_QUIRK2_PRESET_VALUE_BROKEN: preset-value registers are not
populated in the GSC ROM.
All HPE-specific code is isolated to the new hpe_gsc_init / hpe_ops /
hpe_gsc_pdata symbols. No existing platform (Rockchip, T-Head, sg2042,
etc.) is affected.
Signed-off-by: Nick Hawkins <nick.hawkins@hpe.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Nick Hawkins [Mon, 16 Mar 2026 15:01:14 +0000 (10:01 -0500)]
dt-bindings: mmc: snps,dwcmshc-sdhci: add HPE GSC dwcmshc compatible
Add the 'hpe,gsc-dwcmshc' compatible string for the HPE GSC (ARM64
Cortex-A53) BMC SoC eMMC controller.
The HPE GSC requires access to the MSHCCS register in the SoC system
register block to configure SCG sync disable for HS200 RX delay-line
phase selection. The required 'hpe,gxp-sysreg' property takes a
phandle to the existing 'hpe,gxp-sysreg' syscon and the MSHCCS
register offset within that block.
The HPE GSC eMMC interface only exposes a single 'core' clock (no
bus clock), so clocks/clock-names are constrained to a single item.
Signed-off-by: Nick Hawkins <nick.hawkins@hpe.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Shawn Lin [Tue, 17 Mar 2026 02:14:52 +0000 (10:14 +0800)]
mmc: dw_mmc-pltfm: Use phase_map for SoCFPGA clock phase configuration
This change aligns the SoCFPGA driver with the current dw_mmc core,
which now manages clock phases through host->phase_map. The phase values
are still scaled by SOCFPGA_DW_MMC_CLK_PHASE_STEP before being written
to the system manager registers.
No functional changes intended.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Fabio Estevam [Fri, 13 Mar 2026 13:08:35 +0000 (10:08 -0300)]
dt-bindings: mmc: rockchip-dw-mshc: Fix the RV1103B compatible
RV1103B uses the same DesignWare MSHC controller IP version as RK3576.
They have no "ciu-drive" nor "ciu-sample" clocks and use the phase
tuning inside the controller.
Fix it accordingly.
Fixes:
517b1e3c9455 ("dt-bindings: mmc: rockchip-dw-mshc: Add RV1103B compatible")
Suggested-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Fabio Estevam <festevam@nabladev.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Neeraj Soni [Fri, 13 Mar 2026 08:15:48 +0000 (13:45 +0530)]
mmc: sdhci-msm: Add support for wrapped keys
Add the wrapped key support for sdhci-msm by implementing the needed
methods in struct blk_crypto_ll_ops and setting the appropriate flag in
blk_crypto_profile::key_types_supported.
Tested on SC7280 eMMC variant.
How to test:
Use the "v1.3.0" tag from https://github.com/google/fscryptctl and build
fscryptctl that supports generating wrapped keys.
Enable the following config options:
CONFIG_BLK_INLINE_ENCRYPTION=y
CONFIG_QCOM_INLINE_CRYPTO_ENGINE=y
CONFIG_FS_ENCRYPTION_INLINE_CRYPT=y
CONFIG_MMC_CRYPTO=y
Enable "qcom_ice.use_wrapped_keys" via kernel command line.
$ mkfs.ext4 -F -O encrypt,stable_inodes /dev/disk/by-partlabel/vm-data
$ mount /dev/disk/by-partlabel/vm-data -o inlinecrypt /mnt
$ fscryptctl generate_hw_wrapped_key /dev/disk/by-partlabel/vm-data > /mnt/key.longterm
$ fscryptctl prepare_hw_wrapped_key /dev/disk/by-partlabel/vm-data < /mnt/key.longterm > /tmp/key.ephemeral
$ KEYID=$(fscryptctl add_key --hw-wrapped-key < /tmp/key.ephemeral /mnt)
$ rm -rf /mnt/dir
$ mkdir /mnt/dir
$ fscryptctl set_policy --iv-ino-lblk-32 "$KEYID" /mnt/dir
$ dmesg > /mnt/dir/test.txt
$ sync
Reboot the board
$ mount /dev/disk/by-partlabel/vm-data -o inlinecrypt /mnt
$ ls /mnt/dir # File should be encrypted
$ fscryptctl prepare_hw_wrapped_key /dev/disk/by-partlabel/vm-data < /mnt/key.longterm > /tmp/key.ephemeral
$ KEYID=$(fscryptctl add_key --hw-wrapped-key < /tmp/key.ephemeral /mnt)
$ fscryptctl set_policy --iv-ino-lblk-32 "$KEYID" /mnt/dir
$ cat /mnt/dir/test.txt # File should now be decrypted
Tested-by: Wenjia Zhang <wenjia.zhang@oss.qualcomm.com>
Signed-off-by: Neeraj Soni <neeraj.soni@oss.qualcomm.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Reviewed-by: Eric Biggers <ebiggers@kernel.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Luke Wang [Wed, 11 Mar 2026 09:50:09 +0000 (17:50 +0800)]
mmc: sdhci-pltfm: remove duplicate DTS property parsing
The "keep-power-in-suspend", "wakeup-source" and "enable-sdio-wakeup"
properties are already parsed in mmc_of_parse(). All sdhci drivers that
call sdhci_get_property() also call mmc_of_parse(). The only exception
is sdhci-of-hlwd, which does not call mmc_of_parse(), but its devicetree
does not use these properties anyway.
Signed-off-by: Luke Wang <ziniu.wang_1@nxp.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Luke Wang [Wed, 11 Mar 2026 09:50:08 +0000 (17:50 +0800)]
mmc: sdhci-esdhc-imx: remove duplicate HS400 bus width validation
mmc_validate_host_caps() already validates that HS400/HS400ES requires
8-bit bus width. Remove the duplicate validation.
Signed-off-by: Luke Wang <ziniu.wang_1@nxp.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Reviewed-by: Haibo Chen <haibo.chen@nxp.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Luke Wang [Wed, 11 Mar 2026 09:50:07 +0000 (17:50 +0800)]
mmc: sdhci-esdhc-imx: add 1-bit bus width support
Add sdhci_get_property() call to parse common SDHCI DT properties,
including "bus-width = <1>" which sets SDHCI_QUIRK_FORCE_1_BIT_DATA
quirk for 1-bit data bus width configuration.
Remove the duplicate "no-1-8-v" property parsing since
sdhci_get_property() already handles it.
Signed-off-by: Luke Wang <ziniu.wang_1@nxp.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Reviewed-by: Haibo Chen <haibo.chen@nxp.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Ulf Hansson [Mon, 16 Mar 2026 15:13:02 +0000 (16:13 +0100)]
mmc: Merge branch fixes into next
Merge the mmc fixes for v7.0-rc[n] into the next branch, to allow them to
get tested together with the mmc changes that are targeted for the next
release.
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Luke Wang [Wed, 11 Mar 2026 09:50:06 +0000 (17:50 +0800)]
mmc: sdhci: fix timing selection for 1-bit bus width
When 1-bit bus width is used with HS200/HS400 capabilities set,
mmc_select_hs200() returns 0 without actually switching. This
causes mmc_select_timing() to skip mmc_select_hs(), leaving eMMC
in legacy mode (26MHz) instead of High Speed SDR (52MHz).
Per JEDEC eMMC spec section 5.3.2, 1-bit mode supports High Speed
SDR. Drop incompatible HS200/HS400/UHS/DDR caps early so timing
selection falls through to mmc_select_hs() correctly.
Fixes:
f2119df6b764 ("mmc: sd: add support for signal voltage switch procedure")
Signed-off-by: Luke Wang <ziniu.wang_1@nxp.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Cc: stable@vger.kernel.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Kathiravan Thirumoorthy [Wed, 11 Mar 2026 09:45:48 +0000 (15:15 +0530)]
dt-bindings: mmc: sdhci-msm: add IPQ5210 compatible
The IPQ5210 supports eMMC with an SDHCI controller. Add the appropriate
compatible to the documentation.
Signed-off-by: Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Shawn Lin [Tue, 10 Mar 2026 01:35:53 +0000 (09:35 +0800)]
mmc: core: Remove checking MMC_CAP_4_BIT_DATA from mmc_host_can_uhs()
The bus width support for UHS mode is now validated in mmc_validate_host_caps().
Therefore, we can safely remove the explicit MMC_CAP_4_BIT_DATA check from
mmc_host_can_uhs(). As part of this cleanup, simplify the condition by using
the consolidated MMC_CAP_UHS flag.
Signed-off-by: Shawn Lin <shawn.lin@linux.dev>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Luke Wang [Tue, 10 Mar 2026 01:35:52 +0000 (09:35 +0800)]
mmc: core: Validate UHS/DDR/HS200 timing selection for 1-bit bus width
UHS/DDR/HS200 modes require at least 4-bit bus support. Host controllers
that lack relevant capability registers rely on paring properties provided
by firmware, which may incorrectly set these modes. Now that mmc_validate_host_caps()
has been introduced to validate such configuration violations, let's also
add checks for UHS/DDR/HS200 modes.
This fixes an issue where, if the HS200/HS400 property is set while only
a 1-bit bus width is used, mmc_select_hs200() returns 0 without actually
performing the mode switch. Consequently, mmc_select_timing() proceeds
without falling back to mmc_select_hs(), leaving the eMMC device operating
in legacy mode (26 MHz) instead of switching to High Speed mode (52 MHz).
Signed-off-by: Luke Wang <ziniu.wang_1@nxp.com>
[Shawn: reword the commit msg and rework the code]
Signed-off-by: Shawn Lin <shawn.lin@linux.dev>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Shawn Lin [Mon, 9 Mar 2026 03:29:03 +0000 (11:29 +0800)]
mmc: dw_mmc-rockchip: Add phase map support
Multiple boards require different phase settings, rendering the default
phase policy unscalable. Therefore, we introduce phase map to address this
limitation. To preserve backward compatibility, the default_sample_phase
and original drv phase for different modes are retained, with phase map
values taking precedence when available.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Shawn Lin [Mon, 9 Mar 2026 03:29:02 +0000 (11:29 +0800)]
mmc: dw_mmc-hi3798mv200: Using phase map from dw_mmc core
dw_mmc core helps parse phase map now, so reuse it.
No functional changes intended.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Shawn Lin [Mon, 9 Mar 2026 03:29:01 +0000 (11:29 +0800)]
mmc: dw_mmc: Add parsing mmc_clk_phase_map support
The dw_mmc library already assists in invoking mmc_of_parse() to
provide unified parsing for variant drivers. We can also call
mmc_of_parse_clk_phase() to help variant drivers achieve unified parsing.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Ciprian Marian Costea [Mon, 9 Mar 2026 14:34:08 +0000 (15:34 +0100)]
mmc: sdhci-esdhc-imx: add NXP S32N79 support
Add support for the uSDHC controller found in NXP S32N79 automotive SoCs,
which reuse the existing sdhci-esdhc-imx driver with slice difference.
Compared with s32g2/s32g3, needn't set ESDHC_FLAG_SKIP_CD_WAKE flag
because s32n79 does not have this limitation.
Co-developed-by: Larisa Grigore <larisa.grigore@nxp.com>
Signed-off-by: Larisa Grigore <larisa.grigore@nxp.com>
Signed-off-by: Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com>
Reviewed-by: Haibo Chen <haibo.chen@nxp.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Ciprian Marian Costea [Mon, 9 Mar 2026 14:34:06 +0000 (15:34 +0100)]
dt-bindings: mmc: fsl-imx-esdhc: add S32N79 support
Add compatible string "nxp,s32n79-usdhc" for the uSDHC controller found in
NXP S32N79 series automotive SoCs.
Co-developed-by: Larisa Grigore <larisa.grigore@nxp.com>
Signed-off-by: Larisa Grigore <larisa.grigore@nxp.com>
Signed-off-by: Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Thorsten Blum [Thu, 5 Mar 2026 12:25:49 +0000 (13:25 +0100)]
mmc: tifm_sd: Use min3() to simplify tifm_sd_transfer_data()
Use min3() to simplify tifm_sd_transfer_data().
Signed-off-by: Thorsten Blum <thorsten.blum@linux.dev>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Thorsten Blum [Thu, 5 Mar 2026 12:25:48 +0000 (13:25 +0100)]
mmc: sdio: Use min3() to simplify sdio_set_block_size()
Use min3() to simplify sdio_set_block_size().
Signed-off-by: Thorsten Blum <thorsten.blum@linux.dev>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Geert Uytterhoeven [Thu, 5 Mar 2026 09:08:24 +0000 (10:08 +0100)]
mmc: renesas_sdhi_sys_dmac: Convert to DEFINE_RUNTIME_DEV_PM_OPS()
Convert the Renesas SDHI SD/SDIO controller driver using SYS-DMAC from
an open-coded dev_pm_ops structure to DEFINE_RUNTIME_DEV_PM_OPS() and
pm_ptr(). This simplifies the code, and reduces kernel size in case
CONFIG_PM is disabled.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Binbin Zhou [Tue, 3 Mar 2026 11:27:40 +0000 (19:27 +0800)]
mmc: loongson2: Add Loongson-2K0300 SD/SDIO/eMMC controller driver
This patch describes the two MMC controllers of the Loongson-2K0300 SoC,
one providing an eMMC interface and the other exporting an SD/SDIO
interface.
Its hardware design is similar to that of the Loongson-2K2000, but it
suffers from hardware defects such as missing CMD48 interrupts.
Signed-off-by: Binbin Zhou <zhoubinbin@loongson.cn>
Reviewed-by: Huacai Chen <chenhuacai@loongson.cn>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Binbin Zhou [Tue, 3 Mar 2026 11:27:39 +0000 (19:27 +0800)]
mmc: loongson2: Gathering all SoCs private data together
More Loongson SoCs will be added, gathering all SoC private data
(`loongson2_mmc_pdata`) together to make the code clearer.
No functional change intended.
Signed-off-by: Binbin Zhou <zhoubinbin@loongson.cn>
Reviewed-by: Huacai Chen <chenhuacai@loongson.cn>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Binbin Zhou [Tue, 3 Mar 2026 11:27:38 +0000 (19:27 +0800)]
dt-bindings: mmc: loongson,ls2k0500-mmc: Add compatible for Loongson-2K0300
Add "loongson,ls2k0300-mmc" dedicated compatible to represent the
eMMC/SD/SDIO controller interface of the Loongson-2K0300 chip.
Its hardware design is similar to that of the Loongson-2K2000, but it
suffers from hardware defects such as missing CMD48 interrupts.
Signed-off-by: Binbin Zhou <zhoubinbin@loongson.cn>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Huacai Chen <chenhuacai@loongson.cn>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Felix Gu [Mon, 2 Mar 2026 13:47:12 +0000 (21:47 +0800)]
mmc: sdhci-of-bst: Fix memory leak in sdhci_bst_alloc_bounce_buffer()
In sdhci_bst_alloc_bounce_buffer(), if dma_alloc_coherent() fails, the
function immediately returns -ENOMEM without releasing the reserved
memory, which results in a memory leak.
Add the missing of_reserved_mem_device_release() call before returning
-ENOMEM to properly clean up the reserved memory.
Fixes:
695824f45629 ("mmc: sdhci: add Black Sesame Technologies BST C1200 controller driver")
Signed-off-by: Felix Gu <ustc.gu@gmail.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Ulf Hansson [Mon, 9 Mar 2026 12:45:42 +0000 (13:45 +0100)]
mmc: Merge the immutable mux branch into next
The mux branch contains updates to the mux core along with some
corresponding changes for a couple of consumer drivers, including an mmc
driver. Let's merge it into the next branch to get it tested and queued for
the next release.
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Josua Mayer [Thu, 26 Feb 2026 13:21:17 +0000 (15:21 +0200)]
mmc: host: renesas_sdhi_core: support selecting an optional mux
Some hardware designs route data or control signals through a mux to
support multiple devices on a single sdhi controller.
In particular SolidRun RZ/G2L/G2LC/V2L System on Module use a mux for
switching between soldered eMMC and an optional microSD on a carrier
board, e.g. for development or provisioning.
SD/SDIO/eMMC are not well suited for runtime switching between different
cards, however boot-time selection is possible and useful - in
particular considering dt overlays.
Add support for an optional SD/SDIO/eMMC mux defined in dt, and select
it during probe.
Similar functionality already exists in other places, e.g. i2c-omap.
Signed-off-by: Josua Mayer <josua@solid-run.com>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Josua Mayer [Thu, 26 Feb 2026 13:21:16 +0000 (15:21 +0200)]
mux: add visible config symbol to enable multiplexer subsystem
The multiplexer subsystem was initially designed to be completely
hidden, relying on consumers to "select MULTIPLEXER" explicitly.
Drivers implementing multiplexers depend on this hidden symbol.
This prevents users from manually enabling both the mux core and any of
the multiplexer drivers.
All multiplexer drivers in drivers/mux/ can operate standalone without a
consumer. This is particularly useful in a device-tree, where a default
state can be set through the idle-state property.
Over time, several drivers have added "select MULTIPLEXER" dependencies,
some of which require a mux and some consider it optional. v7.0-rc1
shows 15 such occurrences in Kconfig files, in a variety of subsystems.
The natural step forward to allow enabling mux core and drivers would be
adding a prompt and help text to the existing symbol.
This violates the general Kbuild advice to avoid selecting visible
symbols for all existing consumers of the mux core.
Add the new config symbol MUX_CORE with a prompt and help text as a
wrapper for users to enable manually. This avoids existing consumers
automatically selecting a visible symbol.
Change the MULTIPLEXER symbol from tristate to bool. This avoids complex
dependencies if users were to attempt a configuration where the mux is a
module but one of its consumers is built-in, as well as difficulties
keeping the state of visible and invisible symbols in sync.
Further convert the "menu ... depends on ..." structure to "if ... menu
... endmenu endif". These are functionally equivalent, but the new
structure is more efficient and can support future source statements
within the conditional block.
Signed-off-by: Josua Mayer <josua@solid-run.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Josua Mayer [Thu, 26 Feb 2026 13:21:15 +0000 (15:21 +0200)]
dt-bindings: mmc: renesas,sdhi: Add mux-states property
Add mux controller support for data or control lines that are muxed
between a host and multiple cards.
There are several devices supporting a choice of eMMC or SD on a single
board by both dip switch and gpio, e.g. Renesas RZ/G2L SMARC SoM and
SolidRun RZ/G2L SoM.
In-tree dts for the Renesas boards currently rely on preprocessor macros
and gpio hogs to describe the respective cards.
By adding mux-states property to sdhi controller description, boards can
correctly describe the mux that already exists in hardware - and drivers
can coordinate between mux selection and probing for cards.
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Josua Mayer <josua@solid-run.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Josua Mayer [Thu, 26 Feb 2026 13:21:14 +0000 (15:21 +0200)]
i2c: omap: switch to new generic helper for getting selected mux-state
Multiplexer subsystem has added generic helper functions for getting an
already selected mux-state object.
Replace existing logic in probe with the equivalent helper function.
There is a functional difference in that the mux is now automatically
deselected on release, replacing the explicit mux_state_deselect call.
This change is only compile-tested.
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Andreas Kemnade <andreas@kemnade.info>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Josua Mayer <josua@solid-run.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Josua Mayer [Thu, 26 Feb 2026 13:21:13 +0000 (15:21 +0200)]
phy: renesas: rcar-gen3-usb2: drop helper getting optional mux-state
Multiplexer subsystem has now added helpers for getting managed optional
mux-state.
Switch to the new devm_mux_state_get_optional_selected helper.
This change is only compile-tested.
Signed-off-by: Josua Mayer <josua@solid-run.com>
Acked-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Josua Mayer [Thu, 26 Feb 2026 13:21:12 +0000 (15:21 +0200)]
phy: can-transceiver: drop temporary helper getting optional mux-state
Multiplexer subsystem has now added helpers for getting managed optional
mux-state.
Switch to the new devm_mux_state_get_optional helper.
This change is only compile-tested.
Acked-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Josua Mayer <josua@solid-run.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Josua Mayer [Thu, 26 Feb 2026 13:21:11 +0000 (15:21 +0200)]
mux: Add helper functions for getting optional and selected mux-state
In-tree phy-can-transceiver and phy_rcar_gen3_usb2 have already
implemented local versions of devm_mux_state_get_optional.
The omap-i2c driver gets and selects an optional mux in its probe
function without using any helper.
Add new helper functions covering both aforementioned use-cases:
- mux_control_get_optional:
Get a mux-control if specified in dt, return NULL otherwise.
- devm_mux_state_get_optional:
Get a mux-state if specified in dt, return NULL otherwise.
- devm_mux_state_get_selected:
Get and select a mux-state specified in dt, return error otherwise.
- devm_mux_state_get_optional_selected:
Get and select a mux-state if specified in dt, return error or NULL.
Existing mux_get helper function is changed to take an extra argument
indicating whether the mux is optional.
In this case no error is printed, and NULL returned in case of ENOENT.
Calling code is adapted to handle NULL return case, and to pass optional
argument as required.
To support automatic deselect for _selected helper, a new structure is
created storing an exit pointer similar to clock core which is called on
release.
To facilitate code sharing between optional/mandatory/selected helpers,
a new internal helper function is added to handle quiet (optional) and
verbose (mandatory) errors, as well as storing the correct callback for
devm release: __devm_mux_state_get
Due to this structure devm_mux_state_get_*_selected can no longer print
a useful error message when select fails. Instead callers should print
errors where needed.
Commit
e153fdea9db04 ("phy: can-transceiver: Re-instate "mux-states"
property presence check") noted that "mux_get() always prints an error
message in case of an error, including when the property is not present,
confusing the user."
The first error message covers the case that a mux name is not matched
in dt. The second error message is based on of_parse_phandle_with_args
return value.
In optional case no error is printed and NULL is returned.
This ensures that the new helper functions will not confuse the user
either.
With the addition of optional helper functions it became clear that
drivers should compile and link even if CONFIG_MULTIPLEXER was not enabled.
Add stubs for all symbols exported by mux core.
Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Josua Mayer <josua@solid-run.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Josua Mayer [Thu, 26 Feb 2026 13:21:10 +0000 (15:21 +0200)]
phy: renesas: rcar-gen3-usb2: rename local mux helper to avoid conflict
Rename the temporary devm_mux_state_get_optional function to avoid
conflict with upcoming implementation in multiplexer subsystem.
Signed-off-by: Josua Mayer <josua@solid-run.com>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Acked-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Josua Mayer [Thu, 26 Feb 2026 13:21:09 +0000 (15:21 +0200)]
phy: can-transceiver: rename temporary helper function to avoid conflict
Rename the temporary devm_mux_state_get_optional function to avoid
conflict with upcoming implementation in multiplexer subsystem.
Signed-off-by: Josua Mayer <josua@solid-run.com>
Acked-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Ulf Hansson [Wed, 4 Mar 2026 16:55:41 +0000 (17:55 +0100)]
mmc: Merge branch fixes into next
Merge the mmc fixes for v7.0-rc[n] into the next branch, to allow them to
get tested together with the mmc changes that are targeted for the next
release.
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Matthew Schwartz [Mon, 2 Mar 2026 21:07:17 +0000 (13:07 -0800)]
mmc: sdhci-pci-gli: fix GL9750 DMA write corruption
The GL9750 SD host controller has intermittent data corruption during
DMA write operations. The GM_BURST register's R_OSRC_Lmt field
(bits 17:16), which limits outstanding DMA read requests from system
memory, is not being cleared during initialization. The Windows driver
sets R_OSRC_Lmt to zero, limiting requests to the smallest unit.
Clear R_OSRC_Lmt to match the Windows driver behavior. This eliminates
write corruption verified with f3write/f3read tests while maintaining
DMA performance.
Cc: stable@vger.kernel.org
Fixes:
e51df6ce668a ("mmc: host: sdhci-pci: Add Genesys Logic GL975x support")
Closes: https://lore.kernel.org/linux-mmc/
33d12807-5c72-41ce-8679-
57aa11831fad@linux.dev/
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Matthew Schwartz <matthew.schwartz@linux.dev>
Reviewed-by: Ben Chuang <ben.chuang@genesyslogic.com.tw>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Huan He [Thu, 26 Feb 2026 09:26:14 +0000 (17:26 +0800)]
dt-bindings: mmc: dwcmshc-sdhci: Fix resets array validation
The binding defines tuple-style reset-names items for some
compatibles, which implicitly enforces a fixed array length
via JSON Schema.
Defining global maxItems for resets and reset-names causes these
constraints to be intersected via allOf, resulting in an effective
minItems equal to the global maxItems. This leads to dtbs_check
failures reporting reset arrays as too short, even when the DTS
provides the correct number of entries.
Fixes:
30009a21f257 ("dt-bindings: mmc: sdhci-of-dwcmshc: Add Eswin EIC7700")
Co-developed-by: Pritesh Patel <pritesh.patel@einfochips.com>
Signed-off-by: Pritesh Patel <pritesh.patel@einfochips.com>
Signed-off-by: Huan He <hehuan1@eswincomputing.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Ricky Wu [Fri, 30 Jan 2026 03:05:01 +0000 (11:05 +0800)]
mmc: rtsx_pci_sdmmc: simplify voltage switch handling after card_busy()
Now that the Realtek PCIe SDMMC host implements the card_busy() callback,
the MMC core performs the required DAT[3:0] validation during the signal
voltage switch sequence.
As a result, the driver-side voltage stabilization helpers
sd_wait_voltage_stable_1() and sd_wait_voltage_stable_2() become redundant.
These helpers duplicate DAT line checks that are now handled centrally by
the MMC core via card_busy().
Remove the two stabilization helpers and simplify sdmmc_switch_voltage()
accordingly, keeping only the minimal clock control needed around the
voltage switch.
No functional changes and intended.
Signed-off-by: Ricky Wu <ricky_wu@realtek.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Ulf Hansson [Tue, 24 Feb 2026 09:32:56 +0000 (10:32 +0100)]
mmc: Merge branch fixes into next
Merge the mmc fixes for v7.0-rc[n] into the next branch, to allow them to
get tested together with the mmc changes that are targeted for the next
release.
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Brian Masney [Sun, 22 Feb 2026 23:39:14 +0000 (18:39 -0500)]
mmc: sdhci-pic32: allow driver to be compiled with COMPILE_TEST
This driver currently only supports builds against a PIC32 target. Now
that commit
d6618d277c1a ("mmc: sdhci-pic32: update include to use
pic32.h from platform_data") is merged, it's possible to compile this
driver on other architectures.
To avoid future breakage of this driver in the future, let's update the
Kconfig so that it can be built with COMPILE_TEST enabled on all
architectures.
Signed-off-by: Brian Masney <bmasney@redhat.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Brian Masney [Sun, 22 Feb 2026 23:39:13 +0000 (18:39 -0500)]
mmc: sdhci-pic32: add SPDX license identifier
Add the missing SPDX license identifier to the top of the file, and drop
the boiler plate license text.
Signed-off-by: Brian Masney <bmasney@redhat.com>
Cc: linux-spdx@vger.kernel.org
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Shawn Lin [Wed, 11 Feb 2026 14:00:34 +0000 (22:00 +0800)]
mmc: dw_mmc: Rename dw_mci_pltfm_pmops to dw_mci_pmops
Since it's moved to dw_mmc core and resued by others variant host
drivers, so drop the pltfm notation.
Suggested-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Fabio Estevam [Sat, 7 Feb 2026 13:10:41 +0000 (10:10 -0300)]
dt-bindings: mmc: rockchip-dw-mshc: Add RV1103B compatible
The RV1103B uses the DesignWare MSHC controller compatible with the
existing Rockchip RK3288 variant. Add the rockchip,rv1103b-dw-mshc
compatible string.
Signed-off-by: Fabio Estevam <festevam@nabladev.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
SriNavmani A [Fri, 6 Feb 2026 08:23:08 +0000 (16:23 +0800)]
mmc: sdhci-of-arasan: add support on Axiado AX3000 SoC
Axiado AX3000 SoC eMMC controller is based on Arasan eMMC 5.1 host
controller IP.
Signed-off-by: SriNavmani A <srinavmani@axiado.com>
Signed-off-by: Tzu-Hao Wei <twei@axiado.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
SriNavmani A [Fri, 6 Feb 2026 08:23:07 +0000 (16:23 +0800)]
dt-bindings: mmc: arasan,sdhci: Add Axiado AX3000 SoC
Add compatible strings for Axiado AX3000 SoC eMMC controller which
is based on Arasan eMMC controller.
Signed-off-by: SriNavmani A <srinavmani@axiado.com>
Signed-off-by: Tzu-Hao Wei <twei@axiado.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Ethan Nelson-Moore [Sat, 31 Jan 2026 02:00:38 +0000 (18:00 -0800)]
mmc: host: Remove unnecessary module_init/exit functions
Three MMC drivers have unnecessary module_init and module_exit functions
that are empty or just print a message. Remove them. Note that if a
module_init function exists, a module_exit function must also exist;
otherwise, the module cannot be unloaded.
Signed-off-by: Ethan Nelson-Moore <enelsonmoore@gmail.com>
Acked-by: Shawn Lin <shawn.lin@rock-chips.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Penghe Geng [Thu, 19 Feb 2026 20:29:54 +0000 (15:29 -0500)]
mmc: core: Avoid bitfield RMW for claim/retune flags
Move claimed and retune control flags out of the bitfield word to
avoid unrelated RMW side effects in asynchronous contexts.
The host->claimed bit shared a word with retune flags. Writes to claimed
in __mmc_claim_host() or retune_now in mmc_mq_queue_rq() can overwrite
other bits when concurrent updates happen in other contexts, triggering
spurious WARN_ON(!host->claimed). Convert claimed, can_retune,
retune_now and retune_paused to bool to remove shared-word coupling.
Fixes:
6c0cedd1ef952 ("mmc: core: Introduce host claiming by context")
Fixes:
1e8e55b67030c ("mmc: block: Add CQE support")
Cc: stable@vger.kernel.org
Suggested-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Penghe Geng <pgeng@nvidia.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Luke Wang [Wed, 4 Feb 2026 03:40:03 +0000 (11:40 +0800)]
mmc: core: Optimize time for secure erase/trim for some Kingston eMMCs
Kingston eMMC IY2964 and IB2932 takes a fixed ~2 seconds for each secure
erase/trim operation regardless of size - that is, a single secure
erase/trim operation of 1MB takes the same time as 1GB. With default
calculated 3.5MB max discard size, secure erase 1GB requires ~300 separate
operations taking ~10 minutes total.
Add a card quirk, MMC_QUIRK_FIXED_SECURE_ERASE_TRIM_TIME, to set maximum
secure erase size for those devices. This allows 1GB secure erase to
complete in a single operation, reducing time from 10 minutes to just 2
seconds.
Signed-off-by: Luke Wang <ziniu.wang_1@nxp.com>
Cc: stable@vger.kernel.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Arnd Bergmann [Wed, 4 Feb 2026 13:00:19 +0000 (14:00 +0100)]
mmc: dw_mmc: move pmops into core driver
Since the platform power management structure is now shared with the PCI
front-end, there is a link failure if only the PCI variant is enabled:
arm-linux-gnueabi/bin/arm-linux-gnueabi-ld: drivers/mmc/host/dw_mmc-pci.o:(.data+0x74): undefined reference to `dw_mci_pltfm_pmops'
This could be fixed by selecting the platform driver from the PCI one
in Kconfig, or by reverting the change to the PCI driver, but since this
is now used by all dw_mmc variants, just move the structure into the core
code as well.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Andre Korol [Thu, 29 Jan 2026 03:59:17 +0000 (00:59 -0300)]
mmc: loongson2-mmc: drop redundant memset after dma_alloc_coherent()
dma_alloc_coherent() returns zeroed memory, so the memset() immediately
after allocation is redundant.
Signed-off-by: Andre Korol <andre.korol.dev@gmail.com>
Reviewed-by: Binbin Zhou <zhoubinbin@loongson.cn>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Shawn Lin [Fri, 23 Jan 2026 12:24:09 +0000 (20:24 +0800)]
mmc: dw_mmc: Remove mshc alias support
Remove the long-deprecated mshc alias support, as the mmc core already
provides alias functionality through the standard mmc alias. This eliminates
the redundant dual-alias system. The driver now obtains the controller ID
from struct mmc_host::index(supplied by mmc alias) instead of the legacy mshc
alias.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Shawn Lin [Fri, 23 Jan 2026 12:24:08 +0000 (20:24 +0800)]
mmc: dw_mmc-k3: Remove mshc alias support
Remove the long-deprecated mshc alias support, as the mmc core already
provides alias functionality through the standard mmc alias. This eliminates
the redundant dual-alias system. The driver now obtains the controller ID
from struct mmc_host::index(supplied by mmc alias) instead of the legacy mshc
alias.
dw_mci_hi6220_parse_dt() which parse mshc alias is used for hi6220, hi3660 and
hi3670. Given hi6220 never assigned mshc alias on the DTS files, and hi3360
and hi3670 share the same code, so with it removed, add a return value to
dw_mci_hs_set_timing() and let dw_mci_hi3660_init() check if index exceeds
TIMING_MODE in the firs place to bail out early, the same as before.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Shawn Lin [Fri, 23 Jan 2026 12:24:07 +0000 (20:24 +0800)]
arm64: dts: hisilicon: hikey960/970: Convert to use standard mmc alias
Convert the long-deprecated mshc alias to standard mmc alias.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Reviewed-by: Wei Xu <xuwei5@hisilicon.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Albert Yang [Fri, 23 Jan 2026 09:53:42 +0000 (17:53 +0800)]
MAINTAINERS: add MMC files to BST entry
Add the MMC device tree binding and driver files to the existing
ARM/BST SOC SUPPORT maintainer entry.
Signed-off-by: Albert Yang <yangzh0906@thundersoft.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Albert Yang [Fri, 23 Jan 2026 09:53:39 +0000 (17:53 +0800)]
mmc: sdhci: add Black Sesame Technologies BST C1200 controller driver
Add SDHCI controller driver for Black Sesame Technologies C1200 SoC.
This driver supports the DWCMSHC SDHCI controller with BST-specific
enhancements including:
- Custom clock management and tuning
- Power management support
- BST-specific register configurations
- Support for eMMC and SD card interfaces
- Hardware limitation workaround for 32-bit DMA addressing
The driver addresses specific hardware constraints where:
- System memory uses 64-bit bus, eMMC controller uses 32-bit bus
- eMMC controller cannot access memory through SMMU due to hardware bug
- All system DRAM is configured outside 4GB boundary (ZONE_DMA32)
- Uses SRAM-based bounce buffer within 32-bit address space
Signed-off-by: Ge Gordon <gordon.ge@bst.ai>
Signed-off-by: Albert Yang <yangzh0906@thundersoft.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Albert Yang [Fri, 23 Jan 2026 09:53:38 +0000 (17:53 +0800)]
mmc: sdhci: allow drivers to pre-allocate bounce buffer
Allow platform drivers to pre-allocate bounce buffer by checking if
host->bounce_buffer is already set before attempting allocation.
This enables platforms with specific DMA constraints (such as 32-bit
DMA on controllers that cannot access high memory) to use their own
reserved memory regions for the bounce buffer.
Suggested-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Albert Yang <yangzh0906@thundersoft.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Albert Yang [Fri, 23 Jan 2026 09:53:37 +0000 (17:53 +0800)]
dt-bindings: mmc: add binding for BST DWCMSHC SDHCI controller
Add device tree bindings for the Black Sesame Technologies
DWCMSHC SDHCI controller used in C1200 SoC.
The binding describes a Synopsys DesignWare Cores Mobile Storage
Host Controller with BST-specific extensions including:
- Two register regions (core SDHCI and CRM registers)
- Optional memory-region for bounce buffer support
- Fixed clock input
Signed-off-by: Ge Gordon <gordon.ge@bst.ai>
Signed-off-by: Albert Yang <yangzh0906@thundersoft.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Yixun Lan [Thu, 22 Jan 2026 09:37:31 +0000 (17:37 +0800)]
mmc: sdhci-of-k1: spacemit: Add support for K3 SoC
The SDHCI controller found on SpacemiT K3 SoC share the same IP with K1
generation and introduce a compatible data to denote the change that broken
64BIT DMA issue has been fixed.
Signed-off-by: Yixun Lan <dlan@kernel.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Yixun Lan [Thu, 22 Jan 2026 09:37:30 +0000 (17:37 +0800)]
dt-bindings: mmc: spacemit,sdhci: add support for K3 SoC
The SDHCI controller found on SpacemiT K3 SoC share the same IP with
K1 generation, while fixed the broken 64BIT DMA issue. Introduce a
compatible string to enable support for it.
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Yixun Lan <dlan@kernel.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Linus Walleij [Tue, 20 Jan 2026 13:05:50 +0000 (14:05 +0100)]
mmc: sdhci: Stop advertising the driver in dmesg
As much as we have grown used to seeing this message on
every kernel boot, it does not add any technical value.
Drop all messages from sdhci_drv_init(), and drop the
module_init() and module_exit() calls as well since they
now become empty.
The modules becomes a pure library module, meaning it will
get pulled in by modprobe() when the symbols inside it
are needed, or compiled in if any users are compiled in.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Jeff Chen [Tue, 13 Jan 2026 03:15:17 +0000 (11:15 +0800)]
mmc: sdio: add NXP vendor and IW61x device IDs
Add NXP's SDIO vendor ID (0x0471) and IW61x device ID (0x0205) to
sdio_ids.h for future support of NXP Wi-Fi chips over SDIO.
Signed-off-by: Jeff Chen <jeff.chen_1@nxp.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Shawn Lin [Tue, 6 Jan 2026 02:17:08 +0000 (10:17 +0800)]
mmc: dw_mmc-pltfm: use modern PM macros
Use the modern PM macros for the suspend and resume functions to be
automatically dropped by the compiler when CONFIG_PM or CONFIG_PM_SLEEP
are disabled, without having to use #ifdef guards.
When this's done, remove all variant drivers' local pm definition and
replace it with dw_mci_pltfm_pmops.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
[Ulf: Fixed conflict by dropping changes for dw_mmc-rockchip]
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Shawn Lin [Tue, 6 Jan 2026 02:17:07 +0000 (10:17 +0800)]
mmc: dw_mmc-pci: Use BAR_2 and pcim_iomap_region()
PCIe endpoint framework defines standard BAR enum for EP drivers
to use, so remove PCI_BAR_NO here.
Then, pcim_iomap_regions has been deprecated for a long time, replace
it with pcim_iomap_region();
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Shawn Lin [Tue, 6 Jan 2026 02:17:05 +0000 (10:17 +0800)]
mmc: dw_mmc: Remove unused register access macros
The mci_readw/mci_writew/mci_readq/mci_writeq macros were added
to provide 16-bit and 64-bit register access operations, but they
have remained unused since their introduction. Remove these dead code.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Shawn Lin [Tue, 6 Jan 2026 02:17:04 +0000 (10:17 +0800)]
mmc: dw_mmc: Improve dw_mci_get_cd()
The current dw_mci_get_cd() implementation maintains a DW_MMC_CARD_PRESENT
flag primarily for logging purposes, which adds unnecessary complexity.
Additionally, the if-else-elif control flow does not align with the Linux
kernel coding style.
This commit simplifies the function by:
- Removing the redundant card presence flag
- Replacing the conditional chain with a cleaner implementation
- Improving code readability while maintaining functionality
The change reduces code complexity without affecting the actual card
detection behavior.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Shawn Lin [Tue, 6 Jan 2026 02:17:03 +0000 (10:17 +0800)]
mmc: dw_mmc: Remove DW_MCI_SEND_STATUS and DW_MCI_RECV_STATUS macros
Use MMC_DATA_READ and MMC_DATA_WRITE defined by MMC core instead.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Shawn Lin [Tue, 6 Jan 2026 02:17:02 +0000 (10:17 +0800)]
mmc: dw_mmc: Remove redundant struct mmc_data forward declaration
The header file linux/mmc/core.h, which is already included in dw_mmc.h,
contains the forward declaration of struct mmc_data. There's no need to
redeclare it here.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Shawn Lin [Tue, 6 Jan 2026 02:17:01 +0000 (10:17 +0800)]
mmc: dw_mmc: Remove struct dw_mci_board
The only user of dw_mci_board is dw_pci-pci, now we can provide
the caps from dw_mci_drv_data, so we could let dw_pci-pci use
dw_mci_drv_data and remove caps from struct dw_mci_board.
With that, struct dw_mci_board is no longer needed, we can remove
it. Then we should check all settings in dw_mci_parse_dt in order
not to overwrite them if provided from variant drivers.
Also, without CONFIG_OF support, dw_mmc doesn' work as host->pdata
is always ERR_PTR(-EINVAL), we could remove it together.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Shawn Lin [Tue, 6 Jan 2026 02:17:00 +0000 (10:17 +0800)]
mmc: dw_mmc: Remove bus_hz from struct dw_mci_board
struct dw_mci already keeps one, reuse it. Now, as dw_mmc-pci still
provide struct dw_mci_board, so host->bus_hz will not be overwritten.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Shawn Lin [Tue, 6 Jan 2026 02:16:59 +0000 (10:16 +0800)]
mmc: dw_mmc: Move detect_delay_ms from struct dw_mci_board to struct dw_mci
Now, as dw_mmc-pci still provide struct dw_mci_board, so host->detect_delay_ms
will not be overwritten. So it's fine to move it.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Shawn Lin [Tue, 6 Jan 2026 02:16:58 +0000 (10:16 +0800)]
mmc: dw_mmc: Remove fifo_depth from struct dw_mci_board
struct dw_mci already keeps one, so remove it from struct dw_mci_board.
Now, as dw_mmc-pci still provide struct dw_mci_board, so host->fifo_depth
will not be overwritten.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Shawn Lin [Tue, 6 Jan 2026 02:16:57 +0000 (10:16 +0800)]
mmc: dw_mmc: Move rstc from struct dw_mci_board to struct dw_mci
Nobody using dw_mci_board passes in rstc, move it to the common struct
dw_mci needed by all users.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Shawn Lin [Tue, 6 Jan 2026 02:16:56 +0000 (10:16 +0800)]
mmc: dw_mmc: Remove caps2 and pm_caps from struct dw_mci_board
Nobody uses them.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Shawn Lin [Tue, 6 Jan 2026 02:16:55 +0000 (10:16 +0800)]
mmc: dw_mmc: Remove assignment of pdata in dw_mci_pltfm_register()
No one using dw_mci_pltfm_register() passes in platform_data when
searching host and arch directories, remove it.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Shawn Lin [Tue, 6 Jan 2026 02:16:54 +0000 (10:16 +0800)]
mmc: dw_mmc: Remove SDMMC_INT_ERROR
SDMMC_INT_ERROR is defined as 0xbfc2, which looks like a magic number and
it's never used, so remove it.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Shawn Lin [Tue, 6 Jan 2026 02:16:53 +0000 (10:16 +0800)]
mmc: dw_mmc: Remove dma_ops from struct dw_mci_board
It does take dma_ops from struct dw_mci_board, but we immediately
re-assign it from either dw_mci_idmac_ops or dw_mci_edmac_ops in
dw_mci_init_dma(). That means it's never used now, or has been
broken for a long time without noticed. It seems no drivers need
it, so remove it now.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Shawn Lin [Tue, 6 Jan 2026 02:16:52 +0000 (10:16 +0800)]
mmc: dw_mmc: Check return value of dma_ops->init() in resume
dma_ops->init() may fail, should check the return value.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Vladimir Zapolskiy [Thu, 25 Dec 2025 18:16:15 +0000 (20:16 +0200)]
dt-bindings: mmc: arm,pl18x: Do not use plural form of a proper noun PrimeCell
As a proper noun PrimeCell is a single entity and it can not have a plural
form, fix the typo.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Krzysztof Kozlowski [Wed, 24 Dec 2025 12:44:35 +0000 (13:44 +0100)]
mmc: sdhci-of-aspeed: Simplify with scoped for each OF child loop
Use scoped for-each loop when iterating over device nodes to make code a
bit simpler.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Krzysztof Kozlowski [Wed, 24 Dec 2025 12:44:34 +0000 (13:44 +0100)]
mmc: jz4740: Fix Wvoid-pointer-to-enum-cast warning
"jz4740" is an enum, thus cast of pointer on 64-bit compile test with
clang W=1 causes:
jz4740_mmc.c:1055:18: error: cast to smaller integer type 'enum jz4740_mmc_version' from 'const void *' [-Werror,-Wvoid-pointer-to-enum-cast]
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Reviewed-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Krzysztof Kozlowski [Wed, 24 Dec 2025 12:44:33 +0000 (13:44 +0100)]
mmc: cavium-octeon: Simplify with scoped for each OF child loop
Use scoped for-each loop when iterating over device nodes to make code a
bit simpler.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Krzysztof Kozlowski [Wed, 24 Dec 2025 12:44:32 +0000 (13:44 +0100)]
mmc: atmel-mci: Simplify with scoped for each OF child loop
Use scoped for-each loop when iterating over device nodes to make code a
bit simpler.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Reviewed-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Thorsten Blum [Mon, 22 Dec 2025 10:03:33 +0000 (11:03 +0100)]
mmc: cavium: Use clamp to simplify cvm_mmc_set_clock
Use clamp() to simplify cvm_mmc_set_clock() and improve its readability.
Signed-off-by: Thorsten Blum <thorsten.blum@linux.dev>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Yixun Lan [Tue, 23 Dec 2025 02:24:50 +0000 (10:24 +0800)]
mmc: sdhci-of-k1: add reset support
The SDHCI controller of SpacemiT K1 SoC requires two resets, add
support to explicitly request the reset line and deassert during
initialization phase. Still using devm_xx_get_optional() API to
make the request optional.
Signed-off-by: Yixun Lan <dlan@gentoo.org>
Reviewed-by: Javier Martinez Canillas <javierm@redhat.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Yixun Lan [Tue, 23 Dec 2025 02:24:49 +0000 (10:24 +0800)]
dt-bindings: mmc: spacemit,sdhci: add reset support
The SpacemiT SDHCI controller has two reset lines, one connect to AXI bus
which shared by all controllers, while another one connect to individual
controller separately.
Signed-off-by: Yixun Lan <dlan@gentoo.org>
Reviewed-by: Javier Martinez Canillas <javierm@redhat.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Shawn Lin [Sat, 20 Dec 2025 05:22:06 +0000 (13:22 +0800)]
mmc: dw_mmc: Remove struct dw_mci_slot
Use dw_mci_alloc_host() helper to allocate struct dw_mci for dw_mmc-pci.c
and dw_mmc-pltfm.c. With that, we could get rid of struct dw_mci_slot and
remove it everywhere.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Shawn Lin [Sat, 20 Dec 2025 05:22:05 +0000 (13:22 +0800)]
mmc: dw_mmc: Introduce dw_mci_alloc_host()
This helper is used for variant drivers to allocate struct dw_mci
and set struct dw_mci as private data of struct mmc_host.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>