pinctrl: airoha: Use unsigned long for bit search

Instead of risking alignment problems and causing (false positive) array
bound warnings when casting a u32 to (64-bit) unsigned long, just use a
native unsigned long for doing bit searches. Avoids warning with GCC 15's
-Warray-bounds -fdiagnostics-details:

In file included from ../include/linux/bitmap.h:11,
                 from ../include/linux/cpumask.h:12,
                 from ../arch/x86/include/asm/paravirt.h:21,
                 from ../arch/x86/include/asm/irqflags.h:80,
                 from ../include/linux/irqflags.h:18,
                 from ../include/linux/spinlock.h:59,
                 from ../include/linux/irq.h:14,
                 from ../include/linux/irqchip/chained_irq.h:10,
                 from ../include/linux/gpio/driver.h:8,
                 from ../drivers/pinctrl/mediatek/pinctrl-airoha.c:11:
In function 'find_next_bit',
    inlined from 'airoha_irq_handler' at ../drivers/pinctrl/mediatek/pinctrl-airoha.c:2394:3:
../include/linux/find.h:65:23: error: array subscript 'long unsigned int[0]' is partly outside array bounds of 'u32[1]' {aka 'unsigned int[1]'} [-Werror=array-bounds=]
   65 |                 val = *addr & GENMASK(size - 1, offset);
      |                       ^~~~~
../drivers/pinctrl/mediatek/pinctrl-airoha.c: In function 'airoha_irq_handler':
../drivers/pinctrl/mediatek/pinctrl-airoha.c:2387:21: note: object 'status' of size 4
 2387 |                 u32 status;
      |                     ^~~~~~

Signed-off-by: Kees Cook <kees@kernel.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/20241117114534.work.292-kees@kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

pinctrl: k210: Undef K210_PC_DEFAULT

When the temporary macro K210_PC_DEFAULT is not needed anymore,
use its name in the #undef statement instead of
the incorrect "DEFAULT" name.

Fixes: d4c34d09ab03 ("pinctrl: Add RISC-V Canaan Kendryte K210 FPIOA driver")
Signed-off-by: zhang jiao <zhangjiao2@cmss.chinamobile.com>
Reviewed-by: Damien Le Moal <dlemoal@kernel.org>
Link: https://lore.kernel.org/20241113071201.5440-1-zhangjiao2@cmss.chinamobile.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

pinctrl: qcom: spmi: fix debugfs drive strength

Commit 723e8462a4fe ("pinctrl: qcom: spmi-gpio: Fix the GPIO strength
mapping") fixed a long-standing issue in the Qualcomm SPMI PMIC gpio
driver which had the 'low' and 'high' drive strength settings switched
but failed to update the debugfs interface which still gets this wrong.

Fix the debugfs code so that the exported values match the hardware
settings.

Note that this probably means that most devicetrees that try to describe
the firmware settings got this wrong if the settings were derived from
debugfs. Before the above mentioned commit the settings would have
actually matched the firmware settings even if they were described
incorrectly, but now they are inverted.

Fixes: 723e8462a4fe ("pinctrl: qcom: spmi-gpio: Fix the GPIO strength mapping")
Fixes: eadff3024472 ("pinctrl: Qualcomm SPMI PMIC GPIO pin controller driver")
Cc: Anjelique Melendez <quic_amelende@quicinc.com>
Cc: stable@vger.kernel.org # 3.19
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/20241025121622.1496-1-johan+linaro@kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

pinctrl: qcom: Add sm8750 pinctrl driver

Add TLMM pinctrl driver to support pin configuration with pinctrl
framework for sm8750 SoC.

Signed-off-by: Melody Olvera <quic_molvera@quicinc.com>
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/20241112002843.2804490-3-quic_molvera@quicinc.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

dt-bindings: pinctrl: qcom: Add sm8750 pinctrl

Add documentation for the Qualcomm sm8750 tlmm.

Signed-off-by: Melody Olvera <quic_molvera@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/20241112002843.2804490-2-quic_molvera@quicinc.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

pinctrl: cy8c95x0: remove unneeded goto labels

In some cases the code uses goto labels to just return an error code.
Replace those with direct return:s and drop unneeded goto labels.

Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Link: https://lore.kernel.org/20241110210040.18918-7-andy.shevchenko@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

pinctrl: cy8c95x0: embed iterator to the for-loop

When we iterate through nports the iterator variable is effectively
being not used outside of the loop. Make it clear by moving its definition
into the for-loop. This makes code cleaner as well.

Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Link: https://lore.kernel.org/20241110210040.18918-6-andy.shevchenko@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

pinctrl: cy8c95x0: Use temporary variable for struct device

Use a temporary variable for the struct device pointers to avoid
dereferencing. This makes code a bit neater.

Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Link: https://lore.kernel.org/20241110210040.18918-5-andy.shevchenko@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

pinctrl: cy8c95x0: use flexible sleeping in reset function

The device reset assert and deassert length was created by usleep_range()
but that does not ensure optimal handling of all the different values from
device tree properties. By switching to the new flexible sleeping helper
function, fsleep(), the correct delay function is called depending on
delay length, e.g. udelay(), usleep_range() or msleep().

While at it, move out GPIO consumer name setting of the reset conditional,
the all necessary checks are already done there, so logically that call is
not related to the reset sequence.

Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Link: https://lore.kernel.org/20241110210040.18918-4-andy.shevchenko@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

pinctrl: cy8c95x0: switch to using devm_regulator_get_enable()

The driver does not actively manage regulator state past probe() time,
so we can use devm_regulator_get_enable() to simplify the code.

Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Link: https://lore.kernel.org/20241110210040.18918-3-andy.shevchenko@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

pinctrl: cy8c95x0: Use 2-argument strscpy()

Use 2-argument strscpy(), which is not only shorter but also provides
an additional check that destination buffer is an array.

Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Link: https://lore.kernel.org/20241110210040.18918-2-andy.shevchenko@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

dt-bindings: pinctrl: sx150xq: allow gpio line naming

Adding gpio-line-names property works fine for this
device node, but dtb check drops warning:

'gpio-line-names' does not match any of the regexes: '-cfg$', 'pinctrl-[0-9]+'
from schema $id: http://devicetree.org/schemas/pinctrl/semtech,sx1501q.yaml#

Allow to add property gpio-line-names for this devices.

Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/20241105064206.43626-3-hs@denx.de
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

pinctrl: single: add marvell,pxa1908-padconf compatible

Add the "marvell,pxa1908-padconf" compatible to allow migrating to a
separate pinctrl driver later.

Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Duje Mihanović <duje.mihanovic@skole.hr>
Link: https://lore.kernel.org/20241104-pxa1908-lkml-v13-3-e050609b8d6c@skole.hr
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

dt-bindings: pinctrl: pinctrl-single: add marvell,pxa1908-padconf compatible

Add the "marvell,pxa1908-padconf" compatible to allow migrating to a
separate pinctrl driver later.

Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Duje Mihanović <duje.mihanovic@skole.hr>
Link: https://lore.kernel.org/20241104-pxa1908-lkml-v13-2-e050609b8d6c@skole.hr
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

dt-bindings: pinctrl: correct typo of description for cv1800

It should be PINMUX/PINMUX2, not GPIOMUX/GPIOMUX2, see
<dt-bindings/pinctrl/pinctrl-cv1800b.h>.

Fixes: 64aa494de6fa ("dt-bindings: pinctrl: Add pinctrl for Sophgo CV1800 series SoC.")
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Reviewed-by: Inochi Amaoto <inochiama@gmail.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/20241029012312.3448287-1-unicornxw@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

pinctrl: qcom: spmi-mpp: Add PM8937 compatible

The PM8937 provides 4 MPPs.
Add a compatible to support them.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Barnabás Czémán <barnabas.czeman@mainlining.org>
Link: https://lore.kernel.org/20241031-msm8917-v2-4-8a075faa89b1@mainlining.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

dt-bindings: pinctrl: qcom,pmic-mpp: Document PM8937 compatible

Document the Device Tree binding for PM8937 MPPs.

Signed-off-by: Barnabás Czémán <barnabas.czeman@mainlining.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/20241031-msm8917-v2-3-8a075faa89b1@mainlining.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

pinctrl: qcom-pmic-gpio: add support for PM8937

PM8937 has 8 GPIO-s with holes on GPIO3, GPIO4 and GPIO6.

Signed-off-by: Barnabás Czémán <barnabas.czeman@mainlining.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/20241031-msm8917-v2-2-8a075faa89b1@mainlining.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

dt-bindings: pinctrl: qcom,pmic-gpio: add PM8937

Document the 8 GPIOs found on PM8937. It has holes on
3,4 and 6 pins.

Signed-off-by: Barnabás Czémán <barnabas.czeman@mainlining.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/20241031-msm8917-v2-1-8a075faa89b1@mainlining.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

pinctrl: Use of_property_present() for non-boolean properties

The use of of_property_read_bool() for non-boolean properties is
deprecated in favor of of_property_present() when testing for property
presence.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/20241104194437.327430-1-robh@kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

Merge tag 'intel-pinctrl-v6.13-2' of git://git./linux/kernel/git/pinctrl/intel into devel

intel-pinctrl for v6.13-2

This includes following Intel pinctrl changes for v6.13 merge window:

  - Expose DSW community on Elkhart Lake.
  - Elaborate in the code comment the pull bias settings.

Both have been in linux-next with no reported issues.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

Merge tag 'renesas-pinctrl-for-v6.13-tag2' of git://git./linux/kernel/git/geert/renesas-drivers into devel

pinctrl: renesas: Updates for v6.13 (take two)

  - Use the gpiochip_populate_parent_fwspec_twocell() helper.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

pinctrl: elkhartlake: Add support for DSW community

Hardware has a DSW (Deep Sleep Well) community that might be exposed
by some BIOSes. Add support for it in the driver.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>

pinctrl: intel: Add a human readable decoder for pull bias values

Add a human readable decoder for pull bias values in the comment.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>

pinctrl: airoha: Add support for EN7581 SoC

Introduce pinctrl driver for EN7581 SoC. Current EN7581 pinctrl driver
supports the following functionalities:
- pin multiplexing
- pin pull-up, pull-down, open-drain, current strength,
  {input,output}_enable, output_{low,high}
- gpio controller
- irq controller

Tested-by: Benjamin Larsson <benjamin.larsson@genexis.eu>
Co-developed-by: Benjamin Larsson <benjamin.larsson@genexis.eu>
Signed-off-by: Benjamin Larsson <benjamin.larsson@genexis.eu>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Link: https://lore.kernel.org/20241023-en7581-pinctrl-v9-5-afb0cbcab0ec@kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

dt-bindings: mfd: Add support for Airoha EN7581 GPIO System Controller

Add support for Airoha EN7581 GPIO System Controller which provide a
register map for controlling the GPIO, pinctrl and PWM of the SoC via
dedicated pinctrl and pwm child nodes.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Co-developed-by: Lorenzo Bianconi <lorenzo@kernel.org>
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Link: https://lore.kernel.org/20241023-en7581-pinctrl-v9-4-afb0cbcab0ec@kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

dt-bindings: pwm: airoha: Add EN7581 pwm

Introduce device-tree binding documentation for Airoha EN7581 pwm
controller.

Co-developed-by: Christian Marangi <ansuelsmth@gmail.com>
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Acked-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com>
Link: https://lore.kernel.org/20241023-en7581-pinctrl-v9-3-afb0cbcab0ec@kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

dt-bindings: pinctrl: airoha: Add EN7581 pinctrl

Introduce device-tree binding documentation for Airoha EN7581 pinctrl
controller.

Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Link: https://lore.kernel.org/20241023-en7581-pinctrl-v9-2-afb0cbcab0ec@kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

dt-bindings: arm: airoha: Add the chip-scu node for EN7581 SoC

This patch adds the chip-scu document bindings for EN7581 SoC.
The airoha chip-scu block provides a configuration interface for clock,
io-muxing and other functionalities used by multiple controllers (e.g.
clock, pinctrl, ecc.) on EN7581 SoC.

Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Link: https://lore.kernel.org/20241023-en7581-pinctrl-v9-1-afb0cbcab0ec@kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

Merge tag 'samsung-pinctrl-6.13' of https://git./linux/kernel/git/pinctrl/samsung into devel

Samsung pinctrl drivers changes for v6.13

1. Add new pin controller drivers for new Samsung SoCs: Exynos8895,
   Exynos9810, Exynos990.

2. Correct the condition when applying further interrupt constraints on
   certain Samsung pin controllers.  The condition was simply not
   effective.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

pinctrl: aspeed-g6: Support drive-strength for GPIOF/G

Add drive strength configuration support for GPIO F and G groups.

Signed-off-by: Billy Tsai <billy_tsai@aspeedtech.com>
Reviewed-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Link: https://lore.kernel.org/20241023104406.4083460-1-billy_tsai@aspeedtech.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

pinctrl: spacemit: fix double free of map

The map pointer is freed by pinctrl_utils_free_map().  It must not be a
devm_ pointer or it leads to a double free when the device is unloaded.

This is similar to a couple bugs Harshit Mogalapalli fixed earlier in
commits 3fd976afe974 ("pinctrl: nuvoton: fix a double free in
ma35_pinctrl_dt_node_to_map_func()") and 4575962aeed6 ("pinctrl: sophgo:
fix double free in cv1800_pctrl_dt_node_to_map()").

Fixes: a83c29e1d145 ("pinctrl: spacemit: add support for SpacemiT K1 SoC")
Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
Acked-by: Yixun Lan <dlan@gentoo.org>
Link: https://lore.kernel.org/4b5f1306-dc01-4edc-96d3-b232b930ddf2@stanley.mountain
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

dt-bindings: pinctrl: convert pinctrl-mcp23s08.txt to yaml format

YAML binding file provides the conversion of the original text-based
binding for the pinctrl-mcp23s08 to microchip,mcp23s08.yaml.

following compatible strings using the deprecated mcp prefix have been
removed from this binding:

- mcp,mcp23s08
- mcp,mcp23s17
- mcp,mcp23008
- mcp,mcp23017

Signed-off-by: Himanshu Bhavani <himanshu.bhavani@siliconsignals.io>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/20241028063939.6276-1-himanshu.bhavani@siliconsignals.io
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

pinctrl: samsung: Add Exynos9810 SoC specific data

Add Samsung Exynos9810 SoC specific data to enable pinctrl
support for platforms based on Exynos9810.

Co-developed-by: Maksym Holovach <nergzd@nergzd723.xyz>
Signed-off-by: Maksym Holovach <nergzd@nergzd723.xyz>
Signed-off-by: Markuss Broks <markuss.broks@gmail.com>
Link: https://lore.kernel.org/r/20241026-exynos9810-v3-8-b89de9441ea8@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

dt-bindings: pinctrl: samsung: Add compatible for exynos9810-wakeup-eint

Add the compatible for Samsung Exynos9810 pinctrl eint block
to the schema. It is compatible with Exynos850 EINT controller,
and doesn't have a dedicated IRQ line.

Co-developed-by: Maksym Holovach <nergzd@nergzd723.xyz>
Signed-off-by: Maksym Holovach <nergzd@nergzd723.xyz>
Signed-off-by: Markuss Broks <markuss.broks@gmail.com>
Link: https://lore.kernel.org/r/20241026-exynos9810-v3-4-b89de9441ea8@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

dt-bindings: pinctrl: samsung: Add compatible for Exynos9810 SoC

Add a compatible for Samsung Exynos9810 pinctrl block to the schema.
Exynos9810 has 9 total pin banks and it's similar to other Samsung
SoC pinctrl blocks.

Co-developed-by: Maksym Holovach <nergzd@nergzd723.xyz>
Signed-off-by: Maksym Holovach <nergzd@nergzd723.xyz>
Signed-off-by: Markuss Broks <markuss.broks@gmail.com>
Link: https://lore.kernel.org/r/20241026-exynos9810-v3-3-b89de9441ea8@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

dt-bindings: pinctrl: qcom,sm8650-lpass-lpi-pinctrl: Add SM8750

Document compatible for Qualcomm SM8750 SoC LPASS TLMM pin controller,
fully compatible with previous SM8650 generation (same amount of pins
and functions).

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/20241022064245.22983-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

pinctrl: renesas: rzg2l: Use gpiochip_populate_parent_fwspec_twocell helper

Because rzg2l_gpio_populate_parent_fwspec() and
gpiochip_populate_parent_fwspec_twocell() are identical.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20241017113942.139712-3-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

pinmux: Use sequential access to access desc->pinmux data

When two client of the same gpio call pinctrl_select_state() for the
same functionality, we are seeing NULL pointer issue while accessing
desc->mux_owner.

Let's say two processes A, B executing in pin_request() for the same pin
and process A updates the desc->mux_usecount but not yet updated the
desc->mux_owner while process B see the desc->mux_usecount which got
updated by A path and further executes strcmp and while accessing
desc->mux_owner it crashes with NULL pointer.

Serialize the access to mux related setting with a mutex lock.

cpu0 (process A) cpu1(process B)

pinctrl_select_state() {   pinctrl_select_state() {
  pin_request() { pin_request() {
  ...
 ....
    } else {
         desc->mux_usecount++;
     desc->mux_usecount && strcmp(desc->mux_owner, owner)) {

         if (desc->mux_usecount > 1)
               return 0;
         desc->mux_owner = owner;

  } }

Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com>
Link: https://lore.kernel.org/20241014192930.1539673-1-quic_mojha@quicinc.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

dt-bindings: pinctrl: fsl,imx6ul-pinctrl: Convert i.MX35/5x/6 to YAML

The IOMUXC controller description is almost identical on i.MX35/5x/6 SoCs,
except for the configuration bits which differ across SoCs. Rename the
fsl,imx6ul-pinctrl.yaml to fsl,imx35-pinctrl.yaml, fill in compatible
strings for the other SoCs and fill in the various bits into desciption.
This way, i.MX35/5x/6 series SoCs can all be converted to DT schema.
Remove the old text DT bindings description.

Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Marek Vasut <marex@denx.de>
Link: https://lore.kernel.org/20241017211241.170861-1-marex@denx.de
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

pinctrl: imx-scmi: Drop obsolete dependency on COMPILE_TEST

Since commit 0166dc11be91 ("of: make CONFIG_OF user selectable"), OF
can be enabled on all architectures. Therefore depending on
COMPILE_TEST as an alternative is no longer needed.

As ARM_SCMI_PROTOCOL already depends on COMPILE_TEST, we also don't
need to add COMPILE_TEST as an alternative dependency for it.

Signed-off-by: Jean Delvare <jdelvare@suse.de>
Link: https://lore.kernel.org/20241022134017.172411db@endymion.delvare
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

pinctrl: qcom: add support for TLMM on SAR2130P

Add driver for the pincontrol device as present on the Qualcomm
SAR2130P platform. This is based on the msm-5.10 tree, tag
KERNEL.PLATFORM.1.0.r4-00400-NEO.0.

Co-developed-by: Mayank Grover <groverm@codeaurora.org>
Signed-off-by: Mayank Grover <groverm@codeaurora.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/20241018-sar2130p-tlmm-v2-2-11a1d09a6e5f@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

dt-bindings: pinctrl : qcom: document SAR2130P TLMM

Add bindings for the pin controller (TLMM) present on the
Qualcomm SAR2130P platform.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/20241018-sar2130p-tlmm-v2-1-11a1d09a6e5f@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

pinctrl: qcom: add the tlmm driver for QCS8300 platforms

Add support for QCS8300 TLMM configuration and control via the
pinctrl framework.

Signed-off-by: Jingyi Wang <quic_jingyw@quicinc.com>
Link: https://lore.kernel.org/20241018-qcs8300_tlmm-v3-2-8b8d3957cf1a@quicinc.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

dt-bindings: pinctrl: describe qcs8300-tlmm

Add DT bindings for the TLMM controller on QCS8300 platforms.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Jingyi Wang <quic_jingyw@quicinc.com>
Link: https://lore.kernel.org/20241018-qcs8300_tlmm-v3-1-8b8d3957cf1a@quicinc.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

Merge tag 'renesas-pinctrl-for-v6.13-tag1' of git://git./linux/kernel/git/geert/renesas-drivers into devel

pinctrl: renesas: Updates for v6.13

  - Marks GPIOs as used on RZ/A1 and RZ/A2,
  - Add open-drain and schmitt-trigger support on RZ/V2H(P),
  - Miscellaneous fixes and improvements.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

pinctrl: spacemit: add support for SpacemiT K1 SoC

SpacemiT's K1 SoC has a pinctrl controller which use single register
to describe all functions, which include bias pull up/down(strong pull),
drive strength, schmitter trigger, slew rate, mux mode.

Signed-off-by: Yixun Lan <dlan@gentoo.org>
Link: https://lore.kernel.org/20241016-02-k1-pinctrl-v5-2-03d395222e4f@gentoo.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

dt-bindings: pinctrl: spacemit: add support for K1 SoC

Add dt-bindings for the pinctrl driver of SpacemiT's K1 SoC.

Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Yixun Lan <dlan@gentoo.org>
Link: https://lore.kernel.org/20241016-02-k1-pinctrl-v5-1-03d395222e4f@gentoo.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

pinctrl: samsung: Add Exynos 990 SoC pinctrl configuration

Add SoC pinctrl configuration for the Exynos 990. The bank types
used are the same as Exynos 850, so we can reuse its macros.

Signed-off-by: Igor Belwon <igor.belwon@mentallysanemainliners.org>
Link: https://lore.kernel.org/r/20241016154838.64515-4-igor.belwon@mentallysanemainliners.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

dt-bindings: pinctrl: samsung: Add exynos990-wakeup-eint compatible

Add a dedicated compatible for the exynos990-wakeup-eint node.
This SoC pin controller does not mux interrupts. It's compatible with
Exynos 850's node, while also being compatible with the Exynos7
fallback.

Signed-off-by: Igor Belwon <igor.belwon@mentallysanemainliners.org>
Link: https://lore.kernel.org/r/20241016154838.64515-3-igor.belwon@mentallysanemainliners.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

dt-bindings: pinctrl: samsung: Add exynos990-pinctrl compatible

Add a dedicated compatible for the exynos990-pinctrl node.

Signed-off-by: Igor Belwon <igor.belwon@mentallysanemainliners.org>
Link: https://lore.kernel.org/r/20241016154838.64515-2-igor.belwon@mentallysanemainliners.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

pinctrl: th1520: Fix potential null pointer dereference on func

The initialization of muxtype deferences pointer func before func
is sanity checked with a null pointer check, hence we have a null
pointer deference issue. Fix this by only deferencing func with
the assignment to muxtype after func has been null pointer checked.

Fixes: 1fc30cd92770 ("pinctrl: th1520: Factor out casts")
Signed-off-by: Colin Ian King <colin.i.king@gmail.com>
Reported-by: Kees Bakker <kees@ijzerbout.nl>
Acked-by: Drew Fustini <dfustini@tenstorrent.com>
Link: https://lore.kernel.org/20241016155655.334518-1-colin.i.king@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

pinctrl: sophgo: fix typo in tristate of SG2002

Fix typo in tristate definition of the SG2002 Pinctrl driver.

Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>
Link: https://lore.kernel.org/20241016-typo-pinctrl-sg2002-v1-1-2bdacb2d41e3@bootlin.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

dt-bindings: pinctrl: samsung: Add missing constraint for Exynos8895 interrupts

Expect only one interrupt on Exynos8895 wake-up pin controller.

Fixes: e2d58d1e1c61 ("dt-bindings: pinctrl: samsung: add exynos8895-wakeup-eint compatible")
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20241015065848.29429-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

dt-bindings: pinctrl: samsung: Fix interrupt constraint for variants with fallbacks

Commit 904140fa4553 ("dt-bindings: pinctrl: samsung: use Exynos7
fallbacks for newer wake-up controllers") added
samsung,exynos7-wakeup-eint fallback to some compatibles, so the
intention in the if:then: conditions was to handle the cases:

1. Single Exynos7 compatible or Exynos5433+Exynos7 or
   Exynos7885+Exynos7: only one interrupt

2. Exynos850+Exynos7: no interrupts

This was not implemented properly however and if:then: block matches
only single Exynos5433 or Exynos7885 compatibles, which do not exist in
DTS anymore, so basically is a no-op and no enforcement on number of
interrupts is made by the binding.

Fix the if:then: condition so interrupts in the Exynos5433 and
Exynos7885 wake-up pin controller will be properly constrained.

Fixes: 904140fa4553 ("dt-bindings: pinctrl: samsung: use Exynos7 fallbacks for newer wake-up controllers")
Cc: stable@vger.kernel.org
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20241015065848.29429-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

pinctrl: PINCTRL_K230 should depend on ARCH_CANAAN

The Canaan Kendryte K230 pin controller is only present on Canaan
Kendryte K230 SoCs.  Hence add a dependency on ARCH_CANAAN, to prevent
asking the user about this driver when configuring a kernel without
Canaan Kendryte series SoC platform support.

Fixes: 545887eab6f6776a ("pinctrl: canaan: Add support for k230 SoC")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/d70279ba02a67250203744b38314f4475b3c5671.1728986052.git.geert+renesas@glider.be
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

pinctrl: th1520: add a CONFIG_OF dependency

When compile-testing without CONfIG_OF:

drivers/pinctrl/pinctrl-th1520.c: In function 'th1520_pinctrl_dt_node_to_map':
drivers/pinctrl/pinctrl-th1520.c:455:23: error: implicit declaration of function 'pinconf_generic_parse_dt_config'; did you mean 'pinconf_generic_dump_config'? [-Wimplicit-function-declaration]
  455 |                 ret = pinconf_generic_parse_dt_config(child, pctldev, &configs, &nconfigs);
      |                       ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
      |                       pinconf_generic_dump_config

Enforce this using Kconig dependencies.

Fixes: bed5cd6f8a98 ("pinctrl: Add driver for the T-Head TH1520 SoC")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Drew Fustini <drew@pdp7.com>
Link: https://lore.kernel.org/20241015151126.2401855-1-arnd@kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

pinctrl: renesas: Select PINCTRL_RZG2L for RZ/V2H(P) SoC

Add explicit selection of the PINCTRL_RZG2L config option for the
RZ/V2H(P) (R9A09G057) SoC, ensuring pin control driver is enabled
for this SoC.

Fixes: 9bd95ac86e70 ("pinctrl: renesas: rzg2l: Add support for RZ/V2H SoC")
Reported-by: Biju Das <biju.das.jz@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20241010132726.702658-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

pinctrl: renesas: rzg2l: Add support for configuring schmitt-trigger

Add support for configuring the multiplexed pins as schmitt-trigger
inputs.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Link: https://lore.kernel.org/20241004123658.764557-4-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

pinctrl: renesas: rzg2l: Add support for enabling/disabling open-drain outputs

Add support for enabling and disabling open-drain outputs.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Link: https://lore.kernel.org/20241004123658.764557-3-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

pinctrl: amd: Fix two small typos

Found those two while reading the code:

EDGE_TRAGGER -> EDGE_TRIGGER
BOTH_EADGE -> BOTH_EDGES

No functional changes, compile tested only.

Signed-off-by: Marc Ferland <marc.ferland@sonatest.com>
Link: https://lore.kernel.org/20241009151249.2086702-1-marc.ferland@sonatest.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

pinctrl: Switch back to struct platform_driver::remove()

After commit 0edb555a65d1 ("platform: Make platform_driver::remove()
return void") .remove() is (again) the right callback to implement for
platform drivers.

Convert all platform drivers below drivers/pinctrl to use .remove(),
with the eventual goal to drop struct platform_driver::remove_new(). As
.remove() and .remove_new() have the same prototypes, conversion is done
by just changing the structure member name in the driver initializer.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com>
Link: https://lore.kernel.org/20241007205803.444994-8-u.kleine-koenig@baylibre.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

pinctrl: th1520: Factor out casts

Limit the casts to get the mux data and flags from the driver data
pointer with each pin to two inline functions as requested by Andy
during review.

Signed-off-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Reviewed-by: Drew Fustini <dfustini@tenstorrent.com>
Tested-by: Drew Fustini <dfustini@tenstorrent.com>
Link: https://lore.kernel.org/20241011144826.381104-4-emil.renner.berthing@canonical.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

pinctrl: th1520: Update pinmux tables

When Drew took over the pinctrl driver it seems like he didn't use the
git tree I pointed him at and thus missed some important fixes to the
tables describing valid pinmux settings.

The documentation has a nice overview table of these settings but
unfortunately it doesn't fully match the register descriptions, which
seem to be the correct version.

Fixes: bed5cd6f8a98 ("pinctrl: Add driver for the T-Head TH1520 SoC")
Signed-off-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Reviewed-by: Drew Fustini <dfustini@tenstorrent.com>
Tested-by: Drew Fustini <dfustini@tenstorrent.com>
Link: https://lore.kernel.org/20241011144826.381104-3-emil.renner.berthing@canonical.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

pinctrl: th1520: Fix pinconf return values

When Drew took over the pinctrl driver he must have changed
all the -ENOTSUPP returns into -EOPNOTSUPP. This subtle change
was most likely not spotted because it was never mentioned in the
changelog of the patchset, but it breaks all the places in the
pin control and GPIO frameworks where -ENOTSUPP is expected.

Fixes: bed5cd6f8a98 ("pinctrl: Add driver for the T-Head TH1520 SoC")
Signed-off-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Reviewed-by: Drew Fustini <dfustini@tenstorrent.com>
Tested-by: Drew Fustini <dfustini@tenstorrent.com>
Link: https://lore.kernel.org/20241011144826.381104-2-emil.renner.berthing@canonical.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

pinctrl: zynqmp: drop excess struct member description

The 'node' member has never been part of this structure so drop its
description.

Fixes: 8b242ca700f8 ("pinctrl: Add Xilinx ZynqMP pinctrl driver support")
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Link: https://lore.kernel.org/20241010080432.7781-1-brgl@bgdev.pl
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

pinctrl: aw9523: fix kerneldoc for _aw9523_gpio_get_multiple()

The parameters' descriptions are wrong, drop the invalid ones and
document the ones that are missing the description.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Link: https://lore.kernel.org/20241010080347.7759-1-brgl@bgdev.pl
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

pinctrl: s32: add missing pins definitions

Added definitions for some pins which were missing from the
S32G2 SIUL2 pinctrl driver. These pins are used by the JTAG,
PFE and LLCE hardware modules.

Reviewed-by: Matthias Brugger <mbrugger@suse.com>
Signed-off-by: Andrei Stefanescu <andrei.stefanescu@oss.nxp.com>
Link: https://lore.kernel.org/20241002135920.3647322-2-andrei.stefanescu@oss.nxp.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

pinctrl: th1520: Convert dt child node loop to scoped iterator

Convert th1520_pinctrl_dt_node_to_map() to use a scoped iterator with
for_each_available_child_of_node_scoped(). As a result, there is no need
to call of_node_put() anymore. The put_child label has been renamed to
free_map which is now a more accurate description.

Suggested-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Drew Fustini <dfustini@tenstorrent.com>
Link: https://lore.kernel.org/20241008-th1520-pinctrl-fixes-v3-3-5b60db446a49@tenstorrent.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

pinctrl: th1520: Convert thp->mutex to guarded mutex

Convert th1520_pinctrl_dt_node_to_map() to use guarded mutex for
thp->mutex.

Suggested-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Drew Fustini <dfustini@tenstorrent.com>
Link: https://lore.kernel.org/20241008-th1520-pinctrl-fixes-v3-2-5b60db446a49@tenstorrent.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

pinctrl: th1520: Fix return value for unknown pin error

Fix th1520_pinctrl_dt_node_to_map() to set the return value before
jumping to free_configs when an unknown pin error occurs.

Reported-by: Dan Carpenter <dan.carpenter@linaro.org>
Closes: https://lore.kernel.org/r/202410022336.xyWlV0Tf-lkp@intel.com/
Signed-off-by: Drew Fustini <dfustini@tenstorrent.com>
Link: https://lore.kernel.org/20241008-th1520-pinctrl-fixes-v3-1-5b60db446a49@tenstorrent.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

dt-bindings: pinctrl: renesas,rzg2l-pinctrl: Allow schmitt and open drain properties

On the RZ/V2H(P) SoC one can configure the 'input-schmitt-{enable,disable}',
'drive-open-drain' and 'drive-push-pull' of multiplexed pins. Update the
binding documentation to include these properties.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/20241004123658.764557-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

pinctrl: renesas: rzg2l: Fix missing return in rzg2l_pinctrl_register()

Fix the missing return statement in the error path of
rzg2l_pinctrl_register().

Fixes: f73f63b24491fa43 ("pinctrl: renesas: rzg2l: Use dev_err_probe()")
Reported-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
Closes: https://lore.kernel.org/all/OS0PR01MB638837327E5487B71D88A70392712@OS0PR01MB6388.jpnprd01.prod.outlook.com/
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20241003082550.33341-1-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

pinctrl: renesas: rzg2l: Remove RZG2L_TINT_IRQ_START_INDEX

The RZ/V2H(P) SoC has 16 IRQ interrupts, while every other SoC has 8,
and this affects the start index of TINT interrupts (1 + 16 = 17, rather
than 1 + 8 = 9).
Macro RZG2L_TINT_IRQ_START_INDEX cannot work anymore, replace it with a
new member within struct rzg2l_hwcfg.

Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Link: https://lore.kernel.org/20240930145244.356565-2-fabrizio.castro.jz@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

pinctrl: k230: Drop unused code

The build robot complains about unused code. Let's drop it,
this can be restored with simple git revert when needed.

Reported-by: kernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202410021136.ie3cFM2w-lkp@intel.com/
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/20241003-k320-unused-v1-1-72e65bc2f27b@linaro.org

pinctrl: imx27: Fix too generic defines

The "PC" define is colliding with the (apparently broadcased)
define for "program counter" on Loongarch, so let's rename all
these 2-letter defines so they don't collide with stuff.

Fixes: a55222b7a132 ("pinctrl: freescale: enable use with COMPILE_TEST")
Reported-by: kernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202410030214.dPrgmUqd-lkp@intel.com/
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/20241003-fix-imx27-pc-v1-1-0e78d1fc6175@linaro.org

pinctrl: aw9523: use devm_mutex_init

Simplifies probe by removing all gotos and removing mutex_destroy from
_remove.

Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://lore.kernel.org/20241003214746.146207-1-rosenp@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

pinctrl: aw9523: add missing mutex_destroy

Otherwise the mutex remains after a failed kzalloc.

Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://lore.kernel.org/20241001212724.309320-1-rosenp@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

pinctrl: freescale: fix COMPILE_TEST error with PINCTRL_IMX_SCU

When PINCTRL_IMX_SCU was selected by PINCTRL_IMX8DXL or PINCTRL_IMX8QM
combined with COMPILE_TEST on a non-arm platforms, the IMX_SCU
dependency could not be enabled.

Reported-by: kernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202410031439.GyTSa0kX-lkp@intel.com/
Closes: https://lore.kernel.org/oe-kbuild-all/202410030852.q0Hukplf-lkp@intel.com/
Signed-off-by: Esben Haabendal <esben@geanix.com>
Link: https://lore.kernel.org/20241003-imx-pinctrl-compile-test-fix-v1-1-145ca1948cc3@geanix.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

pinctrl: thead1520: Fix Null pointer dereference

pinmux_generic_get_function may return NULL, and its retval is
dereferenced without check, which will cause a NULL pointer
dereference.

Signed-off-by: clingfei <clf700383@gmail.com>
Reviewed-by: Drew Fustini <dfustini@tenstorrent.com>
Link: https://lore.kernel.org/20241003023307.2138695-1-clf700383@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

pinctrl: imx1: Fix too generic defines

The "PC" define is colliding with the (apparently broadcased)
define for "program counter" on Loongarch, so let's rename all
these 2-letter defines so they don't collide with stuff.

Reported-by: kernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202410020940.wGISlWfV-lkp@intel.com/
Fixes: a55222b7a132 ("pinctrl: freescale: enable use with COMPILE_TEST")
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

pinctrl: rockchip: improve error message for incorrect rockchip,pins property

If one improperly writes a rockchip,pins property, the pinctrl driver
basically just states that one in the myriad of pinctrl nodes is
improper but does not tell you which one.

Instead, let's print the full name of the Device Tree node that is
improper as well as provide more context on what the expected content
is.

Note that this should be rather unnecessary if one reads the output of
the dtbs_check as it would be highlighted as an error.

Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/20241002-pinctrl-rockchip-error-modulo-4-v1-1-4addb4e5732a@cherry.de
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

pinctrl: aw9523: use enable for regulator

devm_regulator_get_enable_optional can be used to simplify the logic
here.

Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://lore.kernel.org/20241001212724.309320-2-rosenp@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

pinctrl: samsung: Add exynos8895 SoC pinctrl configuration

Add support for the pin-controller found on the Exynos8895 SoC
used in Samsung Galaxy S8 and S8 Plus phones.

It has a newly applied pinctrl register layer for FSYS0 with a
different bank type offset that consists of the following bit
fields:

CON: 4, DAT: 1, PUD: 2, DRV: 3, CONPDN: 2, PUDPDN: 2

Signed-off-by: Ivaylo Ivanov <ivo.ivanov.ivanov1@gmail.com>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20240920154508.1618410-6-ivo.ivanov.ivanov1@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

dt-bindings: pinctrl: samsung: add exynos8895-wakeup-eint compatible

Add a dedicated compatible for exynos8895.

Signed-off-by: Ivaylo Ivanov <ivo.ivanov.ivanov1@gmail.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20240920154508.1618410-7-ivo.ivanov.ivanov1@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

dt-bindings: pinctrl: samsung: Add compatible for Exynos8895 SoC

Add compatible for Exynos8895 SoC.

Signed-off-by: Ivaylo Ivanov <ivo.ivanov.ivanov1@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20240920154508.1618410-5-ivo.ivanov.ivanov1@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

pinctrl: sx150x: Use maple tree register cache

The sx150x driver uses a rbtree register cache with no obvious reason for
specifically preferring it. The maple tree register cache is based on a
more modern data structure and makes implementation decisions more suitable
for modern systems so let's switch the driver to use that. No functional
change.

Signed-off-by: Mark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/20240924-pinctl-sx150x-maple-v1-1-17dcfefefd17@kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

pinctrl: aw9523: Drop explicit initialization of struct i2c_device_id::driver_data to 0

These drivers don't use the driver_data member of struct i2c_device_id,
so don't explicitly initialize this member.

This prepares putting driver_data in an anonymous union which requires
either no initialization or named designators. But it's also a nice
cleanup on its own.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com>
Link: https://lore.kernel.org/20240920153430.503212-13-u.kleine-koenig@baylibre.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

pinctrl: qcom: add the tlmm driver for QCS615 platform

Add support for QCS615 TLMM configuration and control via the
pinctrl framework.

Signed-off-by: Lijuan Gao <quic_lijuang@quicinc.com>
Link: https://lore.kernel.org/20240920-add_qcs615_pinctrl_driver-v2-2-e03c42a9d055@quicinc.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

dt-bindings: pinctrl: document the QCS615 Top Level Mode Multiplexer

Document the Top Level Mode Multiplexer on the QCS615 Platform.
It concisely explains the pin multiplexing and configuration in
the device tree, and includes simple examples of typical device
tree snippets, making it easier for designers to configure and
manage chip pins.

Signed-off-by: Lijuan Gao <quic_lijuang@quicinc.com>
Link: https://lore.kernel.org/20240920-add_qcs615_pinctrl_driver-v2-1-e03c42a9d055@quicinc.com
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

dt-bindings: pinctrl: amlogic,meson-pinctrl: lower gpio-line-names minItems for meson8b

The Amlogic Meson8b SoC has 83 CBUS GPIOs, thus lower the minItems
for gpio-line-names to account for it, fixing DTBs check on Meson8b
based boards.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/20240911-topic-amlogic-arm32-upstream-bindings-fixes-meson-pinctrl-gpio-line-names-v1-1-4345ba336ea4@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

pinctrl: canaan: Add support for k230 SoC

Configuration of the K230 is similar to that of the K210. However, in
K210, the 256 functions for each pin are shared, whereas in K230,
multiplex functions are different for every pin.

`drv_data` of `pinctrl_pin_desc` is pointing to currently activated
group, which is used to print the name of current function of pin in
`pin_dbg_show` and will be updated in `set_mux`, so they are not set
const.

Signed-off-by: Ze Huang <18771902331@163.com>
Link: https://lore.kernel.org/20240926-k230-pinctrl-v2-2-a9a36fba4b34@163.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

dt-bindings: pinctrl: Add support for canaan,k230 SoC

Add device tree binding details for Canaan K230 pinctrl device.

Signed-off-by: Ze Huang <18771902331@163.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/20240926-k230-pinctrl-v2-1-a9a36fba4b34@163.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

pinctrl: qcom: Introduce IPQ5424 TLMM driver

The IPQ5424 SoC comes with a TLMM block, like all other Qualcomm
platforms, so add a driver for it.

Co-developed-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Signed-off-by: Sricharan Ramabadhran <quic_srichara@quicinc.com>
Link: https://lore.kernel.org/20240927065244.3024604-6-quic_srichara@quicinc.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

dt-bindings: pinctrl: qcom: add IPQ5424 pinctrl

Add device tree bindings for IPQ5424 TLMM block.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Sricharan Ramabadhran <quic_srichara@quicinc.com>
Link: https://lore.kernel.org/20240927065244.3024604-4-quic_srichara@quicinc.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

Merge branch 'ib-thead-th1520' into devel

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

pinctrl: Add driver for the T-Head TH1520 SoC

Add pinctrl driver for the T-Head TH1520 RISC-V SoC.

Tested-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>
Signed-off-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
[dfustini: use thead,pad-group to identify the pin controller instance]
Signed-off-by: Drew Fustini <dfustini@tenstorrent.com>
Link: https://lore.kernel.org/20240930-th1520-pinctrl-v3-2-32cea2bdbecb@tenstorrent.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

dt-bindings: pinctrl: Add thead,th1520-pinctrl bindings

Add bindings for the pin controllers on the T-Head TH1520 RISC-V SoC.

Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Tested-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>
Signed-off-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
[dfustini: add thead,pad-group to select the pin controller instance]
Signed-off-by: Drew Fustini <dfustini@tenstorrent.com>
Link: https://lore.kernel.org/20240930-th1520-pinctrl-v3-1-32cea2bdbecb@tenstorrent.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

pinctrl: ocelot: add support for lan969x SoC pinctrl

This adds support for lan969x SoC pinctrl, reusing the existing ocelot
driver. There are 66 General Purpose I/O pins that are individually
configurable to multiple interfaces.

Signed-off-by: Daniel Machon <daniel.machon@microchip.com>
Link: https://lore.kernel.org/20240917-lan969x-pinctrl-v2-2-ea02cbc56831@microchip.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

dt-bindings: ocelot: document lan969x-pinctrl

Lan969x is going to reuse the existing Ocelot pinctrl driver - document
that by adding compatible strings for the different SKU's that we
support.

Signed-off-by: Daniel Machon <daniel.machon@microchip.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/20240917-lan969x-pinctrl-v2-1-ea02cbc56831@microchip.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>