linux-2.6-microblaze.git
3 years agoMerge tag 'tegra-for-5.12-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel...
Arnd Bergmann [Sat, 30 Jan 2021 12:01:52 +0000 (13:01 +0100)]
Merge tag 'tegra-for-5.12-dt-bindings' of git://git./linux/kernel/git/tegra/linux into arm/dt

dt-bindings: tegra: Changes for v5.12-rc1

Exposed a new QSPI clock to DT on Tegra210 and documents the eMMC SKU of
the Jetson Xavier NX board.

* tag 'tegra-for-5.12-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  dt-bindings: arm: tegra: Document Jetson Xavier NX eMMC SKU

Link: https://lore.kernel.org/r/20210129193254.3610492-2-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
3 years agoMerge tag 'tegra-for-5.12-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel...
Arnd Bergmann [Sat, 30 Jan 2021 11:12:13 +0000 (12:12 +0100)]
Merge tag 'tegra-for-5.12-arm64-dt' of git://git./linux/kernel/git/tegra/linux into arm/dt

arm64: tegra: Device tree changes for v5.12-rc1

Fixes an issue with HDA codec detection by properly wiring up the
power-domain for the HDA controller. This also fixes one of the USB-C
ports on Jetson AGX Xavier and enables support for audio on various
Tegra210, Tegra186 and Tegra194 boards. The Jetson Nano and Jetson TX1
also gain QSPI support.

* tag 'tegra-for-5.12-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  arm64: tegra: Audio graph sound card for Jetson AGX Xavier
  arm64: tegra: Audio graph sound card for Jetson TX2
  Revert "arm64: tegra: Disable the ACONNECT for Jetson TX2"
  arm64: tegra: Add RT5658 device entry
  arm64: tegra: Add support for Jetson Xavier NX with eMMC
  arm64: tegra: Prepare for supporting the Jetson Xavier NX with eMMC
  arm64: tegra: Enable QSPI on Jetson Xavier NX
  arm64: tegra: Add QSPI nodes on Tegra194
  arm64: tegra: Enable QSPI on Jetson Nano
  arm64: tegra: Audio graph sound card for Jetson Nano and TX1
  arm64: tegra: Audio graph header for Tegra210
  arm64: tegra: Order nodes alphabetically on Tegra210
  arm64: tegra: Enable Jetson-Xavier J512 USB host
  arm64: tegra: Add XUSB pad controller's "nvidia,pmc" property on Tegra210
  arm64: tegra: Add power-domain for Tegra210 HDA
  dt-bindings: clock: tegra: Add clock ID TEGRA210_CLK_QSPI_PM

Link: https://lore.kernel.org/r/20210129193254.3610492-5-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
3 years agoMerge tag 'tegra-for-5.12-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git...
Arnd Bergmann [Sat, 30 Jan 2021 11:11:37 +0000 (12:11 +0100)]
Merge tag 'tegra-for-5.12-arm-dt' of git://git./linux/kernel/git/tegra/linux into arm/dt

ARM: tegra: Device tree changes for v5.12-rc1

Fixes the pinmux configuration for the eMMC on the Ouya to fix issues
with certain bootloaders.

* tag 'tegra-for-5.12-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  ARM: tegra: ouya: Fix eMMC on specific bootloaders

Link: https://lore.kernel.org/r/20210129193254.3610492-3-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
3 years agoarm64: tegra: Audio graph sound card for Jetson AGX Xavier
Sameer Pujar [Fri, 29 Jan 2021 11:41:10 +0000 (17:11 +0530)]
arm64: tegra: Audio graph sound card for Jetson AGX Xavier

Enable support for audio-graph based sound card on Jetson AGX Xavier.
Following I/O interfaces are enabled.
  * I2S1, I2S2, I2S4 and I2S6
  * DMIC3

Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
3 years agoarm64: tegra: Audio graph sound card for Jetson TX2
Sameer Pujar [Fri, 29 Jan 2021 11:41:09 +0000 (17:11 +0530)]
arm64: tegra: Audio graph sound card for Jetson TX2

Enable support for audio-graph based sound card on Jetson TX2. Based
on the board design following I/O modules are enabled.
  * All I2S instances (I2S1 ... I2S6)
  * All DSPK instances (DSPK1, DSPK2)
  * DMIC1, DMIC2 and DMIC3

Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
3 years agoRevert "arm64: tegra: Disable the ACONNECT for Jetson TX2"
Sameer Pujar [Fri, 29 Jan 2021 11:41:08 +0000 (17:11 +0530)]
Revert "arm64: tegra: Disable the ACONNECT for Jetson TX2"

This reverts commit fb319496935b ("arm64: tegra: Disable the
ACONNECT for Jetson TX2").

Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
3 years agoarm64: tegra: Add RT5658 device entry
Sameer Pujar [Fri, 29 Jan 2021 11:41:07 +0000 (17:11 +0530)]
arm64: tegra: Add RT5658 device entry

Jetson AGX Xavier has an on-board audio codec whicn is connected to
Tegra I2S1 interface. Hence add corresponding device node for the
audio codec.

Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
3 years agoARM: tegra: ouya: Fix eMMC on specific bootloaders
Peter Geis [Thu, 7 Jan 2021 16:56:59 +0000 (16:56 +0000)]
ARM: tegra: ouya: Fix eMMC on specific bootloaders

Ouya fails to detect the eMMC module when booted via certain bootloaders.
Fastboot and hard-kexec bootloaders fail while u-boot does not. It was
discovered that the issue manifests if the sdmmc4 alternate configuration
clock pin is input disabled.

Ouya uses sdmmc4 in the primary pin configuration. It is unknown why this
occurs, though it is likely related to other eMMC limitations experienced
on Ouya.

For now, fix it by enabling input on cam_mclk_pcc0.

Fixes: d7195ac5c9c5 ("ARM: tegra: Add device-tree for Ouya")
Reported-by: Matt Merhar <mattmerhar@protonmail.com>
Tested-by: Matt Merhar <mattmerhar@protonmail.com>
Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
3 years agodt-bindings: arm: tegra: Document Jetson Xavier NX eMMC SKU
Thierry Reding [Thu, 28 Jan 2021 18:29:40 +0000 (19:29 +0100)]
dt-bindings: arm: tegra: Document Jetson Xavier NX eMMC SKU

Two different SKUs exist for the Jetson Xavier NX module, so document
the compatible strings for both, as well as the developer kits that come
with each of the SKUs.

Signed-off-by: Thierry Reding <treding@nvidia.com>
3 years agoMerge tag 'omap-for-v5.12/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel...
Arnd Bergmann [Fri, 29 Jan 2021 15:31:24 +0000 (16:31 +0100)]
Merge tag 'omap-for-v5.12/dt-signed' of git://git./linux/kernel/git/tmlind/linux-omap into arm/dt

Devicetree changes for omaps for v5.12 merge window

This includes the following earlier patches that were considered too
late for v5.11 as discussed between Arnd and me on freenode #armlinux
in December:

- More updates to use cpsw switchdev driver

- Enable gta04 PMIC power management

- Updates for dra7 for ECC support, 1.8GHz speed and keep the
  ldo0 regulator always on as specified in the data manual

And then we have the new devicetree changes:

- Configure the original Amazon Echo to for audio

- Configure missing thermal interrupt for omap4430

- Configure mapphone devices for passive thermal cooling, and add
  1.2GHz mode.

- Correct omap4430 sgx clock rate to use the runtime Android kernel
  value, the earlier value was for a lower power operating point

- Drop turbo mode for 1GHz omap3 variants as we now have passive
  cooling configured

- Update email address for Javier

- Add new MYIR Tech Limited board support

* tag 'omap-for-v5.12/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: dts: am335x-myirtech-*: Add DT for AM335X MYIR Tech Limited board
  ARM: dts: omap3-igep: Change email address in copyright notice
  ARM: dts: omap36xx: Remove turbo mode for 1GHz variants
  ARM: dts: omap443x: Correct sgx clock to 307.2MHz as used on motorola vendor kernel
  ARM: dts: motorola-mapphone: Add 1.2GHz OPP
  ARM: dts: motorola-mapphone: Configure lower temperature passive cooling
  ARM: dts: Configure missing thermal interrupt for 4430
  ARM: dts: omap3-echo: Add speaker sound card support
  ARM: dts: dra71-evm: mark ldo0 regulator as always on
  ARM: dts: dra76x: add support for OPP_PLUS
  ARM: dts: am574x-idk: add support for EMIF1 ECC
  ARM: dts: omap3-gta04: fix twl4030-power settings
  ARM: dts: am335x-evm/evmsk/icev2: switch to new cpsw switch drv
  ARM: dts: am33xx-l4: add dt node for new cpsw switchdev driver

Link: https://lore.kernel.org/r/pull-1611845066-809577@atomide.com-2
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
3 years agoMerge tag 'stm32-dt-for-v5.12-1' of git://git.kernel.org/pub/scm/linux/kernel/git...
Arnd Bergmann [Fri, 29 Jan 2021 15:29:19 +0000 (16:29 +0100)]
Merge tag 'stm32-dt-for-v5.12-1' of git://git./linux/kernel/git/atorgue/stm32 into arm/dt

STM32 DT updates for v5.12, round 1

Highlights:
----------

MCU part:
 -Rename mmc nodes to match with yaml validation.

MPU part:
 -Rename mmc nodes to match with yaml validation.
 -Move vdda1v1 & vdda1v8 (used by usbphyc) from boards files
  to SoC dtsi file.

 -LXA:
  -Fix leds schema for yaml validation.

 -DH:
  -Enable SDMMC1 internal pull-ups and disable CKIN feedabck clock
   on DHCOM.
  -Add SDMMC1 init state inorder to use some gpios during probing phase.
  -Disable KS8851 and FMC on PicoITX board.

* tag 'stm32-dt-for-v5.12-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32:
  ARM: dts: stm32: add #clock-cells property to usbphyc node on stm32mp151
  ARM: dts: stm32: remove usbphyc ports vdda1v1 & vdda1v8 on stm32mp15 boards
  ARM: dts: stm32: add usbphyc vdda1v1 and vdda1v8 supplies on stm32mp151
  ARM: dts: stm32: Add STM32MP1 I2C6 SDA/SCL pinmux
  ARM: dts: stm32: Rename mmc controller nodes to mmc@
  ARM: dts: stm32: Enable voltage translator auto-detection on DHCOM
  ARM: dts: stm32: Add additional init state for SDMMC1 pins
  ARM: dts: stm32: Disable KS8851 and FMC on PicoITX board
  ARM: dts: stm32: Fix schema warnings for pwm-leds on lxa-mc1
  ARM: dts: stm32: Disable SDMMC1 CKIN feedback clock on DHCOM
  ARM: dts: stm32: Enable internal pull-ups for SDMMC1 on DHCOM SoM
  ARM: dts: stm32: Fix GPIO hog flags on DHCOM DRC02
  ARM: dts: stm32: Fix GPIO hog flags on DHCOM PicoITX
  ARM: dts: stm32: Fix GPIO hog names on DHCOM
  ARM: dts: stm32: Disable optional TSC2004 on DRC02 board
  ARM: dts: stm32: Disable WP on DHCOM uSD slot
  ARM: dts: stm32: Connect card-detect signal on DHCOM
  ARM: dts: stm32: Fix polarity of the DH DRC02 uSD card detect

Link: https://lore.kernel.org/r/5e8897a0-8f68-5e41-bfa0-ccdf1e23a3c1@foss.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
3 years agoMerge tag 'renesas-arm-dt-for-v5.12-tag2' of git://git.kernel.org/pub/scm/linux/kerne...
Arnd Bergmann [Fri, 29 Jan 2021 13:02:49 +0000 (14:02 +0100)]
Merge tag 'renesas-arm-dt-for-v5.12-tag2' of git://git./linux/kernel/git/geert/renesas-devel into arm/dt

Renesas ARM DT updates for v5.12 (take two)

  - Increase support (SPI, I2C, Ethernet, Serial, MMC) for the R-Car V3U
    SoC on the Renesas Falcon board,
  - Disable SD functions for plain eMMC,
  - A minor fix.

* tag 'renesas-arm-dt-for-v5.12-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  arm64: dts: renesas: beacon: Fix EEPROM compatible value
  arm64: dts: renesas: falcon: Enable MMC
  arm64: dts: renesas: r8a779a0: Add MMC node
  arm64: dts: renesas: r8a779a0: Add HSCIF support
  arm64: dts: renesas: falcon: Complete SCIF0 nodes
  arm64: dts: renesas: r8a779a0: Add & update SCIF nodes
  arm64: dts: renesas: falcon: Add Ethernet-AVB0 support
  arm64: dts: renesas: r8a779a0: Add Ethernet-AVB support
  arm64: dts: renesas: falcon: Add I2C0,1,6 support
  arm64: dts: renesas: r8a779a0: Add I2C nodes
  arm64: dts: renesas: Disable SD functions for plain eMMC
  arm64: dts: renesas: r8a779a0: Add MSIOF device nodes

Link: https://lore.kernel.org/r/20210129090815.2552425-2-geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
3 years agoMerge tag 'hisi-arm64-dt-for-5.12v2' of git://github.com/hisilicon/linux-hisi into...
Arnd Bergmann [Fri, 29 Jan 2021 12:57:06 +0000 (13:57 +0100)]
Merge tag 'hisi-arm64-dt-for-5.12v2' of git://github.com/hisilicon/linux-hisi into arm/dt

ARM64: DT: Hisilicon ARM64 DT updates for 5.12

- Further cleanups of the hisilicon DTS to align with the dtschema
- Add or update the I2C, pinctrl and reset nodes for Hikey970

* tag 'hisi-arm64-dt-for-5.12v2' of git://github.com/hisilicon/linux-hisi:
  arm64: dts: hisilicon: hi3670.dtsi: add I2C settings
  arm64: dts: hisilicon: hikey970-pinctrl.dtsi: add missing pinctrl settings
  arm64: dts: hisilicon: hi3670.dtsi: add iomcu_rst
  arm64: dts: hisilicon: delete unused property smmu-cb-memtype
  arm64: dts: hisilicon: avoid irrelevant nodes being mistakenly identified as PHY nodes
  arm64: dts: hisilicon: normalize the node name of the localbus
  arm64: dts: hisilicon: normalize the node name of the module thermal
  arm64: dts: hisilicon: place clock-names "bus" before "core"
  arm64: dts: hisilicon: separate each group of data in the property "ranges"

Link: https://lore.kernel.org/r/6013D1C7.90902@hisilicon.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
3 years agoarm64: dts: hisilicon: hi3670.dtsi: add I2C settings
Mauro Carvalho Chehab [Fri, 15 Jan 2021 11:53:58 +0000 (12:53 +0100)]
arm64: dts: hisilicon: hi3670.dtsi: add I2C settings

The I2C buses are not declared at the device tree. As this will
be needed by further patches, add them, keeping all in
disabled state. Per-board settings can override it.

Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
3 years agoarm64: dts: hisilicon: hikey970-pinctrl.dtsi: add missing pinctrl settings
Mauro Carvalho Chehab [Fri, 15 Jan 2021 11:53:57 +0000 (12:53 +0100)]
arm64: dts: hisilicon: hikey970-pinctrl.dtsi: add missing pinctrl settings

There are several pinctrl settings that are missing at this
DT file.

Also, the entries are out of order.

Add the missing bits, as they'll be required by the DRM driver - and
probably by other drivers not upstreamed yet.

Reorder the entres, adding the missing bits.

Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
3 years agoarm64: dts: hisilicon: hi3670.dtsi: add iomcu_rst
Mauro Carvalho Chehab [Fri, 15 Jan 2021 11:53:56 +0000 (12:53 +0100)]
arm64: dts: hisilicon: hi3670.dtsi: add iomcu_rst

This is required in order to support USB.

Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
3 years agoarm64: dts: hisilicon: delete unused property smmu-cb-memtype
Zhen Lei [Mon, 18 Jan 2021 03:16:34 +0000 (11:16 +0800)]
arm64: dts: hisilicon: delete unused property smmu-cb-memtype

The "smmu-cb-memtype" is a private property developed by the Hisilicon
driver in the early stage and is not used now. So delete it.

Otherwise, below YAML check warnings are reported:
arch/arm64/boot/dts/hisilicon/hip06-d03.dt.yaml: iommu@a0040000: \
'smmu-cb-memtype' does not match any of the regexes: 'pinctrl-[0-9]+'
arch/arm64/boot/dts/hisilicon/hip07-d05.dt.yaml: iommu@a0040000: \
'smmu-cb-memtype' does not match any of the regexes: 'pinctrl-[0-9]+'

Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
3 years agoarm64: dts: hisilicon: avoid irrelevant nodes being mistakenly identified as PHY...
Zhen Lei [Mon, 18 Jan 2021 03:16:33 +0000 (11:16 +0800)]
arm64: dts: hisilicon: avoid irrelevant nodes being mistakenly identified as PHY nodes

Currently, the names of several nodes incorrectly match common PHY
provider schema. And the phy-provider.yaml requires them must have
property "#phy-cells". As a result, false positives similar to the
following are reported:
usb2-phy@120: '#phy-cells' is a required property

Change their names slightly so that they do not match pattern:
"^(|usb-|usb2-|usb3-|pci-|pcie-|sata-)phy(@[0-9a-f,]+)*$".

Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
3 years agoarm64: dts: hisilicon: normalize the node name of the localbus
Zhen Lei [Mon, 18 Jan 2021 03:16:32 +0000 (11:16 +0800)]
arm64: dts: hisilicon: normalize the node name of the localbus

Change the node name of the localbus to match
'^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'. This error
is detected by simple-bus.yaml.

Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
3 years agoarm64: dts: hisilicon: normalize the node name of the module thermal
Zhen Lei [Mon, 18 Jan 2021 03:16:31 +0000 (11:16 +0800)]
arm64: dts: hisilicon: normalize the node name of the module thermal

1. Change the node name of the thermal zone to match
'^[a-zA-Z][a-zA-Z0-9\\-]{1,12}-thermal$', add suffix "-thermal".
2. Change the node name of the trip point to match
'^[a-zA-Z][a-zA-Z0-9\\-_]{0,63}$', delete character "@".

Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
3 years agoarm64: dts: hisilicon: place clock-names "bus" before "core"
Zhen Lei [Mon, 18 Jan 2021 03:16:30 +0000 (11:16 +0800)]
arm64: dts: hisilicon: place clock-names "bus" before "core"

Look at the clock-names schema defined in arm,mali-utgard.yaml:
clock-names:
  items:
    - const: bus
    - const: core

The "bus" needs to be placed before the "core".

Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
3 years agoarm64: dts: hisilicon: separate each group of data in the property "ranges"
Zhen Lei [Mon, 18 Jan 2021 03:16:29 +0000 (11:16 +0800)]
arm64: dts: hisilicon: separate each group of data in the property "ranges"

Do not write the "ranges" of multiple groups of data into a uint32 array,
use <> to separate them. Otherwise, the errors similar to the following
will be reported:

soc: pcie@a0090000:ranges: [[33554432, 0, 2986344448, 0, 2986344448, 0, \
10059776016777216, 0, 0, 0, 3086942208, 0, 65536]] is not valid under \
any of the given schemas (Possible causes of the failure):
soc: pcie@a0090000:ranges: [[33554432, 0, 2986344448, 0, 2986344448, 0, \
10059776016777216, 0, 0, 0, 3086942208, 0, 65536]] is not of type 'boolean'
soc: pcie@a0090000:ranges:0: [33554432, 0, 2986344448, 0, 2986344448, 0, \
10059776016777216, 0, 0, 0, 3086942208, 0, 65536] is too long

Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
3 years agoARM: dts: stm32: add #clock-cells property to usbphyc node on stm32mp151
Amelie Delaunay [Thu, 14 Jan 2021 13:15:24 +0000 (14:15 +0100)]
ARM: dts: stm32: add #clock-cells property to usbphyc node on stm32mp151

usbphyc is a 48Mhz clock provider: the clock can be used as clock source
for USB OTG. Add #clock-cells property to usbphyc node to reflect this
capability.

Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
3 years agoARM: dts: stm32: remove usbphyc ports vdda1v1 & vdda1v8 on stm32mp15 boards
Amelie Delaunay [Thu, 14 Jan 2021 13:15:23 +0000 (14:15 +0100)]
ARM: dts: stm32: remove usbphyc ports vdda1v1 & vdda1v8 on stm32mp15 boards

vdda1v1 and vdda1v8 supplies are required by USB PLL, not by the PHYs.
Remove them from usbphyc child phy nodes now that they are managed in
usbphyc parent node at SoC level.

Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
Tested-by: Marek Vasut <marex@denx.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
3 years agoARM: dts: stm32: add usbphyc vdda1v1 and vdda1v8 supplies on stm32mp151
Amelie Delaunay [Thu, 14 Jan 2021 13:15:22 +0000 (14:15 +0100)]
ARM: dts: stm32: add usbphyc vdda1v1 and vdda1v8 supplies on stm32mp151

vdda1v1 and vdda1v8 supplies are required by USB PLL. Add them in usbphyc
node.

Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
3 years agoARM: dts: stm32: Add STM32MP1 I2C6 SDA/SCL pinmux
Jagan Teki [Wed, 23 Dec 2020 11:07:57 +0000 (16:37 +0530)]
ARM: dts: stm32: Add STM32MP1 I2C6 SDA/SCL pinmux

Add SDA/SCL pinmux lines for I2C6 on STM32MP1.

This support adds both in default and sleep states.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
3 years agoarm64: dts: renesas: beacon: Fix EEPROM compatible value
Geert Uytterhoeven [Thu, 28 Jan 2021 11:01:36 +0000 (12:01 +0100)]
arm64: dts: renesas: beacon: Fix EEPROM compatible value

"make dtbs_check" fails with:

    arch/arm64/boot/dts/renesas/r8a774b1-beacon-rzg2n-kit.dt.yaml: eeprom@50: compatible: 'oneOf' conditional failed, one must be fixed:
    'microchip,at24c64' does not match '^(atmel|catalyst|microchip|nxp|ramtron|renesas|rohm|st),(24(c|cs|lc|mac)[0-9]+|spd)$'

Fix this by dropping the bogus "at" prefix.

Fixes: a1d8a344f1ca0709 ("arm64: dts: renesas: Introduce r8a774a1-beacon-rzg2m-kit")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20210128110136.2293490-1-geert+renesas@glider.be
3 years agoarm64: tegra: Add support for Jetson Xavier NX with eMMC
Jon Hunter [Thu, 28 Jan 2021 12:08:51 +0000 (12:08 +0000)]
arm64: tegra: Add support for Jetson Xavier NX with eMMC

Add support for the variant of the Jetson Xavier NX Developer Kit that
has a system-on-module which includes an eMMC.

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
3 years agoarm64: tegra: Prepare for supporting the Jetson Xavier NX with eMMC
Jon Hunter [Thu, 28 Jan 2021 12:08:50 +0000 (12:08 +0000)]
arm64: tegra: Prepare for supporting the Jetson Xavier NX with eMMC

There are two versions of the Jetson Xavier NX system-on-module; one
with a micro SD-card slot and one with an eMMC. Currently, only the
system-on-module with the micro SD-card slot is supported. Before adding
support for the eMMC variant, move the common device-tree parts of the
existing Jetson Xavier NX system-on-module board (p3668-0000) and
reference carrier board (p3509-0000) into include files that can be used
by both Jetson Xavier NX variants.

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
3 years agoarm64: tegra: Enable QSPI on Jetson Xavier NX
Sowjanya Komatineni [Mon, 21 Dec 2020 21:17:39 +0000 (13:17 -0800)]
arm64: tegra: Enable QSPI on Jetson Xavier NX

This patch enables QSPI on Jetson Xavier NX.

Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
3 years agoarm64: tegra: Add QSPI nodes on Tegra194
Sowjanya Komatineni [Mon, 21 Dec 2020 21:17:38 +0000 (13:17 -0800)]
arm64: tegra: Add QSPI nodes on Tegra194

Tegra194 has 2 QSPI controllers.

This patch adds DT node for these 2 QSPI controllers.

Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
3 years agoarm64: tegra: Enable QSPI on Jetson Nano
Sowjanya Komatineni [Mon, 21 Dec 2020 21:17:37 +0000 (13:17 -0800)]
arm64: tegra: Enable QSPI on Jetson Nano

This patch enables QSPI on Jetson Nano.

Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
3 years agoarm64: tegra: Audio graph sound card for Jetson Nano and TX1
Sameer Pujar [Tue, 19 Jan 2021 09:28:16 +0000 (14:58 +0530)]
arm64: tegra: Audio graph sound card for Jetson Nano and TX1

Enable support for audio-graph based sound card on Jetson-Nano and
Jetson-TX1. Depending on the platform, required I/O interfaces are
enabled.

 * Jetson-Nano: Enable I2S3, I2S4, DMIC1 and DMIC2.
 * Jetson-TX1: Enable all I2S and DMIC interfaces.

Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
3 years agoarm64: tegra: Audio graph header for Tegra210
Sameer Pujar [Tue, 19 Jan 2021 09:28:15 +0000 (14:58 +0530)]
arm64: tegra: Audio graph header for Tegra210

Expose a header which describes DT bindings required to use audio-graph
based sound card. All Tegra210 based platforms can include this header
and add platform specific information. Currently, from SoC point of view,
all links are exposed for ADMAIF, AHUB, I2S and DMIC components.

Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
3 years agoarm64: tegra: Order nodes alphabetically on Tegra210
Thierry Reding [Mon, 25 Jan 2021 15:32:56 +0000 (16:32 +0100)]
arm64: tegra: Order nodes alphabetically on Tegra210

Device tree nodes are ordered by unit-address and alphabetically by name
if a node doesn't have a unit-address. The thermal sensor and timer
nodes were not sorted in the correct order, so do that now.

Signed-off-by: Thierry Reding <treding@nvidia.com>
3 years agoarm64: tegra: Enable Jetson-Xavier J512 USB host
JC Kuo [Tue, 19 Jan 2021 02:23:49 +0000 (10:23 +0800)]
arm64: tegra: Enable Jetson-Xavier J512 USB host

This commit enables USB host mode at J512 type-C port of Jetson-Xavier.

Signed-off-by: JC Kuo <jckuo@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Tested-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
3 years agoarm64: tegra: Add XUSB pad controller's "nvidia,pmc" property on Tegra210
JC Kuo [Wed, 20 Jan 2021 07:34:08 +0000 (15:34 +0800)]
arm64: tegra: Add XUSB pad controller's "nvidia,pmc" property on Tegra210

PMC driver provides USB sleepwalk registers access to XUSB PADCTL
driver. This commit adds a "nvidia,pmc" property which points to
PMC node to XUSB PADCTL device node.

Signed-off-by: JC Kuo <jckuo@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
3 years agoarm64: tegra: Add power-domain for Tegra210 HDA
Sameer Pujar [Thu, 7 Jan 2021 05:06:10 +0000 (10:36 +0530)]
arm64: tegra: Add power-domain for Tegra210 HDA

HDA initialization is failing occasionally on Tegra210 and following
print is observed in the boot log. Because of this probe() fails and
no sound card is registered.

  [16.800802] tegra-hda 70030000.hda: no codecs found!

Codecs request a state change and enumeration by the controller. In
failure cases this does not seem to happen as STATETS register reads 0.

The problem seems to be related to the HDA codec dependency on SOR
power domain. If it is gated during HDA probe then the failure is
observed. Building Tegra HDA driver into kernel image avoids this
failure but does not completely address the dependency part. Fix this
problem by adding 'power-domains' DT property for Tegra210 HDA. Note
that Tegra186 and Tegra194 HDA do this already.

Fixes: 742af7e7a0a1 ("arm64: tegra: Add Tegra210 support")
Depends-on: 96d1f078ff0 ("arm64: tegra: Add SOR power-domain for Tegra210")
Cc: <stable@vger.kernel.org>
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
3 years agoMerge branch 'for-5.12/dt-bindings' into for-5.12/arm64/dt
Thierry Reding [Tue, 26 Jan 2021 23:11:35 +0000 (00:11 +0100)]
Merge branch 'for-5.12/dt-bindings' into for-5.12/arm64/dt

3 years agodt-bindings: clock: tegra: Add clock ID TEGRA210_CLK_QSPI_PM
Sowjanya Komatineni [Mon, 21 Dec 2020 21:17:31 +0000 (13:17 -0800)]
dt-bindings: clock: tegra: Add clock ID TEGRA210_CLK_QSPI_PM

Tegra210 QSPI clock output has divider DIV2_SEL which will be enabled
when using DDR interface mode.

This patch adds clock ID for this to dt-binding.

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
3 years agoMerge tag 'samsung-dt64-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk...
Arnd Bergmann [Tue, 26 Jan 2021 22:13:06 +0000 (23:13 +0100)]
Merge tag 'samsung-dt64-5.12' of git://git./linux/kernel/git/krzk/linux into arm/dt

Samsung DTS ARM64 changes for v5.12

Correct Samsung PMIC and S3FWRN5 NFC interrupts trigger levels on
TM2/TM2E and Espresso boards.

* tag 'samsung-dt64-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  arm64: dts: exynos: correct S3FWRN5 NFC interrupt trigger level on TM2
  arm64: dts: exynos: correct PMIC interrupt trigger level on Espresso
  arm64: dts: exynos: correct PMIC interrupt trigger level on TM2

Link: https://lore.kernel.org/r/20210125191240.11278-4-krzk@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
3 years agoARM: dts: am335x-myirtech-*: Add DT for AM335X MYIR Tech Limited board
Alexander Shiyan [Mon, 25 Jan 2021 10:50:11 +0000 (13:50 +0300)]
ARM: dts: am335x-myirtech-*: Add DT for AM335X MYIR Tech Limited board

This patch adds basic support for MYIR Tech MYC-AM335X CPU Module:
- Up to 1GHz TI AM335X Series ARM Cortex-A8 Processors
- Up to 512MB DDR3 SDRAM
- Up to 512MB Nand Flash

and MYD-AM335X Development Board:
- MYC-AM335X CPU Module as Controller Board
- Serial ports, 4 x USB Host, OTG, 2 x Gigabit Ethernet, CAN, RS485,
  TF, Audio
- Supports HDMI and LCD Display

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Tony Lindgren <tony@atomide.com>
3 years agoARM: dts: omap3-igep: Change email address in copyright notice
Javier Martinez Canillas [Mon, 18 Jan 2021 08:17:07 +0000 (09:17 +0100)]
ARM: dts: omap3-igep: Change email address in copyright notice

I've switched employer a long time ago and the mentioned email address no
longer exists. Use my personal address to prevent the issue in the future.

Signed-off-by: Javier Martinez Canillas <javierm@redhat.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
3 years agoARM: dts: omap36xx: Remove turbo mode for 1GHz variants
Adam Ford [Sat, 9 Jan 2021 17:01:03 +0000 (11:01 -0600)]
ARM: dts: omap36xx: Remove turbo mode for 1GHz variants

Previously, the 1GHz variants were marked as a turbo,
because that variant has reduced thermal operating range.

Now that the thermal throttling is in place, it should be
safe to remove the turbo-mode from the 1GHz variants, because
the CPU will automatically slow if the thermal limit is reached.

Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
3 years agoARM: dts: omap443x: Correct sgx clock to 307.2MHz as used on motorola vendor kernel
Carl Philipp Klemm [Mon, 4 Jan 2021 19:56:31 +0000 (20:56 +0100)]
ARM: dts: omap443x: Correct sgx clock to 307.2MHz as used on motorola vendor kernel

The Android vendor kernel uses 307.2MHz or a divider ratio of /5 while active
153600000 or /10 is only used when the sgx core is inactive.

Signed-off-by: Carl Philipp Klemm <philipp@uvos.xyz>
Signed-off-by: Tony Lindgren <tony@atomide.com>
3 years agoARM: dts: motorola-mapphone: Add 1.2GHz OPP
Carl Philipp Klemm [Wed, 30 Dec 2020 08:42:32 +0000 (10:42 +0200)]
ARM: dts: motorola-mapphone: Add 1.2GHz OPP

The omap4430 HS HIGH performance devces support 1.2GHz opp, lower speed
variants do not. However for mapphone devices Motorola seems to have
decided that this does not really matter for the SoC variants they have
tested to use, and decided to clock all devices, including the ones with
STANDARD performance chips at 1.2GHz upon release of the 3.0.8 vendor
kernel shiped with Android 4.0. Therefore it seems safe to do the same,
but let's only do it for Motorola devices as the others have not been
tested.

Note that we prevent overheating with the passive cooling device
cpu_alert0 configured in the dts file that starts lowering the speed as
needed.

This also removes the "failed to find current OPP for freq 1200000000"
warning.

Cc: Merlijn Wajer <merlijn@wizzup.org>
Cc: Pavel Machek <pavel@ucw.cz>
Cc: Sebastian Reichel <sre@kernel.org>
Signed-off-by: Carl Philipp Klemm <philipp@uvos.xyz>
[tony@atomide.com: made motorola specific, updated comments]
Signed-off-by: Tony Lindgren <tony@atomide.com>
3 years agoARM: dts: motorola-mapphone: Configure lower temperature passive cooling
Tony Lindgren [Wed, 30 Dec 2020 08:42:31 +0000 (10:42 +0200)]
ARM: dts: motorola-mapphone: Configure lower temperature passive cooling

The current cooling device temperature is too high at 100C as we have a
battery on the device right next to the SoC as pointed out by Carl Philipp
Klemm <philipp@uvos.xyz>. Let's configure the max temperature to 80C.

As we only have a tshut interrupt and no talert interrupt on 4430, we have
a passive cooling device configured for 4430. However, we want the poll
interval to be 10 seconds instead of 1 second for power management. The
value of 10 seconds seems like plenty of time to notice the temperature
increase above the 75C temperatures. Having the bandgap temperature change
seems to take several tens of seconds because of heat dissipation above
75C range as monitored with a full CPU load.

Cc: Carl Philipp Klemm <philipp@uvos.xyz>
Cc: Merlijn Wajer <merlijn@wizzup.org>
Cc: Pavel Machek <pavel@ucw.cz>
Cc: Sebastian Reichel <sre@kernel.org>
Suggested-by: Carl Philipp Klemm <philipp@uvos.xyz>
Signed-off-by: Tony Lindgren <tony@atomide.com>
3 years agoARM: dts: Configure missing thermal interrupt for 4430
Tony Lindgren [Wed, 30 Dec 2020 08:42:30 +0000 (10:42 +0200)]
ARM: dts: Configure missing thermal interrupt for 4430

We have gpio_86 wired internally to the bandgap thermal shutdown
interrupt on 4430 like we have it on 4460 according to the TRM.
This can be found easily by searching for TSHUT.

For some reason the thermal shutdown interrupt was never added
for 4430, let's add it. I believe this is needed for the thermal
shutdown interrupt handler ti_bandgap_tshut_irq_handler() to call
orderly_poweroff().

Fixes: aa9bb4bb8878 ("arm: dts: add omap4430 thermal data")
Cc: Carl Philipp Klemm <philipp@uvos.xyz>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Eduardo Valentin <edubezval@gmail.com>
Cc: Merlijn Wajer <merlijn@wizzup.org>
Cc: Pavel Machek <pavel@ucw.cz>
Cc: Peter Ujfalusi <peter.ujfalusi@gmail.com>
Cc: Sebastian Reichel <sre@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
3 years agoARM: dts: omap3-echo: Add speaker sound card support
André Hentschel [Sun, 27 Dec 2020 17:13:53 +0000 (18:13 +0100)]
ARM: dts: omap3-echo: Add speaker sound card support

This adds audio playback to the first generation Amazon Echo

Signed-off-by: André Hentschel <nerv@dawncrow.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>
3 years agoARM: dts: stm32: Rename mmc controller nodes to mmc@
Marek Vasut [Sun, 24 Jan 2021 17:03:37 +0000 (18:03 +0100)]
ARM: dts: stm32: Rename mmc controller nodes to mmc@

Per mmc-controller.yaml, the node pattern is "^mmc(@.*)?$" ,
so adjust the node.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Ludovic Barre <ludovic.barre@st.com>
Cc: Ulf Hansson <ulf.hansson@linaro.org>
Cc: linux-stm32@st-md-mailman.stormreply.com
Cc: devicetree@vger.kernel.org
Acked-by: Yann Gautier <yann.gautier@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
3 years agoARM: dts: stm32: Enable voltage translator auto-detection on DHCOM
Marek Vasut [Sun, 24 Jan 2021 17:02:58 +0000 (18:02 +0100)]
ARM: dts: stm32: Enable voltage translator auto-detection on DHCOM

The DHCOM SoM uSD slot has an optional voltage level translator, add
DT bindings which permit the MMCI driver to detect the translator
automatically.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Ludovic Barre <ludovic.barre@st.com>
Cc: Ulf Hansson <ulf.hansson@linaro.org>
Cc: linux-stm32@st-md-mailman.stormreply.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
3 years agoARM: dts: stm32: Add additional init state for SDMMC1 pins
Marek Vasut [Sun, 24 Jan 2021 17:02:57 +0000 (18:02 +0100)]
ARM: dts: stm32: Add additional init state for SDMMC1 pins

Add "init" mux option for SDMMC1, where the CMD, CK, CKIN lines are not
configured, so they can be claimed as GPIOs early on in driver probe().
This is used for probing optional voltage level translator.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Ludovic Barre <ludovic.barre@st.com>
Cc: Ulf Hansson <ulf.hansson@linaro.org>
Cc: linux-stm32@st-md-mailman.stormreply.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
3 years agoMerge tag 'visconti-arm-dt-for-v5.11-tag2' of git://git.kernel.org/pub/scm/linux...
Arnd Bergmann [Mon, 25 Jan 2021 10:17:56 +0000 (11:17 +0100)]
Merge tag 'visconti-arm-dt-for-v5.11-tag2' of git://git./linux/kernel/git/iwamatsu/linux-visconti into arm/dt

Visconti device tree updates for 5.11

- Add watchdog support for TMPV7708 SoC
- Add entries for Toshiba Visconti5 watchdog driver

* tag 'visconti-arm-dt-for-v5.11-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/iwamatsu/linux-visconti:
  arm64: dts: visconti: Add watchdog support for TMPV7708 SoC
  MAINTAINERS: Add entries for Toshiba Visconti5 watchdog driver

Link: https://lore.kernel.org/r/20210125003357.yd72y4f5vcdnvhnr@toshiba.co.jp
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
3 years agoarm64: dts: renesas: falcon: Enable MMC
Takeshi Saito [Mon, 25 Jan 2021 07:58:45 +0000 (08:58 +0100)]
arm64: dts: renesas: falcon: Enable MMC

Enable MMC on the Falcon board.

Signed-off-by: Takeshi Saito <takeshi.saito.xv@renesas.com>
Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com>
[wsa: double checked, rebased, slightly improved, moved to falcon-cpu]
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20210125075845.3864-3-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
3 years agoarm64: dts: renesas: r8a779a0: Add MMC node
Takeshi Saito [Mon, 25 Jan 2021 07:58:44 +0000 (08:58 +0100)]
arm64: dts: renesas: r8a779a0: Add MMC node

Add a device node for MMC.

Signed-off-by: Takeshi Saito <takeshi.saito.xv@renesas.com>
Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com>
[wsa: double checked & rebased]
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20210125075845.3864-2-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
3 years agoarm64: dts: renesas: r8a779a0: Add HSCIF support
Linh Phung [Thu, 21 Jan 2021 11:00:07 +0000 (12:00 +0100)]
arm64: dts: renesas: r8a779a0: Add HSCIF support

Define the generic parts of the HSCIF[0-3] device nodes.

Signed-off-by: Linh Phung <linh.phung.jy@renesas.com>
Signed-off-by: Wolfram Sang <wsa@kernel.org>
Link: https://lore.kernel.org/r/20210121110008.15894-4-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
3 years agoarm64: dts: renesas: falcon: Complete SCIF0 nodes
Wolfram Sang [Thu, 21 Jan 2021 11:00:06 +0000 (12:00 +0100)]
arm64: dts: renesas: falcon: Complete SCIF0 nodes

SCIF0 has been enabled by the firmware, so it worked already. Still, add
the proper nodes to make it work in any case.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20210121110008.15894-3-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
3 years agoarm64: dts: renesas: r8a779a0: Add & update SCIF nodes
Wolfram Sang [Thu, 21 Jan 2021 11:00:05 +0000 (12:00 +0100)]
arm64: dts: renesas: r8a779a0: Add & update SCIF nodes

This is the result of multiple patches taken from the BSP, combined,
rebased, and properly sorted. SCIF0 gets DMA properties, other SCIFs are
entirely new.

Signed-off-by: Linh Phung <linh.phung.jy@renesas.com>
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20210121110008.15894-2-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
3 years agoarm64: dts: renesas: falcon: Add Ethernet-AVB0 support
Wolfram Sang [Thu, 21 Jan 2021 10:06:18 +0000 (11:06 +0100)]
arm64: dts: renesas: falcon: Add Ethernet-AVB0 support

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20210121100619.5653-5-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
3 years agoarm64: dts: renesas: r8a779a0: Add Ethernet-AVB support
Tho Vu [Thu, 21 Jan 2021 10:06:17 +0000 (11:06 +0100)]
arm64: dts: renesas: r8a779a0: Add Ethernet-AVB support

Define the generic parts of Ethernet-AVB device nodes. Only AVB0 was
tested because it was the only port with a PHY on current hardware.

Signed-off-by: Tho Vu <tho.vu.wh@renesas.com>
[wsa: double checked, rebased, added "internal-delay" properties]
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20210121100619.5653-4-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
3 years agoarm64: dts: renesas: falcon: Add I2C0,1,6 support
Wolfram Sang [Thu, 21 Jan 2021 09:54:19 +0000 (10:54 +0100)]
arm64: dts: renesas: falcon: Add I2C0,1,6 support

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20210121095420.5023-4-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
3 years agoarm64: dts: renesas: r8a779a0: Add I2C nodes
Koji Matsuoka [Thu, 21 Jan 2021 09:54:18 +0000 (10:54 +0100)]
arm64: dts: renesas: r8a779a0: Add I2C nodes

Add I2C devicetree description to V3U

Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com>
[wsa: rebased and double checked]
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20210121095420.5023-3-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
3 years agoarm64: dts: renesas: Disable SD functions for plain eMMC
Wolfram Sang [Tue, 19 Jan 2021 13:33:22 +0000 (14:33 +0100)]
arm64: dts: renesas: Disable SD functions for plain eMMC

Some SDHI instances are solely used for eMMC. Disable SD and SDIO
for faster initialization.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Acked-by: Adam Ford <aford173@gmail.com> (beacon)
Link: https://lore.kernel.org/r/20210119133322.87289-1-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
3 years agoarm64: dts: visconti: Add watchdog support for TMPV7708 SoC
Nobuhiro Iwamatsu [Tue, 1 Dec 2020 09:39:07 +0000 (18:39 +0900)]
arm64: dts: visconti: Add watchdog support for TMPV7708 SoC

Add watchdog node in TMPV7708's dtsi, and tmpv7708-rm-mbrc boards's
dts.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
3 years agoMAINTAINERS: Add entries for Toshiba Visconti5 watchdog driver
Nobuhiro Iwamatsu [Tue, 1 Dec 2020 09:34:24 +0000 (18:34 +0900)]
MAINTAINERS: Add entries for Toshiba Visconti5 watchdog driver

Add entries for Toshiba Visconti5 watchdog driver and binding.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
3 years agoARM: dts: nomadik: Fix up MMC node names
Linus Walleij [Fri, 22 Jan 2021 22:20:38 +0000 (23:20 +0100)]
ARM: dts: nomadik: Fix up MMC node names

Fix the node names for the MMC/SD card controller to conform
to the standard node name mmc@..

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20210122222038.2888747-1-linus.walleij@linaro.org'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
3 years agoMerge tag 'ux500-dts-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw...
Arnd Bergmann [Fri, 22 Jan 2021 22:37:20 +0000 (23:37 +0100)]
Merge tag 'ux500-dts-v5.12' of git://git./linux/kernel/git/linusw/linux-nomadik into arm/dt

Ux500 DTS updates for the v5.12 kernel cycle:

- A new DTS file for the Samsung GT-I9070 (Janice)
- Fix up ADC channel name attributes
- Add charger interrupts
- Add thermistors to the HREF boards
- Remove the non-existing AB8505 HW ADC IRQ
- Push down the VMMCI setting to each board
- Add the die temperature channel to teh AB8505
- Fix up the MMC host names to follow the standard
  naming convention

* tag 'ux500-dts-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik:
  ARM: dts: Fix up MMC host node names
  ARM: dts: ux500: Add die temperature to AB8505
  ARM: dts: ux500: Push VMMCI down to each tree
  ARM: dts: ux500: Remove the GPADC HW IRQ
  ARM: dts: ux500: Add thermistors to the HREF
  ARM: dts: ux500: Add interrupts to charger
  ARM: dts: ux500: Fix channel names attributes
  ARM: dts: ux500: Add a device tree for Janice

Link: https://lore.kernel.org/r/CACRpkdbn=P63V9aEO2wKu2DwvVUcbjwCEV_JvKwWZ0netT75ig@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
3 years agoARM: dts: Fix up MMC host node names
Linus Walleij [Wed, 13 Jan 2021 20:17:45 +0000 (21:17 +0100)]
ARM: dts: Fix up MMC host node names

The standard mandates that these nodes be named
mmc@... not sdi_foo@...

Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
3 years agoARM: mstar: Unify common parts of BreadBee boards into a dtsi
Daniel Palmer [Thu, 24 Dec 2020 02:03:54 +0000 (11:03 +0900)]
ARM: mstar: Unify common parts of BreadBee boards into a dtsi

The BreadBee and the BreadBee Crust are the same PCB with a different
SoC mounted. There are two top level dts to handle this.

To avoid deduplicating the parts that are more related to the PCB than
the SoC (i.e. the voltage regs and LEDs) add a common dtsi that can
be included in both top level dts.

Signed-off-by: Daniel Palmer <daniel@0x0f.com>
Link: https://lore.kernel.org/r/20201224020354.2212037-1-daniel@0x0f.com'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
3 years agoMerge tag 'at91-dt-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux...
Arnd Bergmann [Fri, 22 Jan 2021 15:03:21 +0000 (16:03 +0100)]
Merge tag 'at91-dt-5.12' of git://git./linux/kernel/git/at91/linux into arm/dt

AT91 DT for 5.12:

- removing a property never documented nor used
- adding i2c recovery GPI for one more board

* tag 'at91-dt-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
  ARM: dts: at91: sama5d2: remove atmel,wakeup-type references
  ARM: dts: at91-sama5d27_wlsom1: add i2c recovery

Link: https://lore.kernel.org/r/20210122145056.171283-1-nicolas.ferre@microchip.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
3 years agoMerge tag 'socfpga_dts_update_for_v5.12' of git://git.kernel.org/pub/scm/linux/kernel...
Arnd Bergmann [Fri, 22 Jan 2021 14:02:34 +0000 (15:02 +0100)]
Merge tag 'socfpga_dts_update_for_v5.12' of git://git./linux/kernel/git/dinguyen/linux into arm/dt

SoCFPGA DTS updates for v5.12
- Add DTS file for eASIC N5X platform
- Use generic ngpios in GPIO entries
- Add PMU node for Arria10

* tag 'socfpga_dts_update_for_v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
  ARM: dts: arria10: add PMU node
  arm64: dts: n5x: Add support for Intel's eASIC N5X platform
  arm64: dts: socfpga: Use generic "ngpios" rather than "snps,nr-gpios"

Link: https://lore.kernel.org/r/20210120012334.25730-1-dinguyen@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
3 years agoARM: dts: at91: sama5d2: remove atmel,wakeup-type references
Claudiu Beznea [Tue, 5 Jan 2021 11:18:45 +0000 (13:18 +0200)]
ARM: dts: at91: sama5d2: remove atmel,wakeup-type references

atmel,wakeup-type DT property is not referenced anywhere in the current
and previous version of the code thus remove it.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Nicolas Ferre <nferre@kernel.org>
Link: https://lore.kernel.org/r/1609845525-10766-1-git-send-email-claudiu.beznea@microchip.com
3 years agoARM: dts: at91-sama5d27_wlsom1: add i2c recovery
Nicolas Ferre [Sun, 17 Jan 2021 18:35:58 +0000 (19:35 +0100)]
ARM: dts: at91-sama5d27_wlsom1: add i2c recovery

Add the i2c gpio pinctrls to support the i2c bus recovery on this board.

Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Reviewed-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
Link: https://lore.kernel.org/r/20210117183558.5369-1-nicolas.ferre@microchip.com
3 years agoarm64: dts: renesas: r8a779a0: Add MSIOF device nodes
Koji Matsuoka [Fri, 8 Jan 2021 10:43:45 +0000 (11:43 +0100)]
arm64: dts: renesas: r8a779a0: Add MSIOF device nodes

Add device nodes for the Clock-Synchronized Serial Interface with
FIFO (MSIOF) instances on the Renesas R-Car V3U (r8a779a0) SoC.

Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20210108104345.2026857-1-geert+renesas@glider.be
3 years agoMerge tag 'omap-for-v5.11/dt-late-signed' into omap-for-v5.12-dt
Tony Lindgren [Mon, 18 Jan 2021 08:03:24 +0000 (10:03 +0200)]
Merge tag 'omap-for-v5.11/dt-late-signed' into omap-for-v5.12-dt

Late devicetree changes for omaps for v5.11 merge window

Here are few more late changes that would be nice to get into v5.11:

- More updates to use cpsw switchdev driver

- Enable gta04 PMIC power management

- Updates for dra7 for ECC support, 1.8GHz speed and keep the
  ldo0 regulator always on as specified in the data manual

3 years agodt-bindings: vendor-prefixes: Fix misordering introduced by honestar prefix
Daniel Palmer [Sat, 12 Dec 2020 01:22:53 +0000 (10:22 +0900)]
dt-bindings: vendor-prefixes: Fix misordering introduced by honestar prefix

The prefix for honestar should come before honeywell.

Fixes: 43181b5d8072 ("dt-bindings: vendor-prefixes: Add honestar vendor prefix")
Signed-off-by: Daniel Palmer <daniel@0x0f.com>
Link: https://lore.kernel.org/linux-arm-kernel/CAFr9PXmwOEuHHA-kDeL1YS8bWvovrt43MXxyy1J+hGbXwPUFSA@mail.gmail.com/
Link: https://lore.kernel.org/r/20201212012253.373074-1-daniel@0x0f.com'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
3 years agoMerge tag 'renesas-dt-bindings-for-v5.12-tag1' of git://git.kernel.org/pub/scm/linux...
Arnd Bergmann [Fri, 15 Jan 2021 16:40:50 +0000 (17:40 +0100)]
Merge tag 'renesas-dt-bindings-for-v5.12-tag1' of git://git./linux/kernel/git/geert/renesas-devel into arm/dt

Renesas DT binding updates for v5.12

  - Document suport for the Beacon EmbeddedWorks RZ/G2N and RZ/H kits.

* tag 'renesas-dt-bindings-for-v5.12-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  dt-bindings: arm: renesas: Add Beacon RZ/G2N and RZ/G2H boards

Link: https://lore.kernel.org/r/20210115094610.2334058-3-geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
3 years agoMerge tag 'renesas-arm-dt-for-v5.12-tag1' of git://git.kernel.org/pub/scm/linux/kerne...
Arnd Bergmann [Fri, 15 Jan 2021 15:39:46 +0000 (16:39 +0100)]
Merge tag 'renesas-arm-dt-for-v5.12-tag1' of git://git./linux/kernel/git/geert/renesas-devel into arm/dt

Renesas ARM DT updates for v5.12

  - Timer (CMT/TMU) support for R-Car Gen3 SoCs,
  - Watchdog (RWDT), pincontrol (PFC), GPIO, and DMA (SYS-DMAC) support
    for the R-Car V3U SoC,
  - USB2 clock selector and SPI Multi I/O Bus Controller (RPC-IF)
    support for RZ/G2 SoCs,
  - Support for the Beacon EmbeddedWorks RZ/G2H and RZ/G2N kits,
  - Various fixes and improvements.

* tag 'renesas-arm-dt-for-v5.12-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (24 commits)
  arm64: dts: renesas: r8a779a0: Add SYS-DMAC nodes
  arm64: dts: renesas: r8a779a0: Add GPIO nodes
  arm64: dts: renesas: r8a779a0: Add pinctrl device node
  arm64: dts: renesas: rzg2: Add RPC-IF Support
  arm64: dts: renesas: rzg2: Add usb2_clksel to RZ/G2 M/N/H
  arm64: dts: renesas: r8a774e1: Introduce beacon-rzg2h-kit
  arm64: dts: renesas: r8a774b1: Introduce beacon-rzg2n-kit
  arm64: dts: renesas: beacon-rzg2m-kit: Rearrange SoC unique functions
  arm64: dts: renesas: beacon: Better describe keys
  arm64: dts: renesas: beacon: Configure Audio CODEC clocks
  arm64: dts: renesas: beacon kit: Fix Audio Clock sources
  arm64: dts: renesas: beacon: Configure programmable clocks
  arm64: dts: renesas: falcon: Enable watchdog timer
  arm64: dts: renesas: r8a779a0: Add RWDT node
  arm64: dts: renesas: beacon: Correct I2C bus speeds
  arm64: dts: renesas: beacon: Enable SPI
  arm64: dts: renesas: beacon: Don't make vccq_sdhi0 always on
  arm64: dts: renesas: beacon: Fix RGB Display PWM Backlight
  arm64: dts: renesas: beacon: Fix LVDS PWM Backlight
  arm64: dts: renesas: beacon: Fix audio-1.8V pin enable
  ...

Link: https://lore.kernel.org/r/20210115094610.2334058-2-geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
3 years agoARM: dts: stm32: Disable KS8851 and FMC on PicoITX board
Marek Vasut [Thu, 24 Dec 2020 06:27:26 +0000 (07:27 +0100)]
ARM: dts: stm32: Disable KS8851 and FMC on PicoITX board

The PicoITX has only one ethernet routed out, so the KS8851 is not used
at all. Disable the KS8851 and the entire FMC controller.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
3 years agoARM: dts: stm32: Fix schema warnings for pwm-leds on lxa-mc1
Alexander Dahl [Mon, 28 Dec 2020 16:32:16 +0000 (17:32 +0100)]
ARM: dts: stm32: Fix schema warnings for pwm-leds on lxa-mc1

The node names for devices using the pwm-leds driver follow a certain
naming scheme (now).  Parent node name is not enforced, but recommended
by DT project.

  DTC     arch/arm/boot/dts/stm32mp157c-lxa-mc1.dt.yaml
  CHECK   arch/arm/boot/dts/stm32mp157c-lxa-mc1.dt.yaml
/home/alex/build/linux/arch/arm/boot/dts/stm32mp157c-lxa-mc1.dt.yaml: led-rgb: 'led-blue', 'led-green', 'led-red' do not match any of the regexes: '^led(-[0-9a-f]+)?$', 'pinctrl-[0-9]+'
        From schema: /home/alex/src/linux/leds/Documentation/devicetree/bindings/leds/leds-pwm.yaml

Signed-off-by: Alexander Dahl <post@lespocky.de>
Acked-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
3 years agoARM: dts: stm32: Disable SDMMC1 CKIN feedback clock on DHCOM
Marek Vasut [Thu, 14 Jan 2021 14:52:10 +0000 (15:52 +0100)]
ARM: dts: stm32: Disable SDMMC1 CKIN feedback clock on DHCOM

The STM32MP1 DHCOM SoM can be built with either bus voltage level shifter
or without one on the SDMMC1 interface. Because the SDMMC1 interface is
limited to 50 MHz and hence SD high-speed anyway, disable the SD feedback
clock to permit operation of the same U-Boot image on both SoM with and
without voltage level shifter.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
3 years agoARM: dts: stm32: Enable internal pull-ups for SDMMC1 on DHCOM SoM
Marek Vasut [Tue, 1 Dec 2020 11:14:40 +0000 (12:14 +0100)]
ARM: dts: stm32: Enable internal pull-ups for SDMMC1 on DHCOM SoM

The default state of SD bus and clock line is logical HI. SD card IO is
open-drain and pulls the bus lines LO. Always enable the SD bus pull ups
to guarantee this behavior on DHCOM SoM. Note that on SoMs with SD bus
voltage level shifter, the pull ups are built into the level shifter,
however that has no negative impact.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
3 years agoARM: dts: stm32: Fix GPIO hog flags on DHCOM DRC02
Marek Vasut [Tue, 29 Dec 2020 17:55:21 +0000 (18:55 +0100)]
ARM: dts: stm32: Fix GPIO hog flags on DHCOM DRC02

The GPIO hog flags are ignored by gpiolib-of.c now, set the flags to 0.
Since GPIO_ACTIVE_HIGH is defined as 0, this change only increases the
correctness of the DT.

Fixes: fde180f06d7b ("ARM: dts: stm32: Add DHSOM based DRC02 board")
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
3 years agoARM: dts: stm32: Fix GPIO hog flags on DHCOM PicoITX
Marek Vasut [Tue, 29 Dec 2020 17:55:20 +0000 (18:55 +0100)]
ARM: dts: stm32: Fix GPIO hog flags on DHCOM PicoITX

The GPIO hog flags are ignored by gpiolib-of.c now, set the flags to 0.
Due to a change in gpiolib-of.c, setting flags to GPIO_ACTIVE_LOW and
using output-low DT property leads to the GPIO being set high instead.

Fixes: ac68793f49de ("ARM: dts: stm32: Add DHCOM based PicoITX board")
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
3 years agoARM: dts: stm32: Fix GPIO hog names on DHCOM
Marek Vasut [Thu, 24 Dec 2020 06:24:38 +0000 (07:24 +0100)]
ARM: dts: stm32: Fix GPIO hog names on DHCOM

The GPIO hog node name should match regex '^(hog-[0-9]+|.+-hog(-[0-9]+)?)$',
make it so and fix the following two make dtbs_check warnings:

arch/arm/boot/dts/stm32mp157c-dhcom-picoitx.dt.yaml: hog-usb-port-power: $nodename:0: 'hog-usb-port-power' does not match '^(hog-[0-9]+|.+-hog(-[0-9]+)?)$'
arch/arm/boot/dts/stm32mp153c-dhcom-drc02.dt.yaml: hog-usb-hub: $nodename:0: 'hog-usb-hub' does not match '^(hog-[0-9]+|.+-hog(-[0-9]+)?)$'

Fixes: ac68793f49de ("ARM: dts: stm32: Add DHCOM based PicoITX board")
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
3 years agoARM: dts: stm32: Disable optional TSC2004 on DRC02 board
Marek Vasut [Thu, 7 Jan 2021 15:07:42 +0000 (16:07 +0100)]
ARM: dts: stm32: Disable optional TSC2004 on DRC02 board

The DRC02 has no use for the on-SoM touchscreen controller, and the
on-SoM touchscreen controller may not even be populated, which then
results in error messages in kernel log. Disable the touchscreen
controller in DT.

Fixes: fde180f06d7b ("ARM: dts: stm32: Add DHSOM based DRC02 board")
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
3 years agoARM: dts: stm32: Disable WP on DHCOM uSD slot
Marek Vasut [Tue, 1 Dec 2020 11:13:31 +0000 (12:13 +0100)]
ARM: dts: stm32: Disable WP on DHCOM uSD slot

The uSD slot has no WP detection, disable it.

Fixes: 34e0c7847dcf ("ARM: dts: stm32: Add DH Electronics DHCOM STM32MP1 SoM and PDK2 board")
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
3 years agoARM: dts: stm32: Connect card-detect signal on DHCOM
Marek Vasut [Tue, 1 Dec 2020 11:13:30 +0000 (12:13 +0100)]
ARM: dts: stm32: Connect card-detect signal on DHCOM

The DHCOM SoM uSD slot card detect signal is connected to GPIO PG1,
describe it in the DT.

Fixes: 34e0c7847dcf ("ARM: dts: stm32: Add DH Electronics DHCOM STM32MP1 SoM and PDK2 board")
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
3 years agoARM: dts: stm32: Fix polarity of the DH DRC02 uSD card detect
Marek Vasut [Tue, 1 Dec 2020 11:13:29 +0000 (12:13 +0100)]
ARM: dts: stm32: Fix polarity of the DH DRC02 uSD card detect

The uSD card detect signal on the DH DRC02 is active-high, with
a default pull down resistor on the board. Invert the polarity.

Fixes: fde180f06d7b ("ARM: dts: stm32: Add DHSOM based DRC02 board")
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
--
Note that this could not be tested on prototype SoMs, now that it is
tested, this issue surfaced, so it needs to be fixed.
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
3 years agoarm64: dts: renesas: r8a779a0: Add SYS-DMAC nodes
Geert Uytterhoeven [Thu, 7 Jan 2021 18:20:45 +0000 (19:20 +0100)]
arm64: dts: renesas: r8a779a0: Add SYS-DMAC nodes

Add device nodes for the Direct Memory Access Controller for System
(SYS-DMAC) instances on the Renesas R-Car V3U (r8a779a0) SoC.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20210107182045.1948037-1-geert+renesas@glider.be
3 years agoarm64: dts: renesas: r8a779a0: Add GPIO nodes
Geert Uytterhoeven [Thu, 14 Jan 2021 11:11:17 +0000 (12:11 +0100)]
arm64: dts: renesas: r8a779a0: Add GPIO nodes

Add device nodes for the General Purpose Input/Output (GPIO) block on
the Renesas R-Car V3U (r8a779a0) SoC.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20210114111117.2214281-1-geert+renesas@glider.be
3 years agoarm64: dts: renesas: r8a779a0: Add pinctrl device node
Ulrich Hecht [Tue, 12 Jan 2021 16:59:48 +0000 (17:59 +0100)]
arm64: dts: renesas: r8a779a0: Add pinctrl device node

This patch adds the pinctrl device node for the R8A779A0 (V3U) SoC.

Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu>
Link: https://lore.kernel.org/r/20210112165948.31162-1-uli+renesas@fpond.eu
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
3 years agoARM: dts: ux500: Add die temperature to AB8505
Linus Walleij [Mon, 21 Dec 2020 12:20:26 +0000 (13:20 +0100)]
ARM: dts: ux500: Add die temperature to AB8505

The AB8505 mixed signal ASIC variant has a die temperature
channel that is missing in the AB8500 variant. Add it to
the DTSI.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
3 years agoARM: dts: ux500: Push VMMCI down to each tree
Linus Walleij [Sat, 19 Dec 2020 20:31:55 +0000 (21:31 +0100)]
ARM: dts: ux500: Push VMMCI down to each tree

The setting of VMMCI differs so much between different
boards that we need to handle it on a per-board basis
rather that complicating things by overriding stuff from
the included DTSI:s. Push it down into top-level tree
instead.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
3 years agoARM: dts: ux500: Remove the GPADC HW IRQ
Linus Walleij [Fri, 18 Dec 2020 22:20:50 +0000 (23:20 +0100)]
ARM: dts: ux500: Remove the GPADC HW IRQ

The AB8505 variant lacks the hardware conversion IRQ, so
do not put it in with this variant.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
3 years agoARM: dts: ux500: Add thermistors to the HREF
Linus Walleij [Sat, 12 Dec 2020 10:46:26 +0000 (11:46 +0100)]
ARM: dts: ux500: Add thermistors to the HREF

This adds the two temperature-monitoring thermistors to the
HREF reference design, defines a thermal zone for the
chassis and sets some reasonable thermal limits.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
3 years agoARM: dts: ux500: Add interrupts to charger
Linus Walleij [Thu, 10 Dec 2020 15:17:21 +0000 (16:17 +0100)]
ARM: dts: ux500: Add interrupts to charger

The different charger nodes in the AB8500 and AB8505
includes was missing the interrupt assignments for the
interrupts necessary to drive the AB8500/AB8505 charging
state machine.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
3 years agoARM: dts: ux500: Fix channel names attributes
Linus Walleij [Tue, 8 Dec 2020 21:06:24 +0000 (22:06 +0100)]
ARM: dts: ux500: Fix channel names attributes

The AB8500/AB8505 is providing ADC channels and do so
using the standard property "io-channel-names" not the
mistakenly singular form "io-channel-name".

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
3 years agoARM: dts: ux500: Add a device tree for Janice
Linus Walleij [Sun, 1 Nov 2020 23:22:40 +0000 (00:22 +0100)]
ARM: dts: ux500: Add a device tree for Janice

This adds a basic device tree for the Samsung GT-I9070
mobile phone also known as Janice.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
3 years agoarm64: dts: renesas: rzg2: Add RPC-IF Support
Adam Ford [Sat, 2 Jan 2021 11:54:12 +0000 (05:54 -0600)]
arm64: dts: renesas: rzg2: Add RPC-IF Support

The RZ/G2 series contain the SPI Multi I/O Bus Controller (RPC-IF).
Add the nodes, but make them disabled by default.

Signed-off-by: Adam Ford <aford173@gmail.com>
Link: https://lore.kernel.org/r/20210102115412.3402059-4-aford173@gmail.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>