linux-2.6-microblaze.git
2 months agodrm/amdgpu: add RS64 local memory context array init/fini
Prike Liang [Mon, 29 Jun 2026 06:47:23 +0000 (14:47 +0800)]
drm/amdgpu: add RS64 local memory context array init/fini

Add amdgpu_mes_rs64mem_init() and amdgpu_mes_rs64mem_fini() to
manage the RS64 local memory context arrays used by the MES
scheduler.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Michael Chen <michael.chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amd/display/amdgpu_dm: show error names
Michał Mirosław [Thu, 2 Jul 2026 16:24:39 +0000 (18:24 +0200)]
drm/amd/display/amdgpu_dm: show error names

Convert printk() args that log error numbers to log the names.

Acked-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Michał Mirosław <mirq-linux@rere.qmqm.pl>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amd/display: Promote DC to 3.2.389
Taimur Hassan [Sun, 5 Jul 2026 02:39:33 +0000 (21:39 -0500)]
drm/amd/display: Promote DC to 3.2.389

This DC patchset brings improvements in multiple areas. In summary, we have:

* Fixes on EDID 8K parsing, cursor mode, backlight, OLED/VABC, and HDR to SDR
* Improvements on DCN42 clocking, det allocation, and power gating
* Greatly enhanced KUnit coverage across amdgpu_dm
* Code cleanup

Acked-by: George Zhang <george.zhang@amd.com>
Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Taimur Hassan <Syed.Hassan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amd/display: don't re-evaluate cursor mode on cursor plane movement
James Lin [Tue, 7 Jul 2026 06:04:10 +0000 (14:04 +0800)]
drm/amd/display: don't re-evaluate cursor mode on cursor plane movement

[Why]
The cursor-mode re-evaluation added to dm_crtc_get_cursor_mode() also
checks the cursor plane's own destination rectangle. The crtc_x/y/w/h
check lives in the per-plane loop, which only flags the cursor plane via
cursor_changed and does not skip it, so the check fires whenever the
cursor itself moves.

flip-vs-cursor-legacy (kms_cursor_legacy) issues a stream of legacy
cursor moves and requires each to land on the fast path within a single
vblank. With the position check, every cursor move now sets
consider_mode_change and defeats the early return, forcing the full
cursor-mode evaluation. A legacy cursor move is a cursor-only commit:
the underlying planes are not in the atomic state, so the coverage loop
(for_each_oldnew_plane_in_descending_zpos walks only planes in the
state) sees nothing covering the CRTC, evaluates entire_crtc_covered as
false, and misclassifies the cursor mode as OVERLAY on a fully-covered
screen.

That spurious NATIVE->OVERLAY transition makes should_reset_plane()
return true (lock_and_validation_needed), pulls all CRTC planes into the
commit, and - because amdgpu_dm_plane_atomic_async_check() rejects async
updates in overlay mode - permanently knocks later cursor updates off the
async fast path. Each cursor move becomes a full atomic commit with DC
global validation, serialized against the page flip, so cursor updates no
longer fit in one vblank and flip-vs-cursor-legacy fails / times out

[How]
The cursor mode is a function of the underlying planes' coverage and
properties, not of the cursor's position, so cursor movement can never
change the correct mode. Restrict the destination-rectangle check to
non-cursor planes. A move/resize of an underlying plane (the case the
original change targets, e.g. amd_cursor_overlay@non-full) still
re-evaluates the mode correctly, while pure cursor movement returns to
the fast path.

Reviewed-by: ChiaHsuan (Tom) Chung <chiahsuan.chung@amd.com>
Signed-off-by: James Lin <PingLei.Lin@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amd/display: add DST_Y_DELTA_DRQ_LIMIT hw programming
Charlene Liu [Fri, 3 Jul 2026 17:45:47 +0000 (13:45 -0400)]
drm/amd/display: add DST_Y_DELTA_DRQ_LIMIT hw programming

[why]
dchubp needs to program DST_Y_DELTA_DRQ_LIMIT  based on dml2.x

Reviewed-by: Aric Cyr <aric.cyr@amd.com>
Signed-off-by: Charlene Liu <Charlene.Liu@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amd/display: add DST_Y_DELTA_DRQ_LIMIT reg macro for later use
Charlene Liu [Thu, 25 Jun 2026 19:06:44 +0000 (15:06 -0400)]
drm/amd/display: add DST_Y_DELTA_DRQ_LIMIT reg macro for later use

[why]
DST_Y_DELTA_DRQ_LIMIT from dml2.1

Reviewed-by: Leo Chen <leo.chen@amd.com>
Signed-off-by: Charlene Liu <Charlene.Liu@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amd/display: fix dcn42b det allocation order
Dmytro Laktyushkin [Fri, 3 Jul 2026 17:01:12 +0000 (13:01 -0400)]
drm/amd/display: fix dcn42b det allocation order

set_pipe_unlock_order needs to be set to true for the pipes to be unlocked
in correct order to avoid det overallocation

Reviewed-by: Charlene Liu <charlene.liu@amd.com>
Signed-off-by: Dmytro Laktyushkin <dmytro.laktyushkin@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amd/display: Enable HUBP/DPP Driver PG for DCN42
Leo Chen [Mon, 29 Jun 2026 19:02:40 +0000 (15:02 -0400)]
drm/amd/display: Enable HUBP/DPP Driver PG for DCN42

[Why & How]
The related corruption issue is now resolved, HUBP/DPP driver PG can be enabled for DCN42.

Reviewed-by: Ovidiu (Ovi) Bunea <ovidiu.bunea@amd.com>
Signed-off-by: Leo Chen <leo.chen@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amd/display: fix dcn42 det allocation order
Dmytro Laktyushkin [Fri, 3 Jul 2026 14:08:37 +0000 (10:08 -0400)]
drm/amd/display: fix dcn42 det allocation order

set_pipe_unlock_order needs to be set to true for the pipes to be unlocked
in correct order to avoid det overallocation

Reviewed-by: Taimur Hassan <syed.hassan@amd.com>
Signed-off-by: Dmytro Laktyushkin <dmytro.laktyushkin@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amd/display: Fix DMSS not triggering for HDR to SDR transition
Karthi Kandasamy [Thu, 28 May 2026 10:49:44 +0000 (12:49 +0200)]
drm/amd/display: Fix DMSS not triggering for HDR to SDR transition

Why:
DMSS feature was not getting triggered during HDR to SDR transitions,
and no DPCD write was observed. Root cause analysis revealed that
incorrect panel capabilities were being reported for PSR SU panels.
Due to the wrong capabilities, the OS was not invoking the DMSS API,
resulting in no DPCD communication and also gate eDP teardown across
DMSS hold

How:
Fixed by setting the correct power panel capabilities for PSR SU panels.
This ensures the OS receives accurate panel capability information and
triggers the DMSS API as expected, restoring proper DPCD writes during
HDR to SDR transitions.
The DC commit sequence,was tearing the eDP down anyway -- backlight off, ABM disable,
DPMS off, PSR/Replay feature_enabled cleared, PHY TX off, OTG/OPTC off
all these actions are blocked now with the skip_implict_edp_power_control

Reviewed-by: Aric Cyr <aric.cyr@amd.com>
Signed-off-by: Karthi Kandasamy <karthi.kandasamy@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amd/display: Add stream property tests for connector
Bhawanpreet Lakha [Wed, 24 Jun 2026 18:36:05 +0000 (14:36 -0400)]
drm/amd/display: Add stream property tests for connector

Add KUnit coverage for fill_stream_properties_from_drm_display_mode():
zeroed borders, RGB defaults, sync polarity handling, inheriting from
an old stream, timing from the crtc, requested bpc colour depth,
content type and aspect ratio.

Assisted-by: Copilot:Claude-Opus-4.8
Reviewed-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amd/display: Add CACP caps tests for connector
Bhawanpreet Lakha [Wed, 24 Jun 2026 18:12:05 +0000 (14:12 -0400)]
drm/amd/display: Add CACP caps tests for connector

Add KUnit coverage for amdgpu_dm_update_cacp_caps(): eDP and LVDS
supported, old/3.1.6 IP versions unsupported, non-eDP/LVDS and LCD
panels unsupported.

Assisted-by: Copilot:Claude-Opus-4.8
Reviewed-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amd/display: Add crtc matching and panel type tests for connector
Bhawanpreet Lakha [Wed, 24 Jun 2026 15:47:52 +0000 (11:47 -0400)]
drm/amd/display: Add crtc matching and panel type tests for connector

Add KUnit coverage for amdgpu_dm_find_first_crtc_matching_connector():
match, no match, empty state, skipping NULL connector slots, and
returning the first match when several target the same crtc.

Also add coverage for amdgpu_dm_set_panel_type(): VSDB OLED/miniLED,
DPCD OLED/miniLED, Samsung miniLED above and below threshold, and the
default LCD fallback.

Assisted-by: Copilot:Claude-Opus-4.8
Reviewed-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amd/display: Add MST link detection tests for connector
Bhawanpreet Lakha [Tue, 23 Jun 2026 18:41:26 +0000 (14:41 -0400)]
drm/amd/display: Add MST link detection tests for connector

Add KUnit coverage for amdgpu_dm_detect_mst_link_for_all_connectors()
to the amdgpu_dm_connector tests:

- No connectors registered: iteration body never runs and the call
  succeeds.
- Writeback connector: hit by the early continue
- Non-MST link
- MST branch without aux: NULL mst_mgr.aux

Assisted-by: Copilot:Claude-Opus-4.8
Reviewed-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amd/display: Exit LS for ISHARP before coefficient write
Nicholas Kazlauskas [Tue, 30 Jun 2026 15:07:49 +0000 (11:07 -0400)]
drm/amd/display: Exit LS for ISHARP before coefficient write

[Why]
The hardware programming guide indicates that we must exit LS before
any coefficient writes.

This is true across all ASIC for this block.

[How]
Drop the ips_v2 checks and unconditionall perform the update.
It is not based on IPS V2 support, which is set for DCN42, but rather
the presence of the block itself.

Reviewed-by: Charlene Liu <charlene.liu@amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amd/display: enable hdmistreamclk_rcg by default for dcn42
Charlene Liu [Fri, 26 Jun 2026 20:31:22 +0000 (16:31 -0400)]
drm/amd/display: enable hdmistreamclk_rcg by default for dcn42

[why]
enable hdmistreamclk_rcg by default

Reviewed-by: Leo Chen <leo.chen@amd.com>
Signed-off-by: Charlene Liu <Charlene.Liu@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amd/display: Test backlight ABM property attach
Alex Hung [Tue, 30 Jun 2026 00:45:19 +0000 (18:45 -0600)]
drm/amd/display: Test backlight ABM property attach

[WHAT]
Cover the eDP success path of amdgpu_dm_setup_backlight_device() where the
ABM level property is attached to the connector. A DRM-managed connector
fixture (drmm_mode_config_init + drmm_connector_init) lets the test verify
that one property is added and that its value is ABM_SYSFS_CONTROL.

Assisted-by: Copilot:Claude-Opus-4.8
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amd/display: Test panel power savings sysfs
Alex Hung [Tue, 30 Jun 2026 00:43:57 +0000 (18:43 -0600)]
drm/amd/display: Test panel power savings sysfs

[WHAT]
Add KUnit coverage using a DRM-managed connector fixture.

Tests cover show() mapping immediate-disable to 0 and reporting an active
ABM level, and store() handling the disable mapping, the forbidden update,
invalid text, and out-of-range input. show() writes through a page-backed
buffer because sysfs_emit() requires one.

Assisted-by: Copilot:Claude-Opus-4.8
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amd/display: Test backlight device registration
Alex Hung [Tue, 30 Jun 2026 00:40:26 +0000 (18:40 -0600)]
drm/amd/display: Test backlight device registration

[WHAT]
Add KUnit test to amdgpu_dm_register_backlight_device() and
cover its bl_idx == -1 early return, which must leave the
backlight device slot untouched.

Assisted-by: Copilot:Claude-Opus-4.8
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amd/display: Test backlight level readback path
Alex Hung [Tue, 30 Jun 2026 00:39:36 +0000 (18:39 -0600)]
drm/amd/display: Test backlight level readback path

[WHAT]
Add KUnit coverage for the backlight level read path.

A faked link_service vtable returns canned PWM and AUX brightness values,
letting the tests verify both the successful readback and the
DC_ERROR/AUX-failure fallbacks to the cached brightness, plus the
get_brightness() device-index wrapper.

Assisted-by: Copilot:Claude-Opus-4.8
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amd/display: Test backlight level programming path
Alex Hung [Tue, 30 Jun 2026 00:37:52 +0000 (18:37 -0600)]
drm/amd/display: Test backlight level programming path

[WHAT]
Add KUnit coverage for the backlight level write path in
amdgpu_dm_backlight.c.

Tests cover stream lookup hit/miss, the connector-off and no-stream early
returns, and the AUX/PWM/idle-reallow programming branches. The DC
programming calls stay safe by injecting a NULL power module and keeping
idle optimizations a no-op via disable_idle_power_optimizations.

Assisted-by: Copilot:Claude-Opus-4.8
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amd/display: Test MST coverage gaps
Alex Hung [Sat, 27 Jun 2026 03:12:25 +0000 (21:12 -0600)]
drm/amd/display: Test MST coverage gaps

[WHAT]
Add KUnit tests for uncovered MST paths:
- dm_mst_get_pbn_divider with non-null link
- retrieve_downstream_port_device AUX read failure
- dm_dp_aux_transfer non-ACK reply handling
- dm_handle_mst_sideband_msg_ready_event ESI read
  failure and ready-bit without MST state
- dm_handle_mst_down_rep_msg_ready wrapper
- amdgpu_dm_initialize_dp_connector eDP early return
- amdgpu_dm_initialize_dp_connector non-eDP MST init
  path (dc_link_dp_get_max_link_enc_cap,
  drm_dp_mst_topology_mgr_init and subconnector
  property attach)

The non-eDP MST test uses standard DRM KUnit helpers to
build a full fixture (drmm_mode_config_init plus
drm_connector_init), which the topology manager and
subconnector property require, and stubs the DC link
service get_max_link_enc_cap callback.

Assisted-by: Copilot:Claude-Opus-4.8
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amd/display: Add KUnit test for wb jobs
Alex Hung [Sat, 27 Jun 2026 00:18:55 +0000 (18:18 -0600)]
drm/amd/display: Add KUnit test for wb jobs

[WHAT]
Add KUnit tests to verify both functions return early when
job->fb is NULL without touching any buffer object.

Assisted-by: Copilot:Claude-Opus-4.6
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amd/display: Fix backlight max_brightness to match exported range
Mario Limonciello [Mon, 29 Jun 2026 20:27:00 +0000 (15:27 -0500)]
drm/amd/display: Fix backlight max_brightness to match exported range

[Why]
FWTS autobrightness fails on eDP panels because actual_brightness can
read higher than the advertised max_brightness (e.g. 63576 vs 62451).

The conversion helpers expose the firmware PWM range to userspace as
[0..max].  But max_brightness is advertised as (max - min), which is
smaller.  So reading the level can return a value above max_brightness.

This regressed in commit 4b61b8a39051 ("drm/amd/display: Add debugging
message for brightness caps"), which changed max_brightness to
(max - min) and undid commit 8dbd72cb7900 ("drm/amd/display: Export full
brightness range to userspace").

[How]
Advertise max_brightness as max, and scale the initial AC/DC brightness
against max too.  Update the KUnit expectations to match.

Fixes: 4b61b8a39051 ("drm/amd/display: Add debugging message for brightness caps")
Reviewed-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amd/display: limit reuse dsc capable bootup timing
Charlene Liu [Fri, 26 Jun 2026 15:39:04 +0000 (11:39 -0400)]
drm/amd/display: limit reuse dsc capable bootup timing

[why]
Previous dcn315 BIOS has known dsc issue, not good for reuse their dsc settings.
this pre-OS dsc issue is fixed in dcn42 bios.
since there is no production bios update for older asic, limit our new code instead.

Reviewed-by: Mohit Bawa <mohit.bawa@amd.com>
Signed-off-by: Charlene Liu <Charlene.Liu@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amd/display: Skip Update HDCP Config In Transition State
Fangzhi Zuo [Wed, 24 Jun 2026 20:41:47 +0000 (16:41 -0400)]
drm/amd/display: Skip Update HDCP Config In Transition State

Transition state does not have a valid dm_stream_ctx that should skip
configuring HDCP routine. The routine is valid to go through only when
a valid stream is created.

Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Fangzhi Zuo <Jerry.Zuo@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amd/display: remove unused dcn42 socbb values
Dmytro Laktyushkin [Thu, 25 Jun 2026 17:56:52 +0000 (13:56 -0400)]
drm/amd/display: remove unused dcn42 socbb values

These values should be unset for dcn42

Reviewed-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Dillon Varone <dillon.varone@amd.com>
Signed-off-by: Dmytro Laktyushkin <dmytro.laktyushkin@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amd/display: Allocate DCN32/1 dmub memory to GTT
Fangzhi Zuo [Thu, 18 Jun 2026 19:02:13 +0000 (15:02 -0400)]
drm/amd/display: Allocate DCN32/1 dmub memory to GTT

[Why]
On DCN32/321  sometimes DMCUB takes a long time to flush.
This adds a delay before the data is available on the driver side even
after driver receives notification from DMCUB via inbox

[How]
Allocating DMUB memory to GTT gives much better latency. Limit this to
DCN32/1 for now; it will be made general to all other dGPUs later.

Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Reviewed-by: Sun peng (Leo) Li <sunpeng.li@amd.com>
Signed-off-by: Fangzhi Zuo <Jerry.Zuo@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amd/display: Fix VABC Init and OLED Support
Iswara Nagulendran [Tue, 16 Jun 2026 19:31:03 +0000 (15:31 -0400)]
drm/amd/display: Fix VABC Init and OLED Support

[Why]
TCONs supporting VESA AUX Backlight does not always
support VESA Smooth Brightness. Driver software
needs to implement smooth brightness by periodically
updating the brightness by small steps. Driver
implementation is completed and verified on LCD
panels but solution is missing for OLED panels.

[How]
Updated driver to include smooth brightness for
OLED panels using VESA Aux Backlight.
Revert original workaround for VABC on oled issue,
as it is no longer needed.
Add VABC backlight Initialization sequence from
driver side.
Add fix to remove conflict between FW and driver
backlight programming for future ASIC.
Enable VABC for all future asic revisions.

Reviewed-by: Anthony Koo <anthony.koo@amd.com>
Reviewed-by: Dillon Varone <dillon.varone@amd.com>
Signed-off-by: Iswara Nagulendran <Iswara.Nagulendran@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amd/display: Test plane atomic check and hooks
Alex Hung [Fri, 26 Jun 2026 23:35:52 +0000 (17:35 -0600)]
drm/amd/display: Test plane atomic check and hooks

[WHAT]
Add KUnit tests for amdgpu_dm_plane_atomic_async_check(),
amdgpu_dm_plane_atomic_check(), amdgpu_dm_plane_panic_flush() and the
DRM plane reset, duplicate-state and destroy-state hooks.

Add the dm_test_init_atomic_check_state() helper and plane reset vtable
used by the new tests.

Assisted-by: Copilot:Claude-Opus-4.8 GPT-5.5
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amd/display: Test helper_check_state rejects
Alex Hung [Fri, 26 Jun 2026 23:35:52 +0000 (17:35 -0600)]
drm/amd/display: Test helper_check_state rejects

[WHAT]
Add KUnit tests for amdgpu_dm_plane_helper_check_state() covering the
small viewport width, small viewport height, bottom-edge clipping and
scaling-caps rejection paths.

Assisted-by: Copilot:Claude-Opus-4.8 GPT-5.5
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amd/display: Test DCC and cursor edge cases
Alex Hung [Fri, 26 Jun 2026 23:35:52 +0000 (17:35 -0600)]
drm/amd/display: Test DCC and cursor edge cases

[WHAT]
Add KUnit tests for the capability-callback-failure and not-capable
paths of amdgpu_dm_plane_validate_dcc(), and for the bad-size path of
amdgpu_dm_plane_get_cursor_position().

Assisted-by: Copilot:Claude-Opus-4.8 GPT-5.5
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amd/display: Test GFX12 DCC plane attributes
Alex Hung [Fri, 26 Jun 2026 23:35:52 +0000 (17:35 -0600)]
drm/amd/display: Test GFX12 DCC plane attributes

[WHAT]
Add KUnit tests for
amdgpu_dm_plane_fill_gfx12_plane_attributes_from_modifiers() covering
the block0, unconstrained-block and validation-failure cases.

Add the dm_test_gfx12_attrs() helper used to build the GFX12 inputs.

Assisted-by: Copilot:Claude-Opus-4.8 GPT-5.5
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amd/display: Test GFX9 DCC plane attributes
Alex Hung [Fri, 26 Jun 2026 23:35:52 +0000 (17:35 -0600)]
drm/amd/display: Test GFX9 DCC plane attributes

[WHAT]
Add KUnit tests for
amdgpu_dm_plane_fill_gfx9_plane_attributes_from_modifiers() covering
DCC enablement, validation failure, and the RB+ 64B/128B and GFX9
64B/unconstrained block modes.

Add the dm_test_gfx9_attrs(), dm_test_setup_gfx9_dcc_device() and
dm_test_gfx9_dcc_modifier() helpers used to build the GFX9 DCC inputs.

Assisted-by: Copilot:Claude-Opus-4.8 GPT-5.5
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amd/display: Test plane buffer attributes
Alex Hung [Fri, 26 Jun 2026 23:35:52 +0000 (17:35 -0600)]
drm/amd/display: Test plane buffer attributes

[WHAT]
Add KUnit tests for the video and GFX12 paths of
amdgpu_dm_plane_fill_plane_buffer_attributes().

Introduce the dm_test_plane_attrs(), dm_test_video_attrs() and
dm_test_graphics_attrs() helpers that drive the buffer-attribute fill
with representative plane states.

Assisted-by: Copilot:Claude-Opus-4.8 GPT-5.5
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amd/display: Test plane scaling info paths
Alex Hung [Fri, 26 Jun 2026 23:35:52 +0000 (17:35 -0600)]
drm/amd/display: Test plane scaling info paths

[WHAT]
Add KUnit tests covering the NV12 DCN1.x and plane-caps paths of
amdgpu_dm_plane_fill_dc_scaling_info() and the FP16 path of
amdgpu_dm_plane_get_min_max_dc_plane_scaling().

Assisted-by: Copilot:Claude-Opus-4.8 GPT-5.5
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amd/display: Test GFX11/GFX12 plane modifiers
Alex Hung [Fri, 26 Jun 2026 23:35:52 +0000 (17:35 -0600)]
drm/amd/display: Test GFX11/GFX12 plane modifiers

[WHAT]
Add KUnit tests for amdgpu_dm_plane_get_plane_modifiers() on GFX11
(64K-first and 256K-first) and GFX12 devices.

Add a register-read mock (dm_test_gfx11_reg_ctx and friends) and
device-setup helpers so the GFX11 DCC modifier ordering can be checked
without real hardware.

Assisted-by: Copilot:Claude-Opus-4.8 GPT-5.5
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amd/display: Test GFX9/GFX10 plane modifiers
Alex Hung [Fri, 26 Jun 2026 23:35:52 +0000 (17:35 -0600)]
drm/amd/display: Test GFX9/GFX10 plane modifiers

[WHAT]
Add KUnit tests for amdgpu_dm_plane_get_plane_modifiers() on GFX9,
Raven, Raven constant-encode, GFX10.1 and GFX10.3 devices.

Introduce the dm_test_expect_mods_terminated(), dm_test_mods_contain()
and dm_test_get_primary_mods() helpers used to validate the generated
modifier lists.

Assisted-by: Copilot:Claude-Opus-4.8 GPT-5.5
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amd/display: Test format info and blending
Alex Hung [Fri, 26 Jun 2026 23:35:52 +0000 (17:35 -0600)]
drm/amd/display: Test format info and blending

[WHAT]
Add KUnit coverage for amdgpu_dm_plane_get_format_info(), the overlay
universal-plane path of get_plane_formats(), the D-swizzle rejection
path of format_mod_supported(), and the DCN4.2 variant of
fill_blending_from_plane_state().

These exercise format-query and blending code paths that the existing
suite did not cover.

Assisted-by: Copilot:Claude-Opus-4.8 GPT-5.5
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amd/display: Add FBC init tests for connector
Bhawanpreet Lakha [Tue, 23 Jun 2026 18:41:01 +0000 (14:41 -0400)]
drm/amd/display: Add FBC init tests for connector

Add KUnit coverage for amdgpu_dm_fbc_init() on the
amdgpu_dm_connector tests:

- No FBC present
- Non-eDP link
- Buffer already allocated

Assisted-by: Copilot:Claude-Opus-4.8
Reviewed-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amd/display: Add subconnector property tests for connector
Bhawanpreet Lakha [Thu, 25 Jun 2026 18:53:11 +0000 (14:53 -0400)]
drm/amd/display: Add subconnector property tests for connector

Add KUnit coverage for update_subconnector_property() on the
amdgpu_dm_connector suite:

- DP connector with a sink: subconnector property is resolved from
  the dongle type (VGA converter -> VGA).
- DP connector without a sink: dongle type is ignored and the
  property stays Unknown.
- Non-DP connector: function early-returns and leaves a pre-seeded
  property value untouched.

Assisted-by: Copilot:Claude-Opus-4.8
Reviewed-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amd/display: Add color space and timing tests for connector
Bhawanpreet Lakha [Thu, 25 Jun 2026 17:15:28 +0000 (13:15 -0400)]
drm/amd/display: Add color space and timing tests for connector

Add KUnit coverage for adjust_colour_depth_from_display_info() 420
reduction, amdgpu_dm_get_output_color_space() Y_ONLY/YCbCr601/BT2020
fallbacks, to_drm_connector_type() dual-link DVI-D, and
copy_crtc_timing_for_drm_display_mode().

Export copy_crtc_timing_for_drm_display_mode via EXPORT_IF_KUNIT so
the tests can reach it.

Assisted-by: Copilot:Claude-Opus-4.8
Reviewed-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amd/display: More Kunit tests for audio
Bhawanpreet Lakha [Mon, 22 Jun 2026 18:57:38 +0000 (14:57 -0400)]
drm/amd/display: More Kunit tests for audio

Split audio init to make the initialization modular

Test the audio pin initialization

Assisted-by: Copilot:Claude-Opus-4.8
Reviewed-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amd/display: Add more tests for HDCP
Bhawanpreet Lakha [Tue, 23 Jun 2026 14:44:10 +0000 (10:44 -0400)]
drm/amd/display: Add more tests for HDCP

Adds a few more test cases to the hdcp code

  - process_output(): make sure work gets requeued when callback and
    watchdog are stopped but also asked to run again
  - event_property_update(): bail out when the connector is NULL
  - hdcp_handle_cpirq(): schedules the work and picks the right link
  - hdcp_update_display(): schedules property validation on enable,
    resets status and cancels validation on disable
  - hdcp_create_workqueue(): returns NULL when max links is zero

Assisted-by: Copilot:Claude-Opus-4.8
Reviewed-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amd/display: Tear down dangling pipe on boot to fix s0i3
Tom Chung [Tue, 23 Jun 2026 07:35:30 +0000 (15:35 +0800)]
drm/amd/display: Tear down dangling pipe on boot to fix s0i3

[Why]
If an external monitor is connected at power-on and then unplugged
before the driver loads (e.g. at the GRUB menu), the system can no
longer enter the s0i3 deepest suspend state, even though all connectors
report disconnected.

The pre-OS firmware (GOP/vBIOS) lights up a front-end for the display
that is present at power-on. The driver never fully tears this inherited
pipe down, and the leftover pipe keeps the DCN block from reaching idle,
which blocks s0i3.

[How]
Add dc_disable_dangling_timing_generators() to DC core and call it from
amdgpu_dm right after dc_hardware_init(). It scans every enabled timing
generator and classifies it as in-use or dangling. If a dangling pipe
exists and nothing needs to be preserved, power down the hw blocks so
DCN can reach idle.

Assisted-by: Cursor:claude-opus-4.8
Reviewed-by: Mario Limonciello <mario.limonciello@amd.com>
Signed-off-by: Tom Chung <chiahsuan.chung@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amd/display: Fix 8K Mode Not Parsed by EDID
Fangzhi Zuo [Wed, 24 Jun 2026 20:54:30 +0000 (16:54 -0400)]
drm/amd/display: Fix 8K Mode Not Parsed by EDID

[why]
The 8K120/8K240 timings live in DisplayID extension blocks 2 and 3
of this EDID. The EDID is a 4-block (512-byte) HDMI 2.1 EDID
that uses HF-EEODB.
drm core reads and parses this correctly, but amdgpu rebuilds its own copy.
Only 2 of 4 blocks were copied into sink->dc_edid, that leads to
drm_edid_connector_add_modes() never sees blocks 2 and 3.

[how]
Directly populate edid_blob_ptr with a blob whose length is the full,
and HF-EEODB-aware size.

Reviewed-by: Sun peng (Leo) Li <sunpeng.li@amd.com>
Signed-off-by: Fangzhi Zuo <Jerry.Zuo@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amd/display: Test top-level IRQ handler and vmin/vmax worker
Alex Hung [Thu, 25 Jun 2026 18:01:11 +0000 (12:01 -0600)]
drm/amd/display: Test top-level IRQ handler and vmin/vmax worker

[WHAT]
Add KUnit coverage for the two remaining uncovered functions in
amdgpu_dm_irq.c: amdgpu_dm_irq_handler() and dm_handle_vmin_vmax_update().

amdgpu_dm_irq_handler() is driven with a fake dc whose irq_service maps
the hardware IRQ entry to a DC source and whose per-source info table
lets dc_interrupt_ack() succeed; high- and low-context counting handlers
verify the immediate and scheduled dispatch paths.

Assisted-by: Copilot:Claude-Opus-4.8
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amd/display: Test high-IRQ and handler registration
Alex Hung [Tue, 23 Jun 2026 05:54:58 +0000 (23:54 -0600)]
drm/amd/display: Test high-IRQ and handler registration

[WHAT]
Add the final batch of amdgpu_dm_irq KUnit tests covering the high-IRQ
callbacks (dm_pflip_high_irq, dm_vupdate_high_irq, dm_crtc_high_irq),
dm_handle_hpd_work, the DMUB outbox1 low IRQ, and the per-ASIC IRQ
handler registration helpers (DCE110, DCN10 and outbox).

Assisted-by: Copilot:Claude-Opus-4.8
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amd/display: Test dmub HPD callbacks and handlers
Alex Hung [Tue, 23 Jun 2026 05:54:13 +0000 (23:54 -0600)]
drm/amd/display: Test dmub HPD callbacks and handlers

[WHAT]
Add KUnit tests for the DMUB HPD notification callbacks
(dmub_hpd_callback, dmub_hpd_sense_callback) and for
amdgpu_dm_register_hpd_handlers().

Assisted-by: Copilot:Claude-Opus-4.8
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amd/display: Test HPD interrupt handling
Alex Hung [Thu, 25 Jun 2026 19:07:40 +0000 (13:07 -0600)]
drm/amd/display: Test HPD interrupt handling

Add KUnit coverage for the HPD interrupt-handling helpers: the HPD-RX
offload worker, the HDMI HPD debounce worker, handle_hpd_irq_helper(),
handle_hpd_irq(), schedule_hpd_rx_offload_work() and handle_hpd_rx_irq().
Expose these statics for KUnit and add the stub link-service callbacks,
sink helpers and fixtures the tests rely on.

Assisted-by: Copilot:Claude-Opus-4.8
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amd/display: Test HPD init/fini
Alex Hung [Thu, 25 Jun 2026 19:07:14 +0000 (13:07 -0600)]
drm/amd/display: Test HPD init/fini

Add KUnit coverage for amdgpu_dm_hpd_init() and amdgpu_dm_hpd_fini():
empty connector list, the per-connector HW fallback path, the analog
polling enable/disable path, and the base-driver irq-ref path. Export
both functions for KUnit and add shared drm_connector test helpers.

Assisted-by: Copilot:Claude-Opus-4.8
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amd/display: Test irq state setters and work
Alex Hung [Tue, 23 Jun 2026 05:50:51 +0000 (23:50 -0600)]
drm/amd/display: Test irq state setters and work

[WHAT]
Add KUnit tests for the per-source IRQ state callbacks (HPD, pflip,
CRTC, vline0, vupdate, dmub outbox/trace), the immediate and scheduled
IRQ work paths, and amdgpu_dm_outbox_init.

Assisted-by: Copilot:Claude-Opus-4.8
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amd/display: Test irq funcs/suspend/workqueue
Alex Hung [Tue, 23 Jun 2026 05:50:10 +0000 (23:50 -0600)]
drm/amd/display: Test irq funcs/suspend/workqueue

[WHAT]
Expand the amdgpu_dm_irq KUnit suite with the first batch of tests
covering IRQ source-function setup, suspend/resume of the IRQ
clients, and the HPD RX offload workqueue lifecycle.

Assisted-by: Copilot:Claude-Opus-4.8
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amd/display: Test MST payload and DSC enable helpers
Alex Hung [Thu, 25 Jun 2026 05:34:18 +0000 (23:34 -0600)]
drm/amd/display: Test MST payload and DSC enable helpers

[WHAT]
Add KUnit coverage for dm_helpers_construct_old_payload, the DP MST
payload allocation, poll-for-ACT and deallocation success paths, the
full dm_helpers_dp_write_dsc_enable matrix and
dm_helpers_dp_handle_test_pattern_request.

Assisted-by: Copilot:Claude-Opus-4.8
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amd/display: Run FP-disabled MST stub test only without DC FP
Srinivasan Shanmugam [Fri, 10 Jul 2026 14:36:33 +0000 (20:06 +0530)]
drm/amd/display: Run FP-disabled MST stub test only without DC FP

dm_mst_test_fp_guarded_public_stubs() passes NULL arguments to
dm_dp_mst_is_port_support_mode() to test the stub implementation when
CONFIG_DRM_AMD_DC_FP is disabled.

However, this test is always registered. When CONFIG_DRM_AMD_DC_FP is
enabled, the real implementation is used instead of the stub. The real
implementation expects valid pointers, so passing NULL can lead to a
NULL pointer dereference.

Register this test only when CONFIG_DRM_AMD_DC_FP is disabled.

Reported-by: Dan Carpenter <error27@gmail.com>
Cc: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Cc: Alex Hung <alex.hung@amd.com>
Cc: George Zhang <george.zhang@amd.com>
Cc: Roman Li <roman.li@amd.com>
Cc: Tom Chung <chiahsuan.chung@amd.com>
Cc: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>
Reviewed-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amd/display: Add dp_skip_rbr flag for NUTMEG
Timur Kristóf [Fri, 29 May 2026 09:09:09 +0000 (11:09 +0200)]
drm/amd/display: Add dp_skip_rbr flag for NUTMEG

No functional changes. Just clean up a conceptual mismatch.

Based on feedback on the NUTMEG code in DC, the
preferred_link_setting is meant to force the DP link to a
specific setting, meaning both the link rate and lane count
should be locked to an exact value. What NUTMEG needs is
a lower bound on the link rate, which is not the same concept.

Implement this as a HW workaround flag instead.

Suggested-by: Wenjing Liu <wenjing.liu@amd.com>
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amd/display: Fix preferred link rate for NUTMEG
Timur Kristóf [Fri, 29 May 2026 09:09:08 +0000 (11:09 +0200)]
drm/amd/display: Fix preferred link rate for NUTMEG

When there is a preferred link rate setting, it needs to be
applied to both the current and initial link rate.
This was regressed by a "coding style" fix, which caused
the current link rate to not respect the preferred value.

This commit restores the functionality of NUTMEG,
the DP bridge encoder found on old APUs such as Kaveri.

Fixes: a62346043a89 ("drm/amd/display: Fix coding style issue")
Closes: https://gitlab.freedesktop.org/drm/amd/-/work_items/5465
Cc: Chuanyu Tseng <Chuanyu.Tseng@amd.com>
Reviewed-by: Fangzhi Zuo <Jerry.Zuo@amd.com>
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amd/display: Fix DM I2C teardown race
Geoffrey McRae [Sun, 28 Jun 2026 16:04:13 +0000 (02:04 +1000)]
drm/amd/display: Fix DM I2C teardown race

DM I2C adapters can remain visible to userspace while DM teardown is
already in progress. A concurrent i2c-dev transfer may then enter
amdgpu_dm_i2c_xfer() after the backing DM state has been torn down,
leading to a NULL pointer dereference.

Create a devres group around the DM I2C adapter lifetime and release it
at the start of dm_hw_fini(), before HPD, IRQ, and DM state are torn
down. This removes the I2C adapters first and waits for in-flight users
to drain before the structures used by amdgpu_dm_i2c_xfer() disappear.

This fixes a teardown ordering race seen during device removal:

BUG: kernel NULL pointer dereference
RIP: amdgpu_dm_i2c_xfer+0x122/0x1c0 [amdgpu]
Call Trace:
__i2c_transfer
i2c_transfer
i2cdev_ioctl_rdwr

Fixes: 5b3eca05cfb0 ("drm/amd/display: Use devm_i2c_add_adapter to simplify i2c cleanup logic")
Signed-off-by: Geoffrey McRae <geoffrey.mcrae@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Leo Li <sunpeng.li@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amdgpu: deduplicate JPEG v5.0 interrupt routine
Andre Luiz Batista Bueno [Wed, 8 Jul 2026 16:28:50 +0000 (13:28 -0300)]
drm/amdgpu: deduplicate JPEG v5.0 interrupt routine

Both jpeg_v5_0_1.c and jpeg_v5_0_2.c implement identical
interrupt processing routines. To avoid code duplication,
make the implementation in jpeg_v5_0_1.c non-static and
call it directly from jpeg_v5_0_2.c.

Signed-off-by: Andre Luiz Batista Bueno <andrebueno.mac@gmail.com>
Co-developed-by: Enzo Furegatti Spinella <enzo.spinella@usp.br>
Signed-off-by: Enzo Furegatti Spinella <enzo.spinella@usp.br>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amdkfd: Do not fail process debugfs setup on debugfs errors
Srinivasan Shanmugam [Fri, 10 Jul 2026 11:25:53 +0000 (16:55 +0530)]
drm/amdkfd: Do not fail process debugfs setup on debugfs errors

debugfs is intended for debugging only, and failures to create debugfs
entries should not affect normal operation.

Remove the check for debugfs_create_dir() in kfd_debugfs_add_process().
If debugfs entries cannot be created, continue without them instead of
reporting an unnecessary error.

Fixes: 325de6bf3328 ("drm/amdkfd: expose pasid of secondary contexts by debugfs")
Reported-by: Dan Carpenter <error27@gmail.com>
Cc: Zhu Lingshan <lingshan.zhu@amd.com>
Cc: Felix Kuehling <felix.kuehling@amd.com>
Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amdgpu/ras: only check bad page for address-based UMC injection
Stanley.Yang [Fri, 26 Jun 2026 12:20:15 +0000 (20:20 +0800)]
drm/amdgpu/ras: only check bad page for address-based UMC injection

UMC error injection on MI300 series is dispatched by the RAS TA using
the injection method; only the "coherent" methods are address based,
the single-shot/persistent/ac-parity ones ignore the address.

The debugfs control path validated the injection address against the
bad page list for every UMC injection. On uniras (SMU v13+) devices the
address is now validated by the ras_mgr inject handler, so the legacy
debugfs bad page check only runs on the legacy RAS path; other ASICs
keep injecting by address.

In the ras_mgr handler an injection is treated as non address-based only
when userspace passes the U64_MAX sentinel address and the method is a
non-address method. In that case the address is cleared to 0 and the bad
page / range validation is skipped; otherwise the injection address is
validated as before.

Signed-off-by: Stanley.Yang <Stanley.Yang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amdgpu: drop debug_enable_ras_aca debug mask flag
Ce Sun [Tue, 7 Jul 2026 13:30:43 +0000 (21:30 +0800)]
drm/amdgpu: drop debug_enable_ras_aca debug mask flag

drop debug_enable_ras_aca debug mask flag

Signed-off-by: Ce Sun <cesun102@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amdgpu: use IP version check in sysfs creation conditional logic
Ce Sun [Thu, 9 Jul 2026 06:22:51 +0000 (14:22 +0800)]
drm/amdgpu: use IP version check in sysfs creation conditional logic

avoid sysfs node creation faults when performing NPS mode switching

Signed-off-by: Ce Sun <cesun102@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amd/display: move connector state dereference after NULL check
Guangshuo Li [Wed, 8 Jul 2026 07:27:51 +0000 (15:27 +0800)]
drm/amd/display: move connector state dereference after NULL check

amdgpu_dm_connector_atomic_check() checks whether the old or new
connector state returned by the atomic helpers is NULL before using
those pointers.

However, new_con_state is already dereferenced while initializing crtc,
before the NULL check is reached. If
drm_atomic_get_new_connector_state() returns NULL, the function can
dereference the NULL pointer before the WARN_ON() check can handle it.

Declare crtc first and initialize it only after the NULL check has
succeeded.

Fixes: 1e5e8d672fec ("drm/amd/display: Avoid a NULL pointer dereference")
Signed-off-by: Guangshuo Li <lgs201920130244@gmail.com>
Reviewed-by: Mario Limonciello <mario.limonciello@amd.com>
Link: https://patch.msgid.link/20260708072751.724400-1-lgs201920130244@gmail.com
(ML: adjust for movement to amdgpu_dm_connector.c)
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amdkfd: fix 32-bit overflow in CWSR total size calculation
Yongqiang Sun [Mon, 6 Jul 2026 19:15:07 +0000 (15:15 -0400)]
drm/amdkfd: fix 32-bit overflow in CWSR total size calculation

total_cwsr_size was computed in 32-bit before being used as a BO/SVM
allocation size.
With large ctx_save_restore_area_size and debug_memory_size
multiplied by the XCC count, the product can wrap,
yielding an undersized CWSR save area that firmware later overruns.

Promote total_cwsr_size to u64 and use check_add_overflow()/
check_mul_overflow() in both kfd_queue_acquire_buffers() and
kfd_queue_release_buffers().

Signed-off-by: Yongqiang Sun <Yongqiang.Sun@amd.com>
Reviewed-by: Philip Yang <philip.yang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amd/display: Test MCCS FreeSync VCP helpers
Alex Hung [Thu, 25 Jun 2026 05:34:18 +0000 (23:34 -0600)]
drm/amd/display: Test MCCS FreeSync VCP helpers

[WHAT]
Add KUnit coverage for dm_helpers_read_mccs_caps and
dm_helpers_mccs_vcp_set, including the DP/HDMI/legacy-PCON selection,
the i2c VCP request and set packets and the retry-failure paths.

Assisted-by: Copilot:Claude-Opus-4.8
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amd/display: Test I2C, stubs and MST early returns
Alex Hung [Thu, 25 Jun 2026 05:34:18 +0000 (23:34 -0600)]
drm/amd/display: Test I2C, stubs and MST early returns

[WHAT]
Add KUnit coverage for dm_helpers_submit_i2c,
dm_helper_dmub_aux_transfer_sync, the empty stub helpers, the MST
null-connector early returns, dm_helpers_dmub_outbox_interrupt_control,
dm_helpers_mst_enable_stream_features and
dm_helpers_enable_periodic_detection.

Assisted-by: Copilot:Claude-Opus-4.8
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amd/display: Test MST start/stop and panel settings
Alex Hung [Thu, 25 Jun 2026 05:34:18 +0000 (23:34 -0600)]
drm/amd/display: Test MST start/stop and panel settings

[WHAT]
Add KUnit coverage for dm_helpers_dp_mst_start_top_mgr and
dm_helpers_dp_mst_stop_top_mgr, dm_helpers_dp_write_hblank_reduction,
get_dsc_max_slices, dm_helpers_init_panel_settings,
dm_helpers_override_panel_settings and
fill_dc_mst_payload_table_from_drm.

Assisted-by: Copilot:Claude-Opus-4.8
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amd/display: Test DPCD AUX and Synaptics helpers
Alex Hung [Thu, 25 Jun 2026 05:34:18 +0000 (23:34 -0600)]
drm/amd/display: Test DPCD AUX and Synaptics helpers

[WHAT]
Add KUnit coverage for DTN logging, DPCD read/write, fused IO and the
Synaptics DSC workaround helpers execute_synaptics_rc_command,
apply_synaptics_fifo_reset_wa,
write_dsc_enable_synaptics_non_virtual_dpcd_mst and
dm_helpers_dp_write_dsc_enable.

Assisted-by: Copilot:Claude-Opus-4.8
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amd/display: Test EDID and ACPI/VBIOS readers
Alex Hung [Thu, 25 Jun 2026 05:34:18 +0000 (23:34 -0600)]
drm/amd/display: Test EDID and ACPI/VBIOS readers

[WHAT]
Add KUnit coverage for the EDID parsing helpers edid_extract_panel_id,
apply_edid_quirks and dm_helpers_parse_edid_caps, together with the
ACPI/VBIOS EDID readers dm_helpers_probe_acpi_edid,
dm_helpers_read_acpi_edid and dm_helpers_read_vbios_hardcoded_edid.

Assisted-by: Copilot:Claude-Opus-4.8
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amd/display: Re-evaluate cursor mode on plane position/size change
James Lin [Fri, 26 Jun 2026 03:21:00 +0000 (11:21 +0800)]
drm/amd/display: Re-evaluate cursor mode on plane position/size change

[Why]
dm_crtc_get_cursor_mode() only re-evaluates the required cursor mode
(native vs overlay) when a top plane changes its scale, pixel format,
enable state, or zpos/color pipeline. It does not re-evaluate when a
plane changes only its destination rectangle (crtc_x, crtc_y, crtc_w,
crtc_h) at a constant scale. A pure move/resize can create or remove a
hole under the cursor, which changes whether the native cursor is valid.
When a primary plane shrinks and no longer covers the cursor region, the
cursor mode stays NATIVE and the cursor is not rendered over the
uncovered area, so it becomes invisible there. This is caught by
igt@amdgpu/amd_cursor_overlay@non-full, where the test CRC was a constant
black value across all cursor positions instead of tracking the
reference.

[How]
In the per-plane loop of dm_crtc_get_cursor_mode(), set
consider_mode_change when any of crtc_x, crtc_y, crtc_w or crtc_h differs
between the old and new plane state, so a plane move/resize forces
re-evaluation of the cursor mode. The driver then correctly promotes the
cursor to OVERLAY mode when the primary stops covering the cursor region.

Reviewed-by: ChiaHsuan (Tom) Chung <chiahsuan.chung@amd.com>
Signed-off-by: James Lin <PingLei.Lin@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amd/display: ensure dtbclk clk_src selected before hdmistream_clk_en
Charlene Liu [Wed, 24 Jun 2026 22:54:43 +0000 (18:54 -0400)]
drm/amd/display: ensure dtbclk clk_src selected before hdmistream_clk_en

[why]
correct a sequence issue by switching to dcn35's dccg sequence:
to make sure select dtbclk src first before programming hdmistream_clk_en.

Reviewed-by: Leo Chen <leo.chen@amd.com>
Signed-off-by: Charlene Liu <Charlene.Liu@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amd/display: Fix indenting of dpms on
Dominik Kaszewski [Fri, 19 Jun 2026 11:50:39 +0000 (13:50 +0200)]
drm/amd/display: Fix indenting of dpms on

[Why & How]
Cleanup for future refactors.

Reviewed-by: Wenjing Liu <wenjing.liu@amd.com>
Signed-off-by: Dominik Kaszewski <dominik.kaszewski@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amd/display: Add MALL status readback support for DCN 4.0.1
James Lin [Wed, 24 Jun 2026 07:36:03 +0000 (15:36 +0800)]
drm/amd/display: Add MALL status readback support for DCN 4.0.1

[why]
The IGT test igt@amdgpu/amd_mall@static-screen always fails on DCN 4.0.1
 because debugfs reports "mall enabled: no" even when MALL is
actually active. This is because the DCN 4.0.1 hubbub function table is
missing the .get_mall_en callback, so capabilities_show() always sees
mall_in_use as false.

[how]
Reuse hubbub32_get_mall_en() for DCN 4.0.1 since the DCHUBBUB_ARB_MALL_CNTL
register layout is identical to DCN 3.2:
- Register the DCHUBBUB_ARB_MALL_CNTL register offset in dcn401_resource.h
- Add MALL_PREFETCH_COMPLETE and MALL_IN_USE mask/shift definitions in
  dcn401_hubbub.h
- Wire up .get_mall_en = hubbub32_get_mall_en in hubbub4_01_funcs

Reviewed-by: ChiaHsuan (Tom) Chung <chiahsuan.chung@amd.com>
Signed-off-by: James Lin <PingLei.Lin@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amd/display: Add DCN42B VID_CRC_CONTROL and HBLANK_CONTROL registers
Matthew Stewart [Wed, 24 Jun 2026 18:59:20 +0000 (14:59 -0400)]
drm/amd/display: Add DCN42B VID_CRC_CONTROL and HBLANK_CONTROL registers

[why]

These registers are needed by our existing code.

[how]

Add the missing register defines to dcn42b_resource.c.

Remove DCN42B variant of HP_DP_STREAM_ENC_REG_LIST_RI as it is now the
same as the DCN42B one, when these registers are included.

Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Matthew Stewart <Matthew.Stewart2@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amd/display: add null pointer access check
Charlene Liu [Mon, 22 Jun 2026 20:29:25 +0000 (16:29 -0400)]
drm/amd/display: add null pointer access check

[why]
need to add null pointer access check

Reviewed-by: Gabe Teeger <gabe.teeger@amd.com>
Signed-off-by: Charlene Liu <Charlene.Liu@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amd/display: Add KUnit tests for ism
Alex Hung [Fri, 19 Jun 2026 03:12:21 +0000 (21:12 -0600)]
drm/amd/display: Add KUnit tests for ism

Add KUnit coverage for the following ISM functions:

- dm_ism_next_state(): state transitions for running, busy,
  hysteresis-wait, optimized-idle, and aborted states
- dm_ism_get_sso_delay(): null stream, zero frames, 1080p60 3-frame,
  and 4k60 1-frame calculations
- dm_ism_get_idle_allow_delay(): null stream, zero filter/entry/delay
  frames, short-idle filtering, wrap-around, old history cutoff,
  mixed durations, and entry count exceeding history size
- amdgpu_dm_ism_init(): initial state setup
- amdgpu_dm_ism_fini(): cleanup after init
- dm_ism_set_last_idle_ts(): timestamp update
- dm_ism_insert_record(): basic insert and wrap-around
- dm_ism_trigger_event(): valid and invalid transitions

Assisted-by: Copilot:Claude-Opus-4.8
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amd/display: Fix dc_stream_remove_writeback dropping wrong writeback entries.
Bhuvanachandra Pinninti [Mon, 22 Jun 2026 10:42:07 +0000 (16:12 +0530)]
drm/amd/display: Fix dc_stream_remove_writeback dropping wrong writeback entries.

[why]
The matching entry was disabled but still copied during compaction, so a
removed pipe could survive and overwrite a valid entry, leaving num_wb_info
wrong.

[how]
Skip every entry matching dwb_pipe_inst and compact only survivors. Covered
by test_dc_stream_writeback_drc_and_remove.And added new test cases for coverage.

Reviewed-by: Ilya Bakoulin <ilya.bakoulin@amd.com>
Signed-off-by: Bhuvanachandra Pinninti <BhuvanaChandra.Pinninti@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amd/display: update memclk clock table read for dcn42
Dmytro Laktyushkin [Thu, 4 Jun 2026 13:26:22 +0000 (09:26 -0400)]
drm/amd/display: update memclk clock table read for dcn42

Change memclk table to match dcfclk size to avoid fine grained mapping
in dml2.1

Reviewed-by: Charlene Liu <charlene.liu@amd.com>
Signed-off-by: Dmytro Laktyushkin <dmytro.laktyushkin@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amd/display: Add Debug Option To Enable Per-DPM De-rate Usage
Austin Zheng [Tue, 9 Jun 2026 23:01:13 +0000 (19:01 -0400)]
drm/amd/display: Add Debug Option To Enable Per-DPM De-rate Usage

[Why]
DML has been updated to use per-DPM derates when provided but per-DPM de-rates have not been finalized.
Need to validate to see what values should be stored in the bounding box.

[How]
Add debug options to set custom derates per DPM (starting at DPM0) and their values

Each entry in the custom derate expects the derates to be stored in the following format:
bits 0-7: dram_derate_percent_pixel
bits 8-15: fclk_derate_percent
bits 16-23: dcfclk_derate_percent
bits 24-31 are unused.

e.g. Using the value 0x414020 will set the following derates for DPM0
DPM0: 0x20, 0x40, 0x41 for dram, fclk, and dcfclk respectively

Note that global derate value will be used if the per-DPM derate is 0.

Reviewed-by: Dillon Varone <dillon.varone@amd.com>
Signed-off-by: Austin Zheng <Austin.Zheng@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amd/display: Add KUnit tests for CACP on Linux
Chenyu Chen [Mon, 22 Jun 2026 08:31:53 +0000 (16:31 +0800)]
drm/amd/display: Add KUnit tests for CACP on Linux

[Why]
The CACP enablement on Linux added panel-type detection and CACP
capability logic that was not covered by KUnit tests.

[How]
Export amdgpu_dm_set_panel_type() and amdgpu_dm_update_cacp_caps() for
KUnit via STATIC_IFN_KUNIT/EXPORT_IF_KUNIT and add unit tests covering:
- amdgpu_dm_update_cacp_caps(): IP version gating (including the 3.1.6
  exclusion), eDP/LVDS signal handling, non-eDP signals, and OLED vs LCD
  panel types.
- amdgpu_dm_set_panel_type(): VSDB OLED/MINILED, DPCD oled/miniled bits,
  the DID path (OLED and LCD), the vendor luminance heuristic, and the
  LCD default.

Update the should_create_sysfs backlight tests to reflect the new
OLED/CACP behavior (OLED with/without CACP and LCD eDP panels).

Assisted-by: Copilot:Claude-Opus-4.8
Reviewed-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amd/display: Fix dead-code panel type detection from DID
Chenyu Chen [Mon, 22 Jun 2026 08:25:09 +0000 (16:25 +0800)]
drm/amd/display: Fix dead-code panel type detection from DID

[Why]
In amdgpu_dm_set_panel_type() the DID fallback branch tested and wrote
link->panel_type, while the rest of the function tracked the result in
the local variable panel_type. The final assignment unconditionally
overwrites link->panel_type from panel_type, so the value derived from
DID was always discarded, making the DID branch dead code.

[How]
Use the local panel_type variable in the DID fallback branch so that the
DID result participates in the source priority (VSDB -> DPCD -> DID ->
vendor luminance heuristic -> LCD default) and is preserved by the final
assignment.

Assisted-by: Copilot:Claude-Opus-4.8
Reviewed-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amd/display: Remove sink usage from DPMS
Dominik Kaszewski [Fri, 19 Jun 2026 09:22:07 +0000 (11:22 +0200)]
drm/amd/display: Remove sink usage from DPMS

[Why]
stream->sink is optional and can be null, so should always be checked
before dereference. Additionally, most of its usage in DPMS sequences
is for stream->sink->link, which can be replaced with stream->link,
as the two should always be the same.

[How]
* Replace stream->sink->link in DPMS on/off
* Add assert to USB4 BW allocation where sink is required
* Avoid inconsistencies in resource access, e.g. don't repeat
stream->link after it was already saved to a local variable
* Pull out effective VPG calculation to helper getter
* Formatting fixes

Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Dominik Kaszewski <dominik.kaszewski@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amd/display: program dither on all OPP heads under ODM combine
James Lin [Mon, 22 Jun 2026 05:38:02 +0000 (13:38 +0800)]
drm/amd/display: program dither on all OPP heads under ODM combine

[why]
The IGT test kms_plane_alpha_blend@coverage-vs-premult-vs-constant
failed on DCN with ODM 2:1 combine enabled. The test compares the CRC
of a coverage-blended plane against a premultiplied-blended plane and
expects them to be identical. With ODM combine the whole-frame CRC
mismatched (left segment matched, right segment differed).

Root cause: dc_stream_set_dither_option() iterated the pipe_ctx array
and broke out at the first pipe matching the stream (the OTG master /
OPP instance 0), then programmed bit-depth reduction (dither) on that
single OPP only. Under ODM combine there is more than one OPP head, so
the secondary ODM segment (OPP instance 1) was never reprogrammed. When
CRC capture requested dither off, only the left OPP got updated while
the right OPP kept its previous dither setting, producing a different
CRC for the right segment and thus a whole-frame CRC mismatch.

[how]
Use resource_get_otg_master_for_stream() and
resource_get_opp_heads_for_otg_master() to retrieve every OPP head of
the stream, then loop over all of them and call
transform_set_pixel_storage_depth() and opp_program_bit_depth_reduction()
on each. This keeps all OPP heads in sync under ODM combine, so dither is
applied (or cleared) identically across every segment and the CRCs match.

Reviewed-by: Wayne Lin <wayne.lin@amd.com>
Signed-off-by: James Lin <PingLei.Lin@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amd/display: Check dc_link before applying DSC policy
Srinivasan Shanmugam [Mon, 22 Jun 2026 09:28:52 +0000 (14:58 +0530)]
drm/amd/display: Check dc_link before applying DSC policy

apply_dsc_policy_for_stream() decides whether Display Stream Compression
(DSC) should be enabled for a display stream based on display
capabilities, link bandwidth and user overrides.

Smatch reports that apply_dsc_policy_for_stream() dereferences
aconnector->dc_link before checking whether it is NULL.

Add an early NULL check for aconnector->dc_link before the first
dereference and remove the later redundant NULL check in the HDMI_FRL
path.

Fixes: 0e967e086e75 ("drm/amd/display: Extract connector and encoder code to amdgpu_dm_connector")
Reported-by: Dan Carpenter <error27@gmail.com>
Cc: Roman Li <roman.li@amd.com>
Cc: Alex Hung <alex.hung@amd.com>
Cc: Tom Chung <chiahsuan.chung@amd.com>
Cc: Aurabindo Pillai <aurabindo.pillai@amd.com>
Reviewed-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amd/display: Add passive dongle handling in force_to_use_aux case
Matthew Stewart [Wed, 24 Jun 2026 20:34:03 +0000 (16:34 -0400)]
drm/amd/display: Add passive dongle handling in force_to_use_aux case

[why]

Need special handling for passive HDMI dongles with I2C over AUX.

Reviewed-by: Aurabindo Pillai <Aurabindo.Pillai@amd.com>
Signed-off-by: Matthew Stewart <Matthew.Stewart2@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amd/display: Enable zstate support and fix seamless boot
Gabe Teeger [Wed, 10 Jun 2026 15:42:50 +0000 (11:42 -0400)]
drm/amd/display: Enable zstate support and fix seamless boot

[Why & How]
Port seamless boot fix from DCN42 to DCN42B and enable zstate
support for DCN42B.

Reviewed-by: Ovidiu (Ovi) Bunea <ovidiu.bunea@amd.com>
Signed-off-by: Gabe Teeger <gabe.teeger@amd.com>
Signed-off-by: Matthew Stewart <matthew.stewart2@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amd/display: Fix DCN42B null registers & register masks
Matthew Stewart [Thu, 4 Jun 2026 15:36:09 +0000 (11:36 -0400)]
drm/amd/display: Fix DCN42B null registers & register masks

[why]

DCN42B is missing some register masks, which are causing errors in dmesg.

[how]

Make DCN42B reuse the DCN42 register lists, and add the missing defines manually.

Fixes: 64142f9d51af ("drm/amd/display: Fix DCN42 null registers & register masks")
Reviewed-by: Ovidiu (Ovi) Bunea <ovidiu.bunea@amd.com>
Signed-off-by: Matthew Stewart <Matthew.Stewart2@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amd/display: Enable IPS support for DCN4 Variant
Gabe Teeger [Mon, 8 Jun 2026 19:39:04 +0000 (15:39 -0400)]
drm/amd/display: Enable IPS support for DCN4 Variant

[Why]
DCN4 variant had IPS completely disabled via ips_support =
false and dc->config.disable_ips = DMUB_IPS_DISABLE_ALL.
Enabling IPS for D3 allows DMUB to manage idle power savings
when the display subsystem is inactive, reducing platform
power without affecting active display operation.

[How]
In DCN4 variant resource construct:
- Set dc->caps.ips_support = true
- Remove dc->config.disable_ips = DMUB_IPS_DISABLE_ALL override
This enables DMUB to dynamically manage IPS entry/exit during
D3 power state transitions. Also enable zstate by default.

Reviewed-by: Ovidiu (Ovi) Bunea <ovidiu.bunea@amd.com>
Signed-off-by: Gabe Teeger <gabe.teeger@amd.com>
Signed-off-by: Matthew Stewart <matthew.stewart2@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amdgpu/gfx12: fix IP dump alloc ordering
Alex Deucher [Tue, 7 Jul 2026 17:55:25 +0000 (13:55 -0400)]
drm/amdgpu/gfx12: fix IP dump alloc ordering

If gfx sysfs init fails, we may leak the ip dump
allocations.

Reviewed-by: Mukul Joshi <mukul.joshi@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amdgpu/gfx11: fix IP dump alloc ordering
Alex Deucher [Tue, 7 Jul 2026 17:55:14 +0000 (13:55 -0400)]
drm/amdgpu/gfx11: fix IP dump alloc ordering

If gfx sysfs init fails, we may leak the ip dump
allocations.

Reviewed-by: Mukul Joshi <mukul.joshi@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amdgpu/gfx10: fix IP dump alloc ordering
Alex Deucher [Tue, 7 Jul 2026 17:55:01 +0000 (13:55 -0400)]
drm/amdgpu/gfx10: fix IP dump alloc ordering

If gfx sysfs init fails, we may leak the ip dump
allocations.

Reviewed-by: Mukul Joshi <mukul.joshi@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amdgpu/gfx9: fix IP dump alloc ordering
Alex Deucher [Tue, 7 Jul 2026 17:53:26 +0000 (13:53 -0400)]
drm/amdgpu/gfx9: fix IP dump alloc ordering

If gfx sysfs init fails, we may leak the ip dump
allocations.

Reviewed-by: Mukul Joshi <mukul.joshi@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amdgpu/gfx12.1: Add ip dump support
Alex Deucher [Thu, 18 Jun 2026 20:39:46 +0000 (16:39 -0400)]
drm/amdgpu/gfx12.1: Add ip dump support

Add support for dumping IP register state.

v2: fixes suggested by Mukul

Reviewed-by: Mukul Joshi <mukul.joshi@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amdgpu: Change system_unbound_wq with system_dfl_wq
Marco Crivellari [Tue, 7 Jul 2026 09:38:12 +0000 (11:38 +0200)]
drm/amdgpu: Change system_unbound_wq with system_dfl_wq

system_wq (per-CPU) and system_unbound_wq (unbound) are the older
workqueue name, replaced by system_{percpu|dfl}_wq.
The new workqueues have been introduced by:

  128ea9f6ccfb ("workqueue: Add system_percpu_wq and system_dfl_wq")

Usage of older workqueues will now trigger a pr_warn_once() because they are
marked as deprecated as per commit:

  64d8eae3f895 ("workqueue: Add warnings and fallback if system_{unbound}_wq is used")

So change the used workqueue with the newer, keeping the same behavior.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Suggested-by: Tejun Heo <tj@kernel.org>
Signed-off-by: Marco Crivellari <marco.crivellari@suse.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amd/display: Enable PSR and Replay on DCN4 variant [Part 2]
Gabe Teeger [Fri, 5 Jun 2026 20:21:29 +0000 (16:21 -0400)]
drm/amd/display: Enable PSR and Replay on DCN4 variant [Part 2]

[Why]
Enable PSR and Panel Replay on a DCN4 variant for display power
savings.

[How]
Enable PSR and Replay in the DCN4 variant panel config defaults.

Fixes: 68737239e891 ("drm/amd/display: Enable PSR and Replay on DCN4 variant and fix AUX instance")
Reviewed-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Gabe Teeger <gabe.teeger@amd.com>
Signed-off-by: Matthew Stewart <matthew.stewart2@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amd/display: Enable CACP on Linux
Chenyu Chen [Thu, 5 Mar 2026 12:11:50 +0000 (20:11 +0800)]
drm/amd/display: Enable CACP on Linux

[Why]
Enable OLED panels to save more power on the Linux platform by
enabling CACP support on Linux.

[How]
Update abm_feature_support() to return ABM_CACP_SUPPORT for OLED
panels. Enable ABM property for all eDP panels including OLED to
support CACP via set_abm_level.

Reviewed-by: Sun peng (Leo) Li <sunpeng.li@amd.com>
Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amd/display: Generalize DMUB memory flushes from host
Dillon Varone [Tue, 23 Jun 2026 19:42:34 +0000 (15:42 -0400)]
drm/amd/display: Generalize DMUB memory flushes from host

[WHY&HOW]
Add DMUB service context to aid in platform abstraction when
flushing memory from the host.

Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Dillon Varone <Dillon.Varone@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amd/display: Fix KUnit backlight tests for CACP
Alex Hung [Tue, 16 Jun 2026 15:34:09 +0000 (09:34 -0600)]
drm/amd/display: Fix KUnit backlight tests for CACP

[WHY]
A change was added in amdgpu_dm_should_create_sysfs() to
check link->panel_type instead of caps->aux_support, and removed
the OLED exclusion from the ABM property attach path in
amdgpu_dm_setup_backlight_device().

This broke three KUnit tests:
- dm_test_should_create_sysfs_no_backlight_index and
  dm_test_should_create_sysfs_pwm_backlight returned false
  because kzalloc zeroes panel_type but PANEL_TYPE_LCD is 1.
- dm_test_setup_backlight_device_oled_success crashed with a
  NULL pointer dereference in drm_object_attach_property since
  abm_level_property was NULL.

[WHY]
Set panel_type to PANEL_TYPE_LCD in the two sysfs tests and
skip the ABM property attach path in the OLED setup test by
setting amdgpu_dm_abm_level to 0.

Cc: Chenyu Chen <chen-yu.chen@amd.com>
Assisted-by: Copilot:Claude-Opus-4.6
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 months agodrm/amdgpu/discovery: Fix device family for DCN42
Roman Li [Thu, 14 May 2026 01:49:15 +0000 (21:49 -0400)]
drm/amdgpu/discovery: Fix device family for DCN42

GC 11.7.0 and 11.7.1 should map to AMDGPU_FAMILY_GC_11_5_4 for DCN42.

Fixes: cf591e67c095 ("drm/amdgpu: add support for GC IP version 11.7.0")
Fixes: a928d8d81ec5 ("drm/amdgpu: add support for GC IP version 11.7.1")
Signed-off-by: Roman Li <Roman.Li@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>