linux-2.6-microblaze.git
3 years agodrm/amd/display: fix ref count leak in amdgpu_drm_ioctl
Navid Emamdoost [Sun, 14 Jun 2020 07:14:50 +0000 (02:14 -0500)]
drm/amd/display: fix ref count leak in amdgpu_drm_ioctl

in amdgpu_drm_ioctl the call to pm_runtime_get_sync increments the
counter even in case of failure, leading to incorrect
ref count. In case of failure, decrement the ref count before returning.

Signed-off-by: Navid Emamdoost <navid.emamdoost@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu: fix ref count leak in amdgpu_driver_open_kms
Navid Emamdoost [Sun, 14 Jun 2020 07:12:29 +0000 (02:12 -0500)]
drm/amdgpu: fix ref count leak in amdgpu_driver_open_kms

in amdgpu_driver_open_kms the call to pm_runtime_get_sync increments the
counter even in case of failure, leading to incorrect
ref count. In case of failure, decrement the ref count before returning.

Signed-off-by: Navid Emamdoost <navid.emamdoost@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/radeon: fix multiple reference count leak
Aditya Pakki [Sun, 14 Jun 2020 01:55:39 +0000 (20:55 -0500)]
drm/radeon: fix multiple reference count leak

On calling pm_runtime_get_sync() the reference count of the device
is incremented. In case of failure, decrement the
reference count before returning the error.

Signed-off-by: Aditya Pakki <pakki001@umn.edu>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu/gfx9: Fix incorrect firmware size calculation
Lei Guo [Tue, 16 Jun 2020 14:03:27 +0000 (10:03 -0400)]
drm/amdgpu/gfx9: Fix incorrect firmware size calculation

[WHY]
The memcpy() function copies n bytes from memory area src to memory area
dest. So specify the firmware size in bytes.

[How]
Correct the calculation.

Acked-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Lei Guo <raykwok1150@163.com>
Reviewed-by: Junwei Zhang <zjunweihit@163.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu: fix documentation around busy_percentage
Alex Deucher [Mon, 15 Jun 2020 20:36:49 +0000 (16:36 -0400)]
drm/amdgpu: fix documentation around busy_percentage

Add rename the gpu busy percentage for consistency and
add the mem busy percentage documentation.

Reviewed-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Nirmoy Das <nirmoy.das@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu/pm: update comment to clarify Overdrive interfaces
Alex Deucher [Mon, 15 Jun 2020 18:29:55 +0000 (14:29 -0400)]
drm/amdgpu/pm: update comment to clarify Overdrive interfaces

Vega10 and previous asics use one interface, vega20 and newer
use another.

Reviewed-by: Evan Quan <evan.quan@amd.com>
Acked-by: Nirmoy Das <nirmoy.das@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdkfd: Fix reference count leaks.
Qiushi Wu [Sat, 13 Jun 2020 19:32:26 +0000 (14:32 -0500)]
drm/amdkfd: Fix reference count leaks.

kobject_init_and_add() takes reference even when it fails.
If this function returns an error, kobject_put() must be called to
properly clean up the memory associated with the object.

Signed-off-by: Qiushi Wu <wu000273@umn.edu>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdkfd: Add eviction debug messages
Felix Kuehling [Fri, 12 Jun 2020 03:19:37 +0000 (23:19 -0400)]
drm/amdkfd: Add eviction debug messages

Use WARN to print messages with backtrace when evictions are triggered.
This can help determine the root cause of evictions and help spot driver
bugs triggering evictions unintentionally, or help with performance tuning
by avoiding conditions that cause evictions in a specific workload.

The messages are controlled by a new module parameter that can be changed
at runtime:

  echo Y > /sys/module/amdgpu/parameters/debug_evictions
  echo N > /sys/module/amdgpu/parameters/debug_evictions

Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Philip Yang <Philip.Yang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/amdgpu: Fix SQ_DEBUG_STS_GLOBAL* registers
Tom St Denis [Mon, 15 Jun 2020 16:17:46 +0000 (12:17 -0400)]
drm/amd/amdgpu:  Fix SQ_DEBUG_STS_GLOBAL* registers

Forgot to subtract the SOC15 IP offsetand add the BASE_IDX values.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/display: Get num_chans from VBIOS table
Alvin Lee [Thu, 11 Jun 2020 20:37:13 +0000 (16:37 -0400)]
drm/amd/display: Get num_chans from VBIOS table

Get the values from VBIOS table

Signed-off-by: Alvin Lee <alvin.lee2@amd.com>
Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Reviewed-by: Hersen Wu <hersenxs.wu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd: add missing fill of the array`s first element
Bernard Zhao [Fri, 12 Jun 2020 11:58:48 +0000 (19:58 +0800)]
drm/amd: add missing fill of the array`s first element

In function fill_iram_v_2, the ram_table->bright_neg_gain`s
first element [0][0] seems to be missing. This change is just
to make the code a bit readable.

Signed-off-by: Bernard Zhao <bernard@vivo.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu: Reconfigure ULV for gfx9 server SKUs
Joseph Greathouse [Wed, 10 Jun 2020 18:48:56 +0000 (13:48 -0500)]
drm/amdgpu: Reconfigure ULV for gfx9 server SKUs

SDMA ULV can benefit low-power modes, but can sometimes cause
latency increases in small SDMA transfers. Server SKUs have a
different trade-off space in this domain, so this configures
the server SKUs' ULV hysteresis times differently than consumer
SKUs'.

Signed-off-by: Joseph Greathouse <Joseph.Greathouse@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdkfd: Use correct major in devcgroup check
Lorenz Brun [Thu, 11 Jun 2020 20:11:21 +0000 (22:11 +0200)]
drm/amdkfd: Use correct major in devcgroup check

The existing code used the major version number of the DRM driver
instead of the device major number of the DRM subsystem for
validating access for a devices cgroup.

This meant that accesses allowed by the devices cgroup weren't
permitted and certain accesses denied by the devices cgroup were
permitted (if they matched the wrong major device number).

Signed-off-by: Lorenz Brun <lorenz@brun.one>
Fixes: 6b855f7b83d2f ("drm/amdkfd: Check against device cgroup")
Reviewed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/display: 3.2.89
Aric Cyr [Mon, 1 Jun 2020 15:49:54 +0000 (11:49 -0400)]
drm/amd/display: 3.2.89

Signed-off-by: Aric Cyr <aric.cyr@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/display: [FW Promotion] Release 1.0.15
Anthony Koo [Fri, 29 May 2020 21:48:12 +0000 (17:48 -0400)]
drm/amd/display: [FW Promotion] Release 1.0.15

[Header Changes]
- Add new initialization bits for driver to check
  firmware status
- Add command for HW locking via DMUB

Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/display: Not doing bios data pack.
Yongqiang Sun [Fri, 29 May 2020 17:05:11 +0000 (13:05 -0400)]
drm/amd/display: Not doing bios data pack.

[Why]
dmub FW running abnormal after resume from S0i3 due
to data aliagnment issue.

[How]
Before having a solution for this issue, temparory
not doing data pack.

Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Sung Lee <Sung.Lee@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/display: not reset dmub in driver.
Yongqiang Sun [Wed, 27 May 2020 17:57:55 +0000 (13:57 -0400)]
drm/amd/display: not reset dmub in driver.

[Why]
during S0i3, set power state is toggled a few times,
and dmub uC will restart with current reset/hw_init.

[How]
Remove reset in set power state, and before doing hw_init,
check if dmub is enabled, and doing FW autoload check only
if dmub is already enabled.

Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/display: Disable pipe split for modes with borders
Dale Zhao [Fri, 29 May 2020 08:57:02 +0000 (16:57 +0800)]
drm/amd/display: Disable pipe split for modes with borders

[Why]
For some special timing with border, like DMT 640*480 72Hz,
pipe split can't handle well. Thus, it will be black screen
for these special timing.

[How]
Disable pipe split for these timing with borders as W/A.

Signed-off-by: Dale Zhao <dale.zhao@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/display: change global buffer to local buffer
Lewis Huang [Wed, 20 May 2020 10:03:05 +0000 (18:03 +0800)]
drm/amd/display: change global buffer to local buffer

[Why]
Multi-adapter calculate regamma table at the same time.
Two thread used the same global variable cause race
condition.

[How]
Change global buffer to local buffer

Signed-off-by: Lewis Huang <Lewis.Huang@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/display: Improve DisplayPort monitor interop
Aric Cyr [Tue, 26 May 2020 17:56:53 +0000 (13:56 -0400)]
drm/amd/display: Improve DisplayPort monitor interop

[Why]
DC is very fast at link training and stream enablement
which causes issues such as blackscreens for non-compliant
monitors.

[How]
After debugging with scaler vendors we implement the
minimum delays at the necessary locations to ensure
the monitor does not hang.  Delays are generic due to
lack of IEEE OUI information on the failing displays.

Signed-off-by: Aric Cyr <aric.cyr@amd.com>
Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Acked-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/display: Enable use of dmub iff dmcu is disabled
Aurabindo Pillai [Tue, 26 May 2020 19:55:06 +0000 (15:55 -0400)]
drm/amd/display: Enable use of dmub iff dmcu is disabled

[Why & How]
DMUB command table should be allowed to be used
only if dmcu is explicitly disabled.

Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/display: make calculate watermarks a function pointer
Dmytro Laktyushkin [Wed, 27 May 2020 14:34:38 +0000 (10:34 -0400)]
drm/amd/display: make calculate watermarks a function pointer

To allow code reuse with minimal duplication watermark
calculation needs to be function pointer.

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Eric Bernstein <Eric.Bernstein@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/display: Add helper to convert DC status
Rodrigo Siqueira [Tue, 26 May 2020 20:53:38 +0000 (16:53 -0400)]
drm/amd/display: Add helper to convert DC status

During the debugging process related to a hot-plug
problem with 4k display, we realized that we had
some issues related to the global state validation.
This problem was not explicitly highlighted in the
dmesg log, for this reason, this commit adds a function
that converts `enum dc_status` to a human-readable
string and appends the proper warning message in case
of failure.

Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/display: add support for per-state dummy-pstate latency
Jun Lei [Tue, 26 May 2020 15:17:53 +0000 (11:17 -0400)]
drm/amd/display: add support for per-state dummy-pstate latency

[why]
Dummy pstate latency actually varies between different
UCLK frequencies, when calculating watermark C, if DAL
always assumes worst case, then it can lead to dummy
pstate not supported scenarios.

[how]
Rather than statically calculating dummy pstate using
worst case, we store the entire table of UCLK to dummy
pstate relationships.  On a per mode basis, we calculate
the actual UCLK lower limit, and use the dynamic worst
case dummy pstate latency.  This prevents the situation
where we don't support full p-state (which will force
high DPM), but still use low DPM dummy pstate latency.

Signed-off-by: Jun Lei <jun.lei@amd.com>
Reviewed-by: Joshua Aberback <Joshua.Aberback@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/display: Revert "DP link layer test 4.2.1.1 fix due to specs update"
Wenjing Liu [Mon, 25 May 2020 17:45:22 +0000 (13:45 -0400)]
drm/amd/display: Revert "DP link layer test 4.2.1.1 fix due to specs update"

[why]
The change causes some regression in a common use case.
Will need more investigation before fixing the original issue.

[how]
This reverts commit fb8cf277b16d3f8b16941d217f7bae4ed7e73bea.

Signed-off-by: Wenjing Liu <wenjing.liu@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/display: remove unnecessary mpcc updates
Dmytro Laktyushkin [Fri, 22 May 2020 15:36:27 +0000 (11:36 -0400)]
drm/amd/display: remove unnecessary mpcc updates

We were updating mpcc if there were tree changes which
is unnecessary since any mpcc being added or removed
will automatically update the tree.

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Eric Bernstein <Eric.Bernstein@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/display: runtime select dmub emulatior.
Yongqiang Sun [Mon, 18 May 2020 22:36:47 +0000 (18:36 -0400)]
drm/amd/display: runtime select dmub emulatior.

[Why & How]
Add emul specific hw function to dmub, in case of
emulator is created, we can runtime switch between
dmub emulator or dmub uC via is_virtual flag in dmub.

Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/display: Passing initial SDP deadline to dmub
po-tchen [Fri, 22 May 2020 03:46:34 +0000 (11:46 +0800)]
drm/amd/display: Passing initial SDP deadline to dmub

[Why]
The SDP deadline indicate the vertical time to send CRC
infopacket in PSR.

Signed-off-by: po-tchen <po-ting.chen@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/display: Force delay after DP receive power up
Martin Tsai [Fri, 22 May 2020 07:50:11 +0000 (15:50 +0800)]
drm/amd/display: Force delay after DP receive power up

[Why]
Some sprcified monitor scalar cannot recognize timing
change on demand. Once the link phy disable and enable
during a short period then the Sink protection mechanism
could keep the screen in blank and cannot be recoverred.

[How]
To add 100ms delay between enable link phy and link training.

Signed-off-by: Martin Tsai <martin.tsai@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/display: 3.2.88
Aric Cyr [Mon, 25 May 2020 04:02:07 +0000 (00:02 -0400)]
drm/amd/display: 3.2.88

Signed-off-by: Aric Cyr <aric.cyr@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/display: [FW Promotion] Release 1.0.14
Anthony Koo [Fri, 22 May 2020 21:48:23 +0000 (17:48 -0400)]
drm/amd/display: [FW Promotion] Release 1.0.14

[Header Changes]
       - Add SDP transmission deadline for PSR config cmd

Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/display: update audio wall clock programming
Charlene Liu [Fri, 22 May 2020 15:29:36 +0000 (11:29 -0400)]
drm/amd/display: update audio wall clock programming

[why]
for audio on real TV issue.

[how]
-add wall clock programming for DPREF based when
Pixel clock is done by DP DTO.

Signed-off-by: Charlene Liu <Charlene.Liu@amd.com>
Reviewed-by: Chris Park <Chris.Park@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/display: Fix VBA chroma calculation for pipe splitting
Nicholas Kazlauskas [Fri, 22 May 2020 17:24:06 +0000 (13:24 -0400)]
drm/amd/display: Fix VBA chroma calculation for pipe splitting

[Why]
DML failures occur for 420 modes with dynamic pipe
splitting enabled because the ChromaViewport exceeds
the ChromaSurfaceWidth.

This is caused by adding the viewport_width instead
of the viewport_width_c.

This similarly occurs for rotated modes due to the
use of viewport_height instead of viewport_height_c.

[How]
Correct the calculations.

Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/display: Revert "enable plane if plane_status changed"
Hugo Hu [Wed, 20 May 2020 04:31:19 +0000 (12:31 +0800)]
drm/amd/display: Revert "enable plane if plane_status changed"

This reverts commmit fd0293dd5b68a67a8731d54a6b334945e4e95757.

Signed-off-by: Hugo Hu <hugo.hu@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/display: Remove unused macro from dcn21
Roman Li [Wed, 29 Apr 2020 14:54:21 +0000 (10:54 -0400)]
drm/amd/display: Remove unused macro from dcn21

[Why]
SOC_BOUNDING_BOX_VALID is unused and not required for dcn21.

[How]
Remove it.

Signed-off-by: Roman Li <Roman.Li@amd.com>
Reviewed-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/display: Use u16 for drm_bpp in DSC calculations
Nicholas Kazlauskas [Thu, 21 May 2020 16:32:45 +0000 (12:32 -0400)]
drm/amd/display: Use u16 for drm_bpp in DSC calculations

[Why]
DSC calculations fail because the u16 bits_per_pixel from
the DRM struct is being casted to the u8 drm_bpp parameters
and locals. Integer wraparound is happening because this
value is greater than 255.

[How]
Use u16 to match what's in the structure instead of u8.

Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/display: Move call to disable DPG
Wesley Chalmers [Wed, 20 May 2020 19:32:31 +0000 (15:32 -0400)]
drm/amd/display: Move call to disable DPG

[WHY]
Disabling DPG should happen after setting watermarks and clocks

Signed-off-by: Wesley Chalmers <wchalmer@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/display: [FW Promotion] Release 1.0.13
Anthony Koo [Wed, 20 May 2020 14:38:44 +0000 (10:38 -0400)]
drm/amd/display: [FW Promotion] Release 1.0.13

[Header Changes]
       - Version bump to 1.0.13

Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/display: Fix incorrect dcn1 bandwidth calculations
Michael Strauss [Fri, 8 May 2020 17:04:23 +0000 (13:04 -0400)]
drm/amd/display: Fix incorrect dcn1 bandwidth calculations

[WHY]
Typos cause bandwidth calculation errors, one
of which can cause infinite loop on dcn1 with eDP

Signed-off-by: Michael Strauss <michael.strauss@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/display: Rework dsc to isolate FPU operations
Rodrigo Siqueira [Wed, 29 Apr 2020 14:53:02 +0000 (10:53 -0400)]
drm/amd/display: Rework dsc to isolate FPU operations

When we want to use float point operation on Linux
we need to use within special kernel protection
(`kernel_fpu_{begin,end}()`.), otherwise the kernel
can clobber userspace FPU register state. For detecting
these issues we use a tool named objtool (with -Ffa
flags) to highlight the FPU problems, all warnings can
be summed up as follows:

./tools/objtool/objtool check -Ffa
drivers/gpu/drm/amd/display/dc/dml/dml_common_defs.o

[..] dc/dsc/rc_calc.o: warning: objtool: get_qp_set()+0x2f8:
FPU instruction outside of kernel_fpu_{begin,end}()
[..] dc/dsc/rc_calc.o: warning: objtool: dsc_roundf()+0x5:
FPU instruction outside of kernel_fpu_{begin,end}()
[..] dc/dsc/rc_calc.o: warning: objtool: dsc_ceil()+0x5:
FPU instruction outside of kernel_fpu_{begin,end}()
[..] dc/dsc/rc_calc.o: warning: objtool: get_ofs_set()+0x3eb:
FPU instruction outside of kernel_fpu_{begin,end}()
[..] dc/dsc/rc_calc.o: warning: objtool: calc_rc_params()+0x3c:
FPU instruction outside of kernel_fpu_{begin,end}()
[..] dc/dsc/dc_dsc.o: warning: objtool:
get_dsc_bandwidth_range.isra.0()+0x8d:
FPU instruction outside of kernel_fpu_{begin,end}()
[..] dc/dsc/dc_dsc.o: warning: objtool: setup_dsc_config()+0x2ef:
FPU instruction outside of kernel_fpu_{begin,end}()
[..] dc/dsc/rc_calc_dpi.o: warning: objtool:copy_pps_fields()+0xbb:
FPU instruction outside of kernel_fpu_{begin,end}()
[..] dc/dsc/rc_calc_dpi.o: warning: objtool:
dscc_compute_dsc_parameters()+0x7b:
FPU instruction outside of kernel_fpu_{begin,end}()

This commit fixes the above issues by rework DSC as described:

1. Isolate all FPU operations in a single file;
2. Use FPU flags only in the file that handles FPU operations;
3. Isolate all functions that require float point operation in static
   functions;
4. Add a mid-layer function that does not use any float point operation,
   and that could be safely invoked in other parts of the code.
5. Keep float point operation under DC_FP_{START/END} macro.

CC: Christian König <christian.koenig@amd.com>
CC: Alexander Deucher <Alexander.Deucher@amd.com>
CC: Peter Zijlstra <peterz@infradead.org>
CC: Tony Cheng <tony.cheng@amd.com>
CC: Harry Wentland <hwentlan@amd.com>
Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Reviewed-by: Mikita Lipski <Mikita.Lipski@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/display: correct alpha_en programming for new pixel format
Charlene Liu [Tue, 19 May 2020 19:35:58 +0000 (15:35 -0400)]
drm/amd/display: correct alpha_en programming for new pixel format

[why]
for following new format, no alpha
       SURFACE_PIXEL_FORMAT_GRPH_RGB111110_FLOAT/_FIX:
       SURFACE_PIXEL_FORMAT_GRPH_BGR101111_FLOAT/_FIX
       same as case SURFACE_PIXEL_FORMAT_GRPH_ARGB1555:

Signed-off-by: Charlene Liu <Charlene.Liu@amd.com>
Reviewed-by: Chris Park <Chris.Park@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/amdgpu: Add SQ_DEBUG_STS_GLOBAL* registers/bits
Tom St Denis [Thu, 11 Jun 2020 11:54:13 +0000 (07:54 -0400)]
drm/amd/amdgpu: Add SQ_DEBUG_STS_GLOBAL* registers/bits

Even though they are technically MMIO registers I put the bits with the sqind block
for organizational purposes.

Requested for UMR debugging.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu/jpeg: fix race condition issue for jpeg start
James Zhu [Wed, 10 Jun 2020 16:10:20 +0000 (12:10 -0400)]
drm/amdgpu/jpeg: fix race condition issue for jpeg start

Fix race condition issue when multiple jpeg starts are called.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Acked-by: Nirmoy Das <nirmoy.das@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu/sriov: Need to clear kiq position
Emily Deng [Thu, 11 Jun 2020 06:09:16 +0000 (14:09 +0800)]
drm/amdgpu/sriov: Need to clear kiq position

As will clear vf fw during unload driver, to avoid idle fail. Need
to clear KIQ portion also.

Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Ack-by: Monk.liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu/sriov: Disable pm for multiple vf sriov
Emily Deng [Thu, 11 Jun 2020 03:40:05 +0000 (11:40 +0800)]
drm/amdgpu/sriov: Disable pm for multiple vf sriov

Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Ack-by: Monk.liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu/sriov: Add clear vf fw support
Emily Deng [Thu, 11 Jun 2020 03:36:04 +0000 (11:36 +0800)]
drm/amdgpu/sriov: Add clear vf fw support

Guest VM issue the PSP clear_vf_fw command at 2 points:
1.On VF driver loading, after VF message PSP to setup rings,
the next command is “clear_vf_fw”
2.On VF driver unload before VF message to
destroy rings

Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Ack-by: Monk.liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu: fix the nullptr issue as for PWR IP not existing in discovery table
Prike.Liang [Fri, 5 Jun 2020 09:53:56 +0000 (17:53 +0800)]
drm/amdgpu: fix the nullptr issue as for PWR IP not existing in discovery table

Fixes: c1cf79ca5ced46 ("drm/amdgpu: use IP discovery table for renoir")

This nullptr issue should be specific on the Renoir series during try access the PWR_MISC_CNTL_STATUS
when PWR IP not been detected by discovery table. Moreover the PWR IP not existing in Renoir series is
expected therefore just avoid access PWR register in Renoir series.

Signed-off-by: Prike.Liang <Prike.Liang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu: Replace invalid device ID with a valid device ID
Sandeep Raghuraman [Wed, 10 Jun 2020 20:06:26 +0000 (01:36 +0530)]
drm/amdgpu: Replace invalid device ID with a valid device ID

Initializes Powertune data for a specific Hawaii card by fixing what
looks like a typo in the code. The device ID 66B1 is not a supported
device ID for this driver, and is not mentioned elsewhere. 67B1 is a
valid device ID, and is a Hawaii Pro GPU.

I have tested on my R9 390 which has device ID 67B1, and it works
fine without problems.

Signed-off-by: Sandeep Raghuraman <sandy.8925@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu: Fix a buffer overflow handling the serial number
Dan Carpenter [Wed, 10 Jun 2020 08:56:53 +0000 (11:56 +0300)]
drm/amdgpu: Fix a buffer overflow handling the serial number

The comments say that the serial number is a 16-digit HEX string so the
buffer needs to be at least 17 characters to hold the NUL terminator.

The other issue is that "size" returned from sprintf() is the number of
characters before the NUL terminator so the memcpy() wasn't copying the
terminator.  The serial number needs to be NUL terminated so that it
doesn't lead to a read overflow in amdgpu_device_get_serial_number().
Also it's just cleaner and faster to sprintf() directly to adev->serial[]
instead of using a temporary buffer.

Fixes: 81a16241114b ("drm/amdgpu: Add unique_id and serial_number for Arcturus v3")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
3 years agodrm/amd/powerplay: maximum code sharing on sensor reading
Evan Quan [Tue, 9 Jun 2020 04:25:07 +0000 (12:25 +0800)]
drm/amd/powerplay: maximum code sharing on sensor reading

Move the common code to amdgpu_smu.c instead of having one
copy in both smu_v11_0.c and smu_v12_0.c.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/powerplay: revise the calling chain on sensor reading
Evan Quan [Tue, 9 Jun 2020 04:16:56 +0000 (12:16 +0800)]
drm/amd/powerplay: revise the calling chain on sensor reading

Update the calling chain from "amdgpu_smu.c -> ${asic}_ppt.c ->
smu_v11/12_0.c -> amdgpu_smu.c (smu_common_read_sensor())" to "
"amdgpu_smu.c -> ${asic}_ppt.c -> smu_v11/12_0.c". This can help
to maintain clear code layers. More similar changes will be coming.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/powerplay: drop unnecessary SMU_MSG_GetDpmClockFreq check
Evan Quan [Tue, 9 Jun 2020 04:03:58 +0000 (12:03 +0800)]
drm/amd/powerplay: drop unnecessary SMU_MSG_GetDpmClockFreq check

Since SMU_MSG_GetDpmClockFreq is known to be supported for Vega20
and before ASICs only. For those ASICs supporting swSMU, it is not
supported.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/powerplay: drop unnecessary wrapper .populate_smc_tables
Evan Quan [Mon, 8 Jun 2020 11:49:08 +0000 (19:49 +0800)]
drm/amd/powerplay: drop unnecessary wrapper .populate_smc_tables

Since .populate_smc_tables is just a wrapper of .set_default_dpm_table.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/powerplay: drop redundant .set_min_dcefclk_deep_sleep API (v2)
Evan Quan [Mon, 8 Jun 2020 11:31:03 +0000 (19:31 +0800)]
drm/amd/powerplay: drop redundant .set_min_dcefclk_deep_sleep API (v2)

It has exactly the same functionality as .set_deep_sleep_dcefclk.

V2: correct the macro name for better trace

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd: correct trivial kernel-doc inconsistencies
Colton Lewis [Tue, 9 Jun 2020 00:39:15 +0000 (00:39 +0000)]
drm/amd: correct trivial kernel-doc inconsistencies

Silence documentation warnings by correcting kernel-doc comments.

./drivers/gpu/drm/amd/amdgpu/amdgpu_device.c:3388: warning: Excess function parameter 'suspend' description in 'amdgpu_device_suspend'
./drivers/gpu/drm/amd/amdgpu/amdgpu_device.c:3485: warning: Excess function parameter 'resume' description in 'amdgpu_device_resume'
./drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c:418: warning: Excess function parameter 'tbo' description in 'amdgpu_vram_mgr_del'
./drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c:418: warning: Excess function parameter 'place' description in 'amdgpu_vram_mgr_del'
./drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c:279: warning: Excess function parameter 'tbo' description in 'amdgpu_gtt_mgr_del'
./drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c:279: warning: Excess function parameter 'place' description in 'amdgpu_gtt_mgr_del'
./drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h:332: warning: Function parameter or member 'hdcp_workqueue' not described in 'amdgpu_display_manager'
./drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h:332: warning: Function parameter or member 'cached_dc_state' not described in 'amdgpu_display_manager'

Signed-off-by: Colton Lewis <colton.w.lewis@protonmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/amdgpu: Add SQ debug registers to GFX9/GFX10 headers (v2)
Tom St Denis [Tue, 9 Jun 2020 11:49:59 +0000 (07:49 -0400)]
drm/amd/amdgpu: Add SQ debug registers to GFX9/GFX10 headers (v2)

Requested for UMR support.

(v2): Also add reg/bits for gfx9 headers

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/amdgpu: handle return value of amdgpu_driver_load_kms
Liu ChengZhe [Tue, 9 Jun 2020 08:44:43 +0000 (16:44 +0800)]
drm/amd/amdgpu: handle return value of amdgpu_driver_load_kms

if guest driver failed to enter full GPU access, amdgpu_driver_load_kms
will unload kms and free dev->dev_private, drm_dev_register would access
null pointer. Driver will enter an error state and can't be unloaded.

Signed-off-by: Liu ChengZhe <ChengZhe.Liu@amd.com>
Reviewed-by: Madhav Chauhan <madhav.chauhan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/powerplay: move maximum sustainable clock retrieving to .hw_init
Evan Quan [Mon, 8 Jun 2020 10:04:42 +0000 (18:04 +0800)]
drm/amd/powerplay: move maximum sustainable clock retrieving to .hw_init

Since DAL settings come between .hw_init and .late_init of SMU. And
DAL needs to know the maximum sustainable clocks.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reported-and-Tested-by: Flora Cui <flora.cui@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/powerplay: add check for power limit OD support
Evan Quan [Mon, 8 Jun 2020 10:33:38 +0000 (18:33 +0800)]
drm/amd/powerplay: add check for power limit OD support

Before counting the OD percent into max power limit margin.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/powerplay: correct power limit retrieving based on current power source
Evan Quan [Mon, 8 Jun 2020 09:33:03 +0000 (17:33 +0800)]
drm/amd/powerplay: correct power limit retrieving based on current power source

Instead of hard coding it as SMU_POWER_SOURCE_AC.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/powerplay: drop unused code around power limit
Evan Quan [Mon, 8 Jun 2020 09:04:04 +0000 (17:04 +0800)]
drm/amd/powerplay: drop unused code around power limit

Drop unused APIs, variables and argument.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/powerplay: simplify the code around setting power limit
Evan Quan [Mon, 8 Jun 2020 08:47:59 +0000 (16:47 +0800)]
drm/amd/powerplay: simplify the code around setting power limit

Use the cached max/current power limit and move the input check
to the top layer.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/powerplay: simplify the code around retrieving power limit
Evan Quan [Mon, 8 Jun 2020 08:41:16 +0000 (16:41 +0800)]
drm/amd/powerplay: simplify the code around retrieving power limit

Use the cached max/current power limit for other cases except
.late_init.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/powerplay: maximize code sharing around power limit
Evan Quan [Mon, 8 Jun 2020 08:29:41 +0000 (16:29 +0800)]
drm/amd/powerplay: maximize code sharing around power limit

Also cache the current and max power limits.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/powerplay: drop unnecessary get_pptable_power_limit wrappers
Evan Quan [Mon, 8 Jun 2020 06:34:50 +0000 (14:34 +0800)]
drm/amd/powerplay: drop unnecessary get_pptable_power_limit wrappers

Minor code cleanup.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/powerplay: correct the APIs' naming
Evan Quan [Fri, 5 Jun 2020 10:28:58 +0000 (18:28 +0800)]
drm/amd/powerplay: correct the APIs' naming

'UVD' is a HW engine name for Vega20 and before ASICs.
For newer ASICs, the similar engine is named as 'VCN'.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/powerplay: drop unnecessary wrappers
Evan Quan [Fri, 5 Jun 2020 10:09:47 +0000 (18:09 +0800)]
drm/amd/powerplay: drop unnecessary wrappers

These APIs are used in amdgpu_smu.c only. Thus these wrappers
are unnecessary.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/powerplay: drop dead vce powergate code
Evan Quan [Fri, 5 Jun 2020 10:02:31 +0000 (18:02 +0800)]
drm/amd/powerplay: drop dead vce powergate code

This was for Vega20. However Vega20 support is
already dropped from current swSMU.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/powerplay: add error messages on some critical paths
Evan Quan [Fri, 5 Jun 2020 09:52:51 +0000 (17:52 +0800)]
drm/amd/powerplay: add error messages on some critical paths

Helpful for error diagnostic.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/powerplay: forbid to use pr_err/warn/info/debug
Evan Quan [Fri, 5 Jun 2020 07:37:16 +0000 (15:37 +0800)]
drm/amd/powerplay: forbid to use pr_err/warn/info/debug

Use dev_err/warn/info/dbg instead. They are more MGPU friendly.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/powerplay: use MGPU friendly err/warn/info/dbg messages
Evan Quan [Fri, 5 Jun 2020 07:27:57 +0000 (15:27 +0800)]
drm/amd/powerplay: use MGPU friendly err/warn/info/dbg messages

Use dev_err/warn/info/dbg instead of pr_err/warn/info/debug.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu/soc15: fix nullptr issue in soc15_read_register() for reg base accessing
Prike.Liang [Mon, 8 Jun 2020 07:20:56 +0000 (15:20 +0800)]
drm/amdgpu/soc15: fix nullptr issue in soc15_read_register() for reg base accessing

The failed case is no SDMA1 IP for Renoir discovery table while in accessing SDMA1 reg base,
thus need have nullptr test for soc15_read_register invoked in MMR addres space inquire opt.

Signed-off-by: Prike.Liang <Prike.Liang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/display: Fix indenting in dcn30_set_output_transfer_func()
Dan Carpenter [Mon, 8 Jun 2020 14:16:57 +0000 (17:16 +0300)]
drm/amd/display: Fix indenting in dcn30_set_output_transfer_func()

These lines are a part of the if statement and they are supposed to
be indented one more tab.

Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/display: Use kfree() to free rgb_user in calculate_user_regamma_ramp()
Denis Efremov [Fri, 5 Jun 2020 17:37:44 +0000 (20:37 +0300)]
drm/amd/display: Use kfree() to free rgb_user in calculate_user_regamma_ramp()

Use kfree() instead of kvfree() to free rgb_user in
calculate_user_regamma_ramp() because the memory is allocated with
kcalloc().

Signed-off-by: Denis Efremov <efremov@linux.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/display: Use kvfree() to free coeff in build_regamma()
Denis Efremov [Fri, 5 Jun 2020 17:37:43 +0000 (20:37 +0300)]
drm/amd/display: Use kvfree() to free coeff in build_regamma()

Use kvfree() instead of kfree() to free coeff in build_regamma()
because the memory is allocated with kvzalloc().

Fixes: e752058b8671 ("drm/amd/display: Optimize gamma calculations")
Cc: stable@vger.kernel.org
Signed-off-by: Denis Efremov <efremov@linux.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu: skip BAR resizing if the bios already did it
Alex Deucher [Mon, 8 Jun 2020 19:39:33 +0000 (15:39 -0400)]
drm/amdgpu: skip BAR resizing if the bios already did it

No need to do it again.

Acked-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/powerplay: use the same interval as PMFW on retrieving metrics table
Evan Quan [Thu, 4 Jun 2020 08:27:13 +0000 (16:27 +0800)]
drm/amd/powerplay: use the same interval as PMFW on retrieving metrics table

Current 100ms interval makes no sense. User gets outdated
data due to this.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/powerplay: update how to use metrics table on Sienna Cichlid
Evan Quan [Thu, 4 Jun 2020 10:28:34 +0000 (18:28 +0800)]
drm/amd/powerplay: update how to use metrics table on Sienna Cichlid

Retrieve only those data interested instead of the whole table.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/powerplay: update how to use metrics table on Navi10
Evan Quan [Thu, 4 Jun 2020 07:37:22 +0000 (15:37 +0800)]
drm/amd/powerplay: update how to use metrics table on Navi10

Retrieve only those data interested instead of the whole table.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/powerplay: update how to use metrics table on Arcturus
Evan Quan [Tue, 2 Jun 2020 09:48:11 +0000 (17:48 +0800)]
drm/amd/powerplay: update how to use metrics table on Arcturus

Retrieve only those interested metrics data instead of the whole
metrics table. By this, the memory copy can be dropped.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/display: drop duplicated .dsc_pg_control for dcn30
Flora Cui [Fri, 5 Jun 2020 07:12:24 +0000 (15:12 +0800)]
drm/amd/display: drop duplicated .dsc_pg_control for dcn30

There're 2 .dsc_pg_control, drop the first one.
.dsc_pg_control = NULL,
.dsc_pg_control = dcn20_dsc_pg_control,

Signed-off-by: Flora Cui <flora.cui@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/display: drop duplicated structure
Flora Cui [Fri, 5 Jun 2020 06:13:26 +0000 (14:13 +0800)]
drm/amd/display: drop duplicated structure

struct gpu_info_voltage_scaling_v1_0 & gpu_info_soc_bounding_box_v1_0 is
defined in amdgpu_socbb.h

Signed-off-by: Flora Cui <flora.cui@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/powerplay: update driver if file for sienna_cichlid
Likun Gao [Wed, 3 Jun 2020 04:33:18 +0000 (12:33 +0800)]
drm/amd/powerplay: update driver if file for sienna_cichlid

Update sienna_cichlid driver if header file to match pptable changes.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/powerplay: update powerplay table for sienna_cichlid
Likun Gao [Tue, 2 Jun 2020 09:15:20 +0000 (17:15 +0800)]
drm/amd/powerplay: update powerplay table for sienna_cichlid

Update powerplay table for sienna_cichlid, add set_thermal_range and
get_max_power_limit function for sienna_cichlid.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/powerplay: add smu v11_0_7 pptable
Likun Gao [Tue, 2 Jun 2020 09:11:58 +0000 (17:11 +0800)]
drm/amd/powerplay: add smu v11_0_7 pptable

Add smu_v11_0_7_pptable.h for sienna_cichlid.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/powerplay: move powerplay table operation out of smu_v11_0.c
Likun Gao [Tue, 2 Jun 2020 08:29:08 +0000 (16:29 +0800)]
drm/amd/powerplay: move powerplay table operation out of smu_v11_0.c

move smu_v11_0_get_max_power_limit and smu_v11_0_set_thermal_range
function from smu_v11_0.c to asic specific _ppt.c to avoid powerplay
table conflict with different ASIC with smu11.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu: support reserve bad page for virt (v3)
Stanley.Yang [Thu, 14 May 2020 08:44:42 +0000 (16:44 +0800)]
drm/amdgpu: support reserve bad page for virt (v3)

v1: rename some functions name, only init ras error handler data for
    supported asic.

v2: fix potential memory leak.

Signed-off-by: Stanley.Yang <Stanley.Yang@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/powerplay: use work queue to perform throttling logging
Evan Quan [Wed, 3 Jun 2020 03:45:49 +0000 (11:45 +0800)]
drm/amd/powerplay: use work queue to perform throttling logging

As IO operations(access to SMU internals) and possible sleep are
involved in throttling logging. Workqueue can handle them well.
Otherwise we may hit "scheduling while atomic" error.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Nirmoy Das <nirmoy.das@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/powerplay: skip BACO feature on DPMs disablement
Evan Quan [Mon, 1 Jun 2020 10:31:20 +0000 (18:31 +0800)]
drm/amd/powerplay: skip BACO feature on DPMs disablement

Instead of disabling and reenabling it later.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/powerplay: add firmware cleanup on sw_fini
Evan Quan [Mon, 1 Jun 2020 06:03:57 +0000 (14:03 +0800)]
drm/amd/powerplay: add firmware cleanup on sw_fini

To avoid possible memory leak.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/powerplay: move amdgpu_irq_src to the smu structure allocation
Evan Quan [Mon, 1 Jun 2020 05:08:56 +0000 (13:08 +0800)]
drm/amd/powerplay: move amdgpu_irq_src to the smu structure allocation

Rather than allocating it dynamically at runtime considering it is only
several bytes in size.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/powerplay: maximize code sharing between .hw_fini and .suspend
Evan Quan [Thu, 4 Jun 2020 04:00:11 +0000 (12:00 +0800)]
drm/amd/powerplay: maximize code sharing between .hw_fini and .suspend

Thus redundant code can be dropped.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/powerplay: better namings
Evan Quan [Thu, 4 Jun 2020 03:50:39 +0000 (11:50 +0800)]
drm/amd/powerplay: better namings

And some minor changes as dropping unused parameter and label
internal used API as static.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/powerplay: sort those operations performed in hw setup
Evan Quan [Thu, 4 Jun 2020 03:42:08 +0000 (11:42 +0800)]
drm/amd/powerplay: sort those operations performed in hw setup

Those common operations(for all ASICs) are placed first and followed
by ASIC specific ones. While the display related are placed at the last.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/powerplay: maximize code sharing between .hw_init and .resume
Evan Quan [Thu, 4 Jun 2020 03:35:45 +0000 (11:35 +0800)]
drm/amd/powerplay: maximize code sharing between .hw_init and .resume

Then redundant code can be dropped.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/powerplay: move those operations not needed for resume out
Evan Quan [Thu, 4 Jun 2020 03:25:28 +0000 (11:25 +0800)]
drm/amd/powerplay: move those operations not needed for resume out

Since smu_smc_table_hw_init() is needed for both .hw_init and .resume.
By doing this, we can drop unnecessary operations on resume.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/powerplay: postpone operations not required for hw setup to late_init
Evan Quan [Thu, 4 Jun 2020 03:15:12 +0000 (11:15 +0800)]
drm/amd/powerplay: postpone operations not required for hw setup to late_init

So that we do not need to perform those unnecessary operations again on
resume.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/powerplay: clean up the overdrive settings
Evan Quan [Fri, 29 May 2020 06:07:41 +0000 (14:07 +0800)]
drm/amd/powerplay: clean up the overdrive settings

Eliminate the buffer allocation and drop the unnecessary
overdrive table uploading.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/powerplay: clean up the APIs for pptable setup
Evan Quan [Thu, 28 May 2020 10:50:00 +0000 (18:50 +0800)]
drm/amd/powerplay: clean up the APIs for pptable setup

Combine and simplify the logics for setup pptable.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/powerplay: clean up the APIs for bootup clocks
Evan Quan [Thu, 28 May 2020 10:41:28 +0000 (18:41 +0800)]
drm/amd/powerplay: clean up the APIs for bootup clocks

Combine and simplify the logics for retrieving bootup
clocks.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>