linux-2.6-microblaze.git
8 months agodrm/amd/display: Block UHBR Based On USB-C PD Cable ID
Michael Strauss [Tue, 3 Sep 2024 20:23:11 +0000 (16:23 -0400)]
drm/amd/display: Block UHBR Based On USB-C PD Cable ID

[WHY]
Currently the absence of UHBR cable ID caps from USB-C PD does not block UHBR
rates. In situations where DPCD reports valid UHBR capability but USB-C PD
does not, such as using a USB-C to DP1.4 dongle connected to a native DP2.1
cable, link loss and lightup failures can be seen as a result.

Additionally, in edge cases where a platform supports cable ID but DMUB
doesn't correctly return cable ID caps, driver currently also allows UHBR.

[HOW]
Block UHBR rates over DP alt mode if cable id indicates no UHBR support.
Additionally, block UHBR rates if a cable ID supported platform receives no
reply from a DMUB cable id query.

Reviewed-by: Wenjing Liu <wenjing.liu@amd.com>
Reviewed-by: Ovidiu Bunea <ovidiu.bunea@amd.com>
Signed-off-by: Michael Strauss <michael.strauss@amd.com>
Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amd/display: Set Pipe Unlock Order Outside of HWSEQ
Austin Zheng [Tue, 10 Sep 2024 17:46:50 +0000 (13:46 -0400)]
drm/amd/display: Set Pipe Unlock Order Outside of HWSEQ

[Why]
Current pipe unlock order set within dcn401_interdependent_update_lock.
Separate the logic from the functionality to allow for unit testing
and make it easier to debug.

[How]
Add a flag to indicate if a pipe unlock order should be set.
Create function to determine unlock order.
Indicate which pipes should be unlocked first using
array stored in dc scratch memory.
Pipes indicated in array can be unlocked in any order.

Reviewed-by: Alvin Lee <alvin.lee2@amd.com>
Signed-off-by: Austin Zheng <Austin.Zheng@amd.com>
Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amd/display: Change dc_surface_update cm2_params to const
Shunlu Zhang [Tue, 3 Sep 2024 05:08:01 +0000 (01:08 -0400)]
drm/amd/display: Change dc_surface_update cm2_params to const

[WHY]
cm2_params is used to set update_flags.
It's value is not intended to be modified.

[WHAT]
Change the declaration of cm2_params to be a constant variable

Reviewed-by: Tao Huang <tao.huang@amd.com>
Reviewed-by: Ariel Bernstein <eric.bernstein@amd.com>
Signed-off-by: Shunlu Zhang <Shunlu.Zhang@amd.com>
Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amd/display: Clean up triple buffer enablement code
Sung Lee [Mon, 9 Sep 2024 20:12:55 +0000 (16:12 -0400)]
drm/amd/display: Clean up triple buffer enablement code

[WHY]
Triple buffer enablement currently does not work properly

[HOW]
Allow triple buffer enablement to happen properly on
fast updates

Reviewed-by: Aric Cyr <aric.cyr@amd.com>
Signed-off-by: Sung Lee <sunglee@amd.com>
Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amd/display: Fix incorrect DSC recompute trigger
Fangzhi Zuo [Wed, 4 Sep 2024 20:56:45 +0000 (16:56 -0400)]
drm/amd/display: Fix incorrect DSC recompute trigger

A stream without dsc_aux should not be eliminated from
the dsc determination. Whether it needs a dsc recompute depends on
whether its mode has changed or not. Eliminating such a no-dsc stream
from the dsc determination policy will end up with inconsistencies
in the new dc_state when compared to the current dc_state,
triggering a dsc recompute that should not have happened.

Reviewed-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com>
Signed-off-by: Fangzhi Zuo <Jerry.Zuo@amd.com>
Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amd/display: Monitor patch to call blank_stream() before otg off
Zhongwei [Tue, 10 Sep 2024 05:28:34 +0000 (13:28 +0800)]
drm/amd/display: Monitor patch to call blank_stream() before otg off

[Why]
Turning off OTG before DIG is on and backlight is on, might cause:

DIG FIFO underflow.
EDP output unexpected video data. That might violate EDP spec.
EDP spec requires black light should be off before validate
video data is turned off.

Currently garbage issue only occurs in one type of EDP to MIPI converter.

[How]
Add monitor patch to call blank_stream() before disable_crtc().
That will be no impact for current sequence.

If there are more types of EDP panels meeting this issue later,
we might remove this monitor patch and fix the current sequence.

Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Zhongwei <Zhongwei.Zhang@amd.com>
Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amd/display: Wait for all pending cleared before full update
Alvin Lee [Mon, 9 Sep 2024 20:24:05 +0000 (16:24 -0400)]
drm/amd/display: Wait for all pending cleared before full update

[Description]
Before every full update we must wait for all pending updates to be
cleared - this is particularly important for minimal transitions
because if we don't wait for pending cleared, it will be as if
there was no minimal transition at all. In OTG we must read 3 different
status registers for pending cleared, one specifically for OTG updates,
one specifically for OPTC updates, and the last for surface related
updates.

Reviewed-by: Dillon Varone <dillon.varone@amd.com>
Signed-off-by: Alvin Lee <Alvin.Lee2@amd.com>
Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amd/display: Restore Optimized pbn Value if Failed to Disable DSC
Fangzhi Zuo [Wed, 4 Sep 2024 19:29:24 +0000 (15:29 -0400)]
drm/amd/display: Restore Optimized pbn Value if Failed to Disable DSC

Existing last step of dsc policy is to restore pbn value under minimum compression
when try to greedily disable dsc for a stream failed to fit in MST bw.
Optimized dsc params result from optimization step is not necessarily the minimum compression,
therefore it is not correct to restore the pbn under minimum compression rate.

Restore the pbn under minimum compression instead of the value from optimized pbn could result
in the dsc params not correct at the modeset where atomic_check failed due to not
enough bw. One or more monitors connected could not light up in such case.

Restore the optimized pbn value, instead of using the pbn value under minimum
compression.

Cc: Mario Limonciello <mario.limonciello@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Wayne Lin <wayne.lin@amd.com>
Signed-off-by: Fangzhi Zuo <Jerry.Zuo@amd.com>
Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amd/display: disable adaptive scaler and sharpener when integer scaling is enabled
Samson Tam [Fri, 6 Sep 2024 07:28:47 +0000 (03:28 -0400)]
drm/amd/display: disable adaptive scaler and sharpener when integer scaling is enabled

[Why & How]
When integer scaling is enabled, set taps to 1 and disable adaptive
 scaler and sharpener.

Reviewed-by: Jun Lei <jun.lei@amd.com>
Signed-off-by: Samson Tam <Samson.Tam@amd.com>
Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amd/display: update DML2 policy EnhancedPrefetchScheduleAccelerationFinal DCN35
Yihan Zhu [Sat, 7 Sep 2024 17:25:19 +0000 (13:25 -0400)]
drm/amd/display: update DML2 policy EnhancedPrefetchScheduleAccelerationFinal DCN35

[WHY & HOW]
Mismatch in DCN35 DML2 cause bw validation failed to acquire unexpected DPP pipe to cause
grey screen and system hang. Remove EnhancedPrefetchScheduleAccelerationFinal value override
to match HW spec.

Cc: Mario Limonciello <mario.limonciello@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Charlene Liu <charlene.liu@amd.com>
Signed-off-by: Yihan Zhu <Yihan.Zhu@amd.com>
Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amdgpu: Add sysfs nodes to get xcp details
Lijo Lazar [Mon, 9 Sep 2024 08:47:17 +0000 (14:17 +0530)]
drm/amdgpu: Add sysfs nodes to get xcp details

Add partition config nodes in sysfs to get resource instance details for
a particular partition mode. A resource could be anything like an xcc,
vcn decoder, system dma units etc.

Details of various resource instances are available under
/sys/bus/pci/devices/.../compute_partition_config/

Select a partition configuration:
/sys/bus/pci/devices/.../compute_partition_config/xcp_config

Number of instances of a resource:
/sys/bus/pci/devices/.../compute_partition_config/<rsrc_name>/num_inst

Total partitions sharing the resource:
/sys/bus/pci/devices/.../compute_partition_config/<rsrc_name>/num_shared

v2: Update node name as per spec

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Asad Kamal <asad.kamal@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amdgpu: update the handle ptr in dump_ip_state
Sunil Khatri [Tue, 24 Sep 2024 16:00:17 +0000 (21:30 +0530)]
drm/amdgpu: update the handle ptr in dump_ip_state

Update the ptr handle to amdgpu_ip_block ptr in all
the functions.

Signed-off-by: Sunil Khatri <sunil.khatri@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amdgpu/sdma5: split out per instance resume function
Jiadong Zhu [Fri, 20 Sep 2024 01:45:42 +0000 (09:45 +0800)]
drm/amdgpu/sdma5: split out per instance resume function

Extract the resume sequence from sdma_v5_0_gfx_resume for
starting/restarting an individual instance.

Signed-off-by: Jiadong Zhu <Jiadong.Zhu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amdkfd: Remove an unused parameter in queue creation
Lang Yu [Mon, 23 Sep 2024 08:59:42 +0000 (16:59 +0800)]
drm/amdkfd: Remove an unused parameter in queue creation

struct file *f is unused in queue creation, remove it.

Signed-off-by: Lang Yu <lang.yu@amd.com>
Reviewed-by: Felix Kuehling <felix.kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agoRevert "drm/amd/display: change the panel power savings level without a modeset"
Leo Li [Mon, 9 Sep 2024 20:15:23 +0000 (16:15 -0400)]
Revert "drm/amd/display: change the panel power savings level without a modeset"

This reverts commit 8d20a066fa9beb1ec559b12945414a51d17d07e5.

It's causing a failure in the abm_gradual igt test.

Signed-off-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amd/display: change the panel power savings level without a modeset
Hamza Mahfooz [Fri, 9 Aug 2024 20:42:53 +0000 (16:42 -0400)]
drm/amd/display: change the panel power savings level without a modeset

We don't actually need to request that the compositor does a full
modeset to modify the panel power savings level, we can instead
just make a request to DMUB, to set the new level dynamically.

Cc: Harry Wentland <harry.wentland@amd.com>
Cc: Leo Li <sunpeng.li@amd.com>
Cc: Mario Limonciello <mario.limonciello@amd.com>
Cc: Sebastian Wick <sebastian@sebastianwick.net>
Signed-off-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
Tested-by: Mario Limonciello <mario.limonciello@amd.com>
Reviewed-by: Mario Limonciello <mario.limonciello@amd.com>
Closes: https://gitlab.gnome.org/GNOME/mutter/-/issues/3578
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amdgpu: Add PSP reload case to reset-on-init
Lijo Lazar [Mon, 2 Sep 2024 05:58:34 +0000 (11:28 +0530)]
drm/amdgpu: Add PSP reload case to reset-on-init

A reset on initialization will be needed if a new PSP TOS needs to be
loaded than the one currently active on the system. This is possible
only on SOCs which support a full device reset which results in unload
of active PSP TOS.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@amd.com>
Tested-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amdgpu: Add interface for TOS reload cases
Lijo Lazar [Mon, 2 Sep 2024 05:50:22 +0000 (11:20 +0530)]
drm/amdgpu: Add interface for TOS reload cases

Add interface to check if a different TOS needs to be loaded than the
one which is which is already active on the SOC. Presently the interface
is restricted to specific variants of PSPv13.0.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@amd.com>
Tested-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amdgpu: Support reset-on-init on select SOCs
Lijo Lazar [Mon, 2 Sep 2024 06:04:39 +0000 (11:34 +0530)]
drm/amdgpu: Support reset-on-init on select SOCs

Add XGMI reset on init support to aldebaran and SOCs with GC v9.4.3.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@amd.com>
Tested-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amdgpu: Drop delayed reset work handler
Lijo Lazar [Mon, 2 Sep 2024 06:22:26 +0000 (11:52 +0530)]
drm/amdgpu: Drop delayed reset work handler

Drop delayed reset work handler as it is no longer used.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@amd.com>
Tested-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amdgpu: Refactor XGMI reset on init handling
Lijo Lazar [Mon, 26 Aug 2024 13:22:14 +0000 (18:52 +0530)]
drm/amdgpu: Refactor XGMI reset on init handling

Use XGMI hive information to rely on resetting XGMI devices on
initialization rather than using mgpu structure. mgpu structure may have
other devices as well.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Feifei Xu <feifxu@amd.com>
Acked-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@amd.com>
Tested-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amdgpu: Add helper to initialize badpage info
Lijo Lazar [Fri, 30 Aug 2024 05:51:43 +0000 (11:21 +0530)]
drm/amdgpu: Add helper to initialize badpage info

Add a separate function to read badpage data during initialization.
Reading bad pages will need hardware access and cannot be done during
reset. Hence in cases where device needs a full reset during
init itself, attempting to read will cause a deadlock.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@amd.com>
Tested-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amdgpu: Remove unused amdgpu_i2c functions
Dr. David Alan Gilbert [Mon, 23 Sep 2024 01:24:46 +0000 (02:24 +0100)]
drm/amdgpu: Remove unused amdgpu_i2c functions

amdgpu_i2c_add and amdgpu_i2c_init were added in 2015's commit
d38ceaf99ed0 ("drm/amdgpu: add core driver (v4)")
but never used.

Remove them.

Signed-off-by: Dr. David Alan Gilbert <linux@treblig.org>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amdgpu: Remove unused amdgpu_gfx_bit_to_me_queue
Dr. David Alan Gilbert [Mon, 23 Sep 2024 01:24:45 +0000 (02:24 +0100)]
drm/amdgpu: Remove unused amdgpu_gfx_bit_to_me_queue

amdgpu_gfx_bit_to_me_queue has been unused since it was added in
commit 7470bfcf2014 ("drm/amdgpu: add helper function for gfx queue/bitmap
transition")

Remove it.

Signed-off-by: Dr. David Alan Gilbert <linux@treblig.org>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amdgpu: Remove unused amdgpu_gmc_vram_cpu_pa
Dr. David Alan Gilbert [Mon, 23 Sep 2024 01:24:44 +0000 (02:24 +0100)]
drm/amdgpu: Remove unused amdgpu_gmc_vram_cpu_pa

amdgpu_gmc_vram_cpu_pa has been unused since commit
087451f372bf ("drm/amdgpu: use generic fb helpers instead of setting up AMD own's.")

Remove it.

Signed-off-by: Dr. David Alan Gilbert <linux@treblig.org>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amdgpu: Remove unused amdgpu_atpx functions
Dr. David Alan Gilbert [Mon, 23 Sep 2024 01:24:43 +0000 (02:24 +0100)]
drm/amdgpu: Remove unused amdgpu_atpx functions

amdgpu_atpx_dgpu_req_power_for_displays has been unused since
commit bdb1ccb080da ("drm/amdgpu: remove ATPX_DGPU_REQ_POWER_FOR_DISPLAYS
check when hotplug-in")

amdgpu_atpx_get_dhandle has been unused since commit
f9b7f3703ff9 ("drm/amdgpu/acpi: make ATPX/ATCS structures global (v2)")

Remove them.

Signed-off-by: Dr. David Alan Gilbert <linux@treblig.org>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amdgpu: Remove unused amdgpu_device_ip_is_idle
Dr. David Alan Gilbert [Mon, 23 Sep 2024 01:24:42 +0000 (02:24 +0100)]
drm/amdgpu: Remove unused amdgpu_device_ip_is_idle

amdgpu_device_ip_is_idle is unused.
It was renamed from 'amdgpu_is_idle' which was originally added in
commit 5dbbb60ba61e ("drm/amdgpu: add IP helpers for wait_for_idle and is_idle")

but hasn't been used.

Remove it.

Signed-off-by: Dr. David Alan Gilbert <linux@treblig.org>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amdgpu: Add reset on init handler for XGMI
Lijo Lazar [Wed, 21 Aug 2024 06:10:16 +0000 (11:40 +0530)]
drm/amdgpu: Add reset on init handler for XGMI

In some cases, device needs to be reset before first use. Add handlers
for doing device reset during driver init sequence.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Feifei Xu <feifxu@amd.com>
Acked-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@amd.com>
Tested-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amd/display: fix typos in several function pointer checks
Vitaliy Shevtsov [Fri, 20 Sep 2024 21:43:40 +0000 (02:43 +0500)]
drm/amd/display: fix typos in several function pointer checks

Fix several copypaste mistakes in *_disable_link_output() functions where
an improper function pointer is checked before dereference.

Found by Linux Verification Center (linuxtesting.org) with Svace.

Signed-off-by: Vitaliy Shevtsov <v.shevtsov@maxima.ru>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amdgpu: Add callback get xcp resource info
Lijo Lazar [Mon, 9 Sep 2024 12:08:24 +0000 (17:38 +0530)]
drm/amdgpu: Add callback get xcp resource info

Add a callback interface to get the resource information of a partition
mode. Presently the information has number of resources and number of
entities sharing the resource.

Add the implementation for aquavanjaram SOCs.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Asad Kamal <asad.kamal@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amd: Add helper to get partition config modes
Lijo Lazar [Tue, 17 Sep 2024 08:24:11 +0000 (16:24 +0800)]
drm/amd: Add helper to get partition config modes

Add helper to get supported/available partition config modes

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amdgpu: Fix typo "acccess" and improve the comment style here
WangYuli [Fri, 20 Sep 2024 02:27:55 +0000 (10:27 +0800)]
drm/amdgpu: Fix typo "acccess" and improve the comment style here

There are some spelling mistakes of 'acccess' in comments which
should be instead of 'access'.

And the comment style should be like this:
 /*
  * Text
  * Text
  */

Suggested-by: Christian König <christian.koenig@amd.com>
Link: https://lore.kernel.org/all/f75fbe30-528e-404f-97e4-854d27d7a401@amd.com/
Acked-by: Thomas Zimmermann <tzimmermann@suse.de>
Link: https://lore.kernel.org/all/0c768bf6-bc19-43de-a30b-ff5e3ddfd0b3@suse.de/
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: WangYuli <wangyuli@uniontech.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amdgpu/gfx9: Explicitly halt CP before init
Alex Deucher [Mon, 16 Sep 2024 17:21:02 +0000 (13:21 -0400)]
drm/amdgpu/gfx9: Explicitly halt CP before init

Need to make sure it's halted as we don't know what state
the GPU may have been left in previously.

Reviewed-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amdgpu/gfx9: set additional bits on CP halt
Alex Deucher [Mon, 16 Sep 2024 17:16:53 +0000 (13:16 -0400)]
drm/amdgpu/gfx9: set additional bits on CP halt

Need to set the pipe reset and cache invalidation bits
on halt otherwise we can get stale state if the CP firmware
changes (e.g., on module unload and reload).

Reviewed-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amdgpu: add amdgpu_device reference in ip block
Sunil Khatri [Tue, 24 Sep 2024 12:46:29 +0000 (18:16 +0530)]
drm/amdgpu: add amdgpu_device reference in ip block

To handle amdgpu_device reference for different GPUs
we add it's reference in each ip block which can be
used to differentiate between difference gpu devices.

Signed-off-by: Sunil Khatri <sunil.khatri@amd.com>
Suggested-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amdgpu: Separate reinitialization after reset
Lijo Lazar [Mon, 26 Aug 2024 06:16:26 +0000 (11:46 +0530)]
drm/amdgpu: Separate reinitialization after reset

Move the reinitialization part after a reset to another function. No
functional changes.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@amd.com>
Tested-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amdgpu: check return for setting engine dram timings
Tim Huang [Thu, 1 Aug 2024 06:04:52 +0000 (14:04 +0800)]
drm/amdgpu: check return for setting engine dram timings

This resolves the unchecded return value warning reported by Coverity.

Signed-off-by: Tim Huang <tim.huang@amd.com>
Reviewed-by: Jesse Zhang <jesse.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amdgpu: Use init level for pending_reset flag
Lijo Lazar [Mon, 19 Aug 2024 07:53:42 +0000 (13:23 +0530)]
drm/amdgpu: Use init level for pending_reset flag

Drop pending_reset flag in gmc block. Instead use init level to
determine which type of init is preferred - in this case MINIMAL.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Acked-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@amd.com>
Tested-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agoamd/amdgpu: Reduce unnecessary repetitive GPU resets
YiPeng Chai [Fri, 20 Sep 2024 07:22:24 +0000 (15:22 +0800)]
amd/amdgpu: Reduce unnecessary repetitive GPU resets

In multiple GPUs case, after a GPU has started
resetting all GPUs on hive, other GPUs do not
need to trigger GPU reset again.

Signed-off-by: YiPeng Chai <YiPeng.Chai@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amdgpu: Add init levels
Lijo Lazar [Mon, 19 Aug 2024 06:57:48 +0000 (12:27 +0530)]
drm/amdgpu: Add init levels

Add init levels to define the level to which device needs to be
initialized.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Acked-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@amd.com>
Tested-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amdgpu: Remove unneeded write in JPEG v4.0.3
Jane Jian [Tue, 10 Sep 2024 03:53:26 +0000 (11:53 +0800)]
drm/amdgpu: Remove unneeded write in JPEG v4.0.3

HDP_DEBUG1(offset = 0x3fbc) is no longer functional, remove the redundant write.

Signed-off-by: Jane Jian <Jane.Jian@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amdgpu: Fix JPEG v4.0.3 register write
Lijo Lazar [Fri, 6 Sep 2024 08:40:19 +0000 (14:10 +0530)]
drm/amdgpu: Fix JPEG v4.0.3 register write

EXTERNAL_REG_INTERNAL_OFFSET/EXTERNAL_REG_WRITE_ADDR should be used in
pairs. If an external register shouldn't be written, both packets
shouldn't be sent.

Fixes: a78b48146972 ("drm/amdgpu: Skip PCTL0_MMHUB_DEEPSLEEP_IB write in jpegv4.0.3 under SRIOV")
Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amd/pm: Do not support swSMU if SMU IP is disabled
Hawking Zhang [Sun, 18 Aug 2024 08:04:09 +0000 (16:04 +0800)]
drm/amd/pm: Do not support swSMU if SMU IP is disabled

When SMU IP is disabled by ip_block_mask, driver
should not refer to any dpm/swSMU callback. Instead,
any driver call into swSMU/dpm callback needs to
return error code EOPNOTSUPP.

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Yang Wang <kevinyang.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amd/display: Fix unnecessary cast warnings from checkpatch
Rohit Chavan [Tue, 17 Sep 2024 16:31:19 +0000 (22:01 +0530)]
drm/amd/display: Fix unnecessary cast warnings from checkpatch

This patch addresses warnings produced by the checkpatch script
related to unnecessary casts that could potentially hide bugs.

The specific warnings are as follows:
- Warning at drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_wrapper.c:16
- Warning at drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_wrapper.c:20
- Warning at drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_wrapper.c:30

Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rohit Chavan <roheetchavan@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amdkfd:Add kfd function to config sq perfmon
Feifei Xu [Thu, 12 Sep 2024 10:09:11 +0000 (18:09 +0800)]
drm/amdkfd:Add kfd function to config sq perfmon

Expose the interface for kfd to config sq perfmon.

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: James Zhu <James.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amdgpu: add amdgpu_jpeg_sched_mask debugfs
Sathishkumar S [Mon, 9 Sep 2024 09:22:39 +0000 (14:52 +0530)]
drm/amdgpu: add amdgpu_jpeg_sched_mask debugfs

JPEG_4_0_3 has up to 32 jpeg cores and a single mjpeg video decode
will use all available cores on the hardware. This debugfs entry
helps to disable or enable job submission to a cluster of cores or
one specific core in the ip for debugging. The entry is populated
only if there is at least two or more cores in the jpeg ip.

Signed-off-by: Sathishkumar S <sathishkumar.sundararaju@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amd/pm: Use metrics 1_6
Asad Kamal [Mon, 22 Jul 2024 12:00:52 +0000 (20:00 +0800)]
drm/amd/pm: Use metrics 1_6

Use metrics 1_6 to report activities per partition

v2: Use separate per instance for different platforms, shared
vcn handled by other fix

Signed-off-by: Asad Kamal <asad.kamal@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amd/display: Remove unused function bios_get_vga_enabled_displays
Dr. David Alan Gilbert [Sun, 15 Sep 2024 14:01:44 +0000 (15:01 +0100)]
drm/amd/display: Remove unused function bios_get_vga_enabled_displays

bios_get_vga_enabled_displays has been unused since
  commit 5a8132b9f606 ("drm/amd/display: remove dead dc vbios code")

Remove it.

Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dr. David Alan Gilbert <linux@treblig.org>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amd/pm: Add gpu_metrics_v1_6
Asad Kamal [Sat, 13 Jul 2024 20:04:51 +0000 (04:04 +0800)]
drm/amd/pm: Add gpu_metrics_v1_6

Add new gpu_metrics_v1_6 with activities per partition

Signed-off-by: Asad Kamal <asad.kamal@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amdgpu: Add psp command CONFIG_SQ_PERFMON
Feifei Xu [Thu, 12 Sep 2024 10:08:07 +0000 (18:08 +0800)]
drm/amdgpu: Add psp command CONFIG_SQ_PERFMON

Add support for enable/disable perfmon profiling.

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: James Zhu <James.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amd/pm: Use same metric table for APU
Asad Kamal [Thu, 18 Jul 2024 10:55:06 +0000 (18:55 +0800)]
drm/amd/pm: Use same metric table for APU

Use same metric table for APU and Non APU systems
for smu_v_13_0_6 to get metric data based on newer pmfw
versions

v2: Use inline func to check for unified metrics support

Signed-off-by: Asad Kamal <asad.kamal@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amdgpu: update suspend status for aborting from deeper suspend
Prike Liang [Fri, 23 Aug 2024 01:48:13 +0000 (09:48 +0800)]
drm/amdgpu: update suspend status for aborting from deeper suspend

There're some other suspend abort cases which can call the noirq
suspend except for executing _S3 method. In those cases need to
process as incomplete suspendsion.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amd/amdgpu: Add helper to get ip block valid
Asad Kamal [Thu, 4 Jul 2024 04:08:33 +0000 (12:08 +0800)]
drm/amd/amdgpu: Add helper to get ip block valid

Add helper function to check if ip block is enabled

Signed-off-by: Asad Kamal <asad.kamal@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amdgpu/sdma6: implement ring reset callback for sdma6
Jiadong Zhu [Tue, 10 Sep 2024 03:27:02 +0000 (11:27 +0800)]
drm/amdgpu/sdma6: implement ring reset callback for sdma6

Implement sdma queue reset callback using mes_reset_queue_mmio.

v2: check instance id before reset queue.

Signed-off-by: Jiadong Zhu <Jiadong.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amdgpu/sdma6: split out per instance resume function
Jiadong Zhu [Mon, 9 Sep 2024 07:36:26 +0000 (15:36 +0800)]
drm/amdgpu/sdma6: split out per instance resume function

Extract the resume sequence for individual sdma instance from sdma_v6_0_gfx_resume.
The function could be used for start/restart scenario on a certain instance.

Signed-off-by: Jiadong Zhu <Jiadong.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amdgpu/mes11: update mes_reset_queue function to support sdma queue
Jiadong Zhu [Mon, 9 Sep 2024 06:19:53 +0000 (14:19 +0800)]
drm/amdgpu/mes11: update mes_reset_queue function to support sdma queue

Reset sdma queue through mmio based on me_id and queue_id.

v2: simplify callflows and register calculation.

Signed-off-by: Jiadong Zhu <Jiadong.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amd/pm: update workload mask after the setting
Kenneth Feng [Fri, 20 Sep 2024 11:05:37 +0000 (19:05 +0800)]
drm/amd/pm: update workload mask after the setting

update workload mask after the setting.

Link: https://gitlab.freedesktop.org/drm/amd/-/issues/3625
Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
8 months agodrm/amdgpu: bump driver version for cleared VRAM
Alex Deucher [Fri, 6 Sep 2024 17:51:06 +0000 (13:51 -0400)]
drm/amdgpu: bump driver version for cleared VRAM

Driver now clears VRAM on allocation.  Bump the
driver version so mesa knows when it will get
cleared vram by default.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org # 6.11.x
8 months agodrm/amdgpu: fix vbios fetching for SR-IOV
Alex Deucher [Wed, 25 Sep 2024 18:17:53 +0000 (14:17 -0400)]
drm/amdgpu: fix vbios fetching for SR-IOV

SR-IOV fetches the vbios from VRAM in some cases.
Re-enable the VRAM path for dGPUs and rename the function
to make it clear that it is not IGP specific.

Fixes: 042658d17a54 ("drm/amdgpu: clean up vbios fetching code")
Reviewed-by: Yang Wang <kevinyang.wang@amd.com>
Tested-by: Yang Wang <kevinyang.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amdgpu: fix PTE copy corruption for sdma 7
Frank Min [Wed, 25 Sep 2024 03:39:06 +0000 (11:39 +0800)]
drm/amdgpu: fix PTE copy corruption for sdma 7

Without setting dcc bit, there is ramdon PTE copy corruption on sdma 7.

so add this bit and update the packet format accordingly.

Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Frank Min <Frank.Min@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org # 6.11.x
8 months agodrm/amdkfd: Add SDMA queue quantum support for GFX12
Sreekant Somasekharan [Fri, 20 Sep 2024 05:53:17 +0000 (01:53 -0400)]
drm/amdkfd: Add SDMA queue quantum support for GFX12

program SDMAx_QUEUEx_SCHEDULE_CNTL for context switch due to
quantum in KFD for GFX12.

Signed-off-by: Sreekant Somasekharan <sreekant.somasekharan@amd.com>
Reviewed-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org # 6.11.x
8 months agodrm/amdgpu/vcn: enable AV1 on both instances
Saleemkhan Jamadar [Fri, 20 Sep 2024 13:10:18 +0000 (18:40 +0530)]
drm/amdgpu/vcn: enable AV1 on both instances

v1 - remove cs parse code (Christian)

On VCN v4_0_6 AV1 is supported on both the instances.
Remove cs IB parse code since explict handling of AV1 schedule is
not required.

Signed-off-by: Saleemkhan Jamadar <saleemkhan.jamadar@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
8 months agodrm/amdkfd: Fix CU occupancy for GFX 9.4.3
Mukul Joshi [Fri, 20 Sep 2024 18:59:29 +0000 (14:59 -0400)]
drm/amdkfd: Fix CU occupancy for GFX 9.4.3

Make CU occupancy calculations work on GFX 9.4.3 by
updating the logic to handle multiple XCCs correctly.

Signed-off-by: Mukul Joshi <mukul.joshi@amd.com>
Reviewed-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amdkfd: Update logic for CU occupancy calculations
Mukul Joshi [Mon, 16 Sep 2024 18:33:58 +0000 (14:33 -0400)]
drm/amdkfd: Update logic for CU occupancy calculations

Currently, the code uses the IH_VMID_X_LUT register to map
a queue's vmid to the corresponding PASID. This logic is racy
since CP can update the VMID-PASID mapping anytime especially
when there are more processes than number of vmids. Update the
logic to calculate CU occupancy by matching doorbell offset of
the queue with valid wave counts against the process's queues.

Signed-off-by: Mukul Joshi <mukul.joshi@amd.com>
Reviewed-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amdgpu: skip coredump after job timeout in SRIOV
ZhenGuo Yin [Thu, 19 Sep 2024 03:38:04 +0000 (11:38 +0800)]
drm/amdgpu: skip coredump after job timeout in SRIOV

VF FLR will be triggered by host driver before job timeout,
hence the error status of GPU get cleared. Performing a
coredump here is unnecessary.

Signed-off-by: ZhenGuo Yin <zhenguo.yin@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amdgpu: sync to KFD fences before clearing PTEs
Christian König [Wed, 21 Aug 2024 11:55:41 +0000 (13:55 +0200)]
drm/amdgpu: sync to KFD fences before clearing PTEs

This patch tries to solve the basic problem we also need to sync to
the KFD fences of the BO because otherwise it can be that we clear
PTEs while the KFD queues are still running.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Felix Kuehling <felix.kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amdgpu/mes12: set enable_level_process_quantum_check
Jack Xiao [Wed, 18 Sep 2024 09:07:13 +0000 (17:07 +0800)]
drm/amdgpu/mes12: set enable_level_process_quantum_check

enable_level_process_quantum_check is requried to enable process
quantum based scheduling.

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org # 6.11.x
8 months agodrm/amdgpu/mes12: reduce timeout
Alex Deucher [Wed, 18 Sep 2024 13:37:31 +0000 (09:37 -0400)]
drm/amdgpu/mes12: reduce timeout

The firmware timeout is 2s.  Reduce the driver timeout to
2.1 seconds to avoid back pressure on queue submissions.

Fixes: 94b51a3d01ed ("drm/amdgpu/mes12: increase mes submission timeout")
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org # 6.11.x
8 months agodrm/amdgpu/mes11: reduce timeout
Alex Deucher [Mon, 16 Sep 2024 14:52:24 +0000 (10:52 -0400)]
drm/amdgpu/mes11: reduce timeout

The firmware timeout is 2s.  Reduce the driver timeout to
2.1 seconds to avoid back pressure on queue submissions.

Link: https://gitlab.freedesktop.org/drm/amd/-/issues/3627
Fixes: f7c161a4c250 ("drm/amdgpu: increase mes submission timeout")
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
8 months agodrm/amdgpu: use GEM references instead of TTMs v2
Christian König [Thu, 11 Jul 2024 12:39:43 +0000 (14:39 +0200)]
drm/amdgpu: use GEM references instead of TTMs v2

Instead of a TTM reference grab a GEM reference whenever necessary.

v2: fix typo in amdgpu_bo_unref pointed out by Vitaly,
    initialize the GEM funcs for kernel allocations as well.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> (v1)
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amd/display: Allow backlight to go below `AMDGPU_DM_DEFAULT_MIN_BACKLIGHT`
Mario Limonciello [Sun, 15 Sep 2024 19:28:37 +0000 (14:28 -0500)]
drm/amd/display: Allow backlight to go below `AMDGPU_DM_DEFAULT_MIN_BACKLIGHT`

The issue with panel power savings compatibility below
`AMDGPU_DM_DEFAULT_MIN_BACKLIGHT` happens at
`AMDGPU_DM_DEFAULT_MIN_BACKLIGHT` as well.

That issue will be fixed separately, so don't prevent the backlight
brightness from going that low.

Cc: Harry Wentland <harry.wentland@amd.com>
Cc: Thomas Weißschuh <linux@weissschuh.net>
Link: https://lore.kernel.org/amd-gfx/be04226a-a9e3-4a45-a83b-6d263c6557d8@t-8ch.de/T/#m400dee4e2fc61fe9470334d20a7c8c89c9aef44f
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amd/display: Fix kdoc entry for 'tps' in 'dc_process_dmub_dpia_set_tps_notification'
Srinivasan Shanmugam [Tue, 17 Sep 2024 13:09:07 +0000 (18:39 +0530)]
drm/amd/display: Fix kdoc entry for 'tps' in 'dc_process_dmub_dpia_set_tps_notification'

Correct the parameter descriptor for the function
`dc_process_dmub_dpia_set_tps_notification` to match the actual
parameters used.

Fixes the below with gcc W=1:
drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc.c:5768: warning: Function parameter or struct member 'tps' not described in 'dc_process_dmub_dpia_set_tps_notification'
drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc.c:5768: warning: Excess function parameter 'ts' description in 'dc_process_dmub_dpia_set_tps_notification'

Cc: Tom Chung <chiahsuan.chung@amd.com>
Cc: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Cc: Roman Li <roman.li@amd.com>
Cc: Alex Hung <alex.hung@amd.com>
Cc: Aurabindo Pillai <aurabindo.pillai@amd.com>
Cc: Harry Wentland <harry.wentland@amd.com>
Cc: Hamza Mahfooz <hamza.mahfooz@amd.com>
Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>
Reviewed-by: Tom Chung <chiahsuan.chung@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amdgpu: update golden regs for gfx12
Frank Min [Wed, 4 Sep 2024 02:50:33 +0000 (10:50 +0800)]
drm/amdgpu: update golden regs for gfx12

update golden regs for gfx12

Signed-off-by: Frank Min <Frank.Min@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org # 6.11.x
8 months agodrm/amdgpu: clean up vbios fetching code
Alex Deucher [Tue, 17 Sep 2024 12:53:21 +0000 (08:53 -0400)]
drm/amdgpu: clean up vbios fetching code

After splitting the logic between APU and dGPU,
clean up some of the APU and dGPU specific logic
that no longer applied.

Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amd/display: handle nulled pipe context in DCE110's set_drr()
Tobias Jakobi [Mon, 16 Sep 2024 12:54:05 +0000 (14:54 +0200)]
drm/amd/display: handle nulled pipe context in DCE110's set_drr()

As set_drr() is called from IRQ context, it can happen that the
pipe context has been nulled by dc_state_destruct().

Apply the same protection here that is already present for
dcn35_set_drr() and dcn10_set_drr(). I.e. fetch the tg pointer
first (to avoid a race with dc_state_destruct()), and then
check the local copy before using it.

Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/3142
Fixes: 06ad7e164256 ("drm/amd/display: Destroy DC context while keeping DML and DML2")
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amdgpu/bios: split vbios fetching between APU and dGPU
Alex Deucher [Fri, 13 Sep 2024 20:22:01 +0000 (16:22 -0400)]
drm/amdgpu/bios: split vbios fetching between APU and dGPU

We need some different logic for dGPUs and the APU path
can be simplified because there are some methods which
are never used on APUs.  This also fixes a regression
on some older APUs causing the driver to fetch the
unpatched ROM image rather than the patched image.

Fixes: 9c081c11c621 ("drm/amdgpu: Reorder to read EFI exported ROM first")
Reviewed-by: George Zhang <George.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amdgpu: remove amdgpu_pin_restricted()
Christian König [Wed, 5 Jun 2024 14:34:49 +0000 (16:34 +0200)]
drm/amdgpu: remove amdgpu_pin_restricted()

We haven't used the functionality to pin BOs in a certain range at all
while the driver existed. Just nuke it.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amdgpu: explicitely set the AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS flag
Christian König [Wed, 5 Jun 2024 14:26:22 +0000 (16:26 +0200)]
drm/amdgpu: explicitely set the AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS flag

Instead of having that in the amdgpu_bo_pin() function applied for all
pinned BOs.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amdgpu: Fix XCP instance mask calculation
Lijo Lazar [Wed, 11 Sep 2024 08:19:51 +0000 (13:49 +0530)]
drm/amdgpu: Fix XCP instance mask calculation

Fix instance mask calculation for VCN IP. There are cases where VCN
instance could be shared across partitions. Fix here so that other
blocks don't need to check for any shared instances based on partition
mode.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Asad Kamal <asad.kamal@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amdgpu: Fix get each xcp macro
Asad Kamal [Mon, 22 Jul 2024 11:45:11 +0000 (19:45 +0800)]
drm/amdgpu: Fix get each xcp macro

Fix get each xcp macro to loop over each partition correctly

Fixes: 4bdca2057933 ("drm/amdgpu: Add utility functions for xcp")
Signed-off-by: Asad Kamal <asad.kamal@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amd/display: 3.2.301
Aric Cyr [Mon, 9 Sep 2024 01:40:21 +0000 (21:40 -0400)]
drm/amd/display: 3.2.301

- Clear cached watermark after resume
- Update IPS default mode for DCN35/DCN351
- Use full update for swizzle mode change
- Skip to enable dsc if it has been off
- Fix underflow when setting underscan on DCN401
- Remove always-false branches
- Check null pointer before dereferencing se

Acked-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Aric Cyr <aric.cyr@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amd/display: Clear cached watermark after resume
Charlene Liu [Thu, 5 Sep 2024 21:28:12 +0000 (17:28 -0400)]
drm/amd/display: Clear cached watermark after resume

[WHY]
Driver could skip program watermarks when resume from S0i3/S4.

[HOW]
Clear the cached one first to make sure new value gets applied.

Reviewed-by: Alvin Lee <alvin.lee2@amd.com>
Reviewed-by: Roman Li <roman.li@amd.com>
Signed-off-by: Charlene Liu <Charlene.Liu@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amd/display: Update IPS default mode for DCN35/DCN351
Roman Li [Thu, 5 Sep 2024 18:22:30 +0000 (14:22 -0400)]
drm/amd/display: Update IPS default mode for DCN35/DCN351

[WHY]
RCG state of IPX in idle is more stable for DCN351 and some variants of
DCN35 than IPS2.

[HOW]
Rework dm_get_default_ips_mode() to specify default per ASIC and update
DCN35/DCN351 defaults accordingly.

Cc: Mario Limonciello <mario.limonciello@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Reviewed-by: Sun peng Li <sunpeng.li@amd.com>
Signed-off-by: Roman Li <Roman.Li@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amd/display: Validate backlight caps are sane
Mario Limonciello [Fri, 13 Sep 2024 18:00:39 +0000 (13:00 -0500)]
drm/amd/display: Validate backlight caps are sane

Currently amdgpu takes backlight caps provided by the ACPI tables
on systems as is.  If the firmware sets maximums that are too low
this means that users don't get a good experience.

To avoid having to maintain a quirk list of such systems, do a sanity
check on the values.  Check that the spread is at least half of the
values that amdgpu would use if no ACPI table was found and if not
use the amdgpu defaults.

Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/3020
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
8 months agodrm/amd/display: Use full update for swizzle mode change
Charlene Liu [Wed, 4 Sep 2024 19:58:25 +0000 (15:58 -0400)]
drm/amd/display: Use full update for swizzle mode change

[WHY & HOW]
1) We did linear/non linear transition properly long ago
2) We used that path to handle SystemDisplayEnable
3) We fixed a SystemDisplayEnable inability to fallback to passive by
   impacting the transition flow generically
4) AFMF later relied on the generic transition behavior

Separating the two flows to make (3) non-generic is the best immediate
coarse of action.

DC can discern SSAMPO3 very easily from SDE.

Cc: Mario Limonciello <mario.limonciello@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Reviewed-by: Chris Park <chris.park@amd.com>
Signed-off-by: Charlene Liu <Charlene.Liu@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amd/display: Skip to enable dsc if it has been off
Zhikai Zhai [Tue, 27 Aug 2024 06:06:01 +0000 (14:06 +0800)]
drm/amd/display: Skip to enable dsc if it has been off

[WHY]
It makes DSC enable when we commit the stream which need
keep power off, and then it will skip to disable DSC if
pipe reset at this situation as power has been off. It may
cause the DSC unexpected enable on the pipe with the
next new stream which doesn't support DSC.

[HOW]
Check the DSC used on current pipe status when update stream.
Skip to enable if it has been off. The operation enable
DSC should happen when set power on.

Cc: Mario Limonciello <mario.limonciello@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Reviewed-by: Wenjing Liu <wenjing.liu@amd.com>
Signed-off-by: Zhikai Zhai <zhikai.zhai@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amd/display: Fix underflow when setting underscan on DCN401
Aurabindo Pillai [Tue, 3 Sep 2024 14:10:44 +0000 (10:10 -0400)]
drm/amd/display: Fix underflow when setting underscan on DCN401

[WHY & HOW]
When underscan is set through xrandr, it causes the stream destination
rect to change in a way it becomes complicated to handle the calculations
for subvp. Since this is a corner case, disable subvp when underscan is
set.

Fix the existing check that is supposed to catch this corner case by
adding a check based on the parameters in the stream

Cc: Mario Limonciello <mario.limonciello@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Reviewed-by: Dillon Varone <dillon.varone@amd.com>
Reviewed-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com>
Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amd/display: Remove always-false branches
Alex Hung [Thu, 29 Aug 2024 22:35:51 +0000 (16:35 -0600)]
drm/amd/display: Remove always-false branches

[WHAT & HOW]
req128_c is always set to false and its branch is never taken.
Similarly, MacroTileSizeBytes is set to either 256 or 65535 and it is
never 4096 and it's branch is not taken.

Therefore, their branches are removed.

This fixes 3 DEADCODE issues reported by Coverity.

Acked-by: Alex Hung <alex.hung@amd.com>
Reviewed-by: Alvin Lee <alvin.lee2@amd.com>
Reviewed-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amd/display: Check null pointer before dereferencing se
Alex Hung [Thu, 29 Aug 2024 23:30:26 +0000 (17:30 -0600)]
drm/amd/display: Check null pointer before dereferencing se

[WHAT & HOW]
se is null checked previously in the same function, indicating
it might be null; therefore, it must be checked when used again.

This fixes 1 FORWARD_NULL issue reported by Coverity.

Acked-by: Alex Hung <alex.hung@amd.com>
Reviewed-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amd/display: 3.2.300
Aric Cyr [Tue, 3 Sep 2024 12:45:48 +0000 (08:45 -0400)]
drm/amd/display: 3.2.300

- Add HDMI DSC native YCbCr422 support
- Add fullscreen only sharpening policy
- Restructure dpia link training
- Disable SYMCLK32_LE root clock gating
- Clean up dsc blocks in accelerated mode
- Block dynamic IPS2 on DCN35 for incompatible FW versions
- Add debug options to change sharpen policies
- Block timing sync for different output formats in pmo
- Enable DML2 override_det_buffer_size_kbytes
- Add dmub hpd sense callback
- Emulate Display Hotplug Hang
- Implement new DPCD register handling
- Use SDR white level to calculate matrix coefficients
- Round calculated vtotal

Reviewed-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Aric Cyr <aric.cyr@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amd/display: Add HDMI DSC native YCbCr422 support
Leo Ma [Mon, 19 Aug 2024 17:25:27 +0000 (13:25 -0400)]
drm/amd/display: Add HDMI DSC native YCbCr422 support

[WHY && HOW]
For some HDMI OVT timing, YCbCr422 encoding fails at the DSC
bandwidth check. The root cause is our DSC policy for timing
doesn't account for HDMI YCbCr422 native support.

Cc: Mario Limonciello <mario.limonciello@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Reviewed-by: Chris Park <chris.park@amd.com>
Signed-off-by: Leo Ma <hanghong.ma@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amd/display: Add fullscreen only sharpening policy
Relja Vojvodic [Wed, 28 Aug 2024 15:42:26 +0000 (11:42 -0400)]
drm/amd/display: Add fullscreen only sharpening policy

[WHAT & HOW]
Disable sharpening if not in fullscreen if this policy is selected

Reviewed-by: Samson Tam <samson.tam@amd.com>
Signed-off-by: Relja Vojvodic <Relja.Vojvodic@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amd/display: Restructure dpia link training
Peichen Huang [Thu, 22 Aug 2024 06:50:07 +0000 (14:50 +0800)]
drm/amd/display: Restructure dpia link training

[WHY]
We intend to consolidate dp tunneling and conventional dp link training.

[HOW]
1. Use the same link training entry for both dp and dpia
2. Move SET_CONFIG of non-transparent mode to dmub side
3. Add set_tps_notification dmub_cmd to notify tps request for
   non-transparent dpia link training
4. Check dpcd request result and abort link training early if dpia
   aux tunneling fails
5. Add option to avoid affect old product
6. Separately handle wait_time_microsec for dpia

Reviewed-by: Cruise Hung <cruise.hung@amd.com>
Reviewed-by: George Shen <george.shen@amd.com>
Reviewed-by: Meenakshikumar Somasundaram <meenakshikumar.somasundaram@amd.com>
Signed-off-by: Peichen Huang <PeiChen.Huang@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amd/display: Disable SYMCLK32_LE root clock gating
Sung Joon Kim [Tue, 27 Aug 2024 18:49:44 +0000 (14:49 -0400)]
drm/amd/display: Disable SYMCLK32_LE root clock gating

[WHY & HOW]
On display on sequence, enabling SYMCLK32_LE root clock gating
causes issue in link training so disabling it is needed.

Cc: Mario Limonciello <mario.limonciello@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Sung Joon Kim <Sungjoon.Kim@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amd/display: Clean up dsc blocks in accelerated mode
Martin Tsai [Mon, 22 Jul 2024 06:12:25 +0000 (14:12 +0800)]
drm/amd/display: Clean up dsc blocks in accelerated mode

[WHY]
DSC on eDP could be enabled during VBIOS post. The enabled
DSC may not be disabled when enter to OS, once the system was
in second screen only mode before entering to S4. In this
case, OS will not send setTimings to reset eDP path again.

The enabled DSC HW will make a new stream without DSC cannot
output normally if it reused this pipe with enabled DSC.

[HOW]
In accelerated mode, to clean up DSC blocks if eDP is on link
but not active when we are not in fast boot and seamless boot.

Cc: Mario Limonciello <mario.limonciello@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Reviewed-by: Charlene Liu <charlene.liu@amd.com>
Signed-off-by: Martin Tsai <martin.tsai@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amd/display: Block dynamic IPS2 on DCN35 for incompatible FW versions
Nicholas Kazlauskas [Tue, 27 Aug 2024 18:13:10 +0000 (14:13 -0400)]
drm/amd/display: Block dynamic IPS2 on DCN35 for incompatible FW versions

[WHY]
Hangs with Z8 can occur if running an older unfixed PMFW version.

[HOW]
Fallback to RCG only for dynamic IPS2 states if it's not newer than
93.12. Limit to DCN35.

Cc: Mario Limonciello <mario.limonciello@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Reviewed-by: Charlene Liu <charlene.liu@amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amd/display: Add debug options to change sharpen policies
Samson Tam [Tue, 27 Aug 2024 15:53:10 +0000 (11:53 -0400)]
drm/amd/display: Add debug options to change sharpen policies

[WHY]
Add options to change sharpen policy based on surface format
and scaling ratios.

[HOW]
Add sharpen_policy to change policy based on surface format
and scale_to_sharpness_policy based on scaling ratios.

Reviewed-by: Jun Lei <jun.lei@amd.com>
Signed-off-by: Samson Tam <Samson.Tam@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amd/display: Block timing sync for different output formats in pmo
Dillon Varone [Mon, 26 Aug 2024 21:08:33 +0000 (17:08 -0400)]
drm/amd/display: Block timing sync for different output formats in pmo

[WHY & HOW]
If the output format is different for HDMI TMDS signals, they are not
synchronizable.

Cc: Mario Limonciello <mario.limonciello@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Reviewed-by: Alvin Lee <alvin.lee2@amd.com>
Signed-off-by: Dillon Varone <dillon.varone@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amd/display: Enable DML2 override_det_buffer_size_kbytes
Yihan Zhu [Mon, 26 Aug 2024 18:44:04 +0000 (14:44 -0400)]
drm/amd/display: Enable DML2 override_det_buffer_size_kbytes

[WHY]
Corrupted screen will be observed when 4k144 DP/HDMI display and
4k144 eDP are connected, changing eDP refresh rate from 60Hz to 144Hz.

[HOW]
override_det_buffer_size_kbytes should be true for DCN35/DCN351.

Cc: Mario Limonciello <mario.limonciello@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Reviewed-by: Roman Li <roman.li@amd.com>
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Yihan Zhu <Yihan.Zhu@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 months agodrm/amd/display: Add dmub hpd sense callback
Roman Li [Wed, 21 Aug 2024 14:53:15 +0000 (10:53 -0400)]
drm/amd/display: Add dmub hpd sense callback

[WHY]
HPD sense notification has been implemented in DMUB, which
can occur during low power states and need to be
notified from firmware to driver.

[HOW]
Define callback and register new HPD sense notification.

Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Roman Li <Roman.Li@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>