linux-2.6-microblaze.git
2 years agopinctrl: starfive: Make the irqchip immutable
Geert Uytterhoeven [Wed, 18 May 2022 14:41:42 +0000 (16:41 +0200)]
pinctrl: starfive: Make the irqchip immutable

Commit 6c846d026d49 ("gpio: Don't fiddle with irqchips marked as
immutable") added a warning to indicate if the gpiolib is altering the
internals of irqchips.  Following this change the following warning is
now observed for the starfive driver:

    gpio gpiochip0: (11910000.pinctrl): not an immutable chip, please consider fixing it!

Fix this by making the irqchip in the starfive driver immutable.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/5eb66be34356afd5eb0ea9027329e0939d03d3a0.1652884852.git.geert+renesas@glider.be
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2 years agopinctrl: mediatek: Add pinctrl driver for MT6795 Helio X10
AngeloGioacchino Del Regno [Tue, 17 May 2022 08:39:57 +0000 (10:39 +0200)]
pinctrl: mediatek: Add pinctrl driver for MT6795 Helio X10

Add support for the MediaTek Helio X10 (MT6795) SoC's GPIO/pinmux
controller.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220517083957.11816-3-angelogioacchino.delregno@collabora.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2 years agodt-bindings: pinctrl: Add MediaTek MT6795 pinctrl bindings
AngeloGioacchino Del Regno [Tue, 17 May 2022 08:39:56 +0000 (10:39 +0200)]
dt-bindings: pinctrl: Add MediaTek MT6795 pinctrl bindings

Add devicetree and pinfunc bindings for MediaTek Helio X10 MT6795.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220517083957.11816-2-angelogioacchino.delregno@collabora.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2 years agopinctrl: freescale: Add i.MXRT1170 pinctrl driver support
Jesse Taube [Tue, 17 May 2022 03:27:59 +0000 (23:27 -0400)]
pinctrl: freescale: Add i.MXRT1170 pinctrl driver support

Add the pinctrl driver support for i.MXRT1170.

Cc: Giulio Benetti <giulio.benetti@benettiengineering.com>
Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Link: https://lore.kernel.org/r/20220517032802.451743-11-Mr.Bossman075@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2 years agodt-bindings: pinctrl: add i.MXRT1170 pinctrl Documentation
Jesse Taube [Tue, 17 May 2022 03:27:53 +0000 (23:27 -0400)]
dt-bindings: pinctrl: add i.MXRT1170 pinctrl Documentation

Add i.MXRT1170 pinctrl binding Documentation

Cc: Giulio Benetti <giulio.benetti@benettiengineering.com>
Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220517032802.451743-5-Mr.Bossman075@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2 years agodt-bindings: pinctrl: rockchip: increase max amount of device functions
Sebastian Reichel [Wed, 4 May 2022 21:32:48 +0000 (23:32 +0200)]
dt-bindings: pinctrl: rockchip: increase max amount of device functions

RK3588 can have 10 different device functions, so increase the maximum
amount appropriately. Considering rockchip uses auto-generated pinmux
files, adding a quite complex if construct to increase the limit just
for rk3588 does not seem to be worth the effort.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220504213251.264819-19-sebastian.reichel@collabora.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2 years agodt-bindings: pinctrl: qcom,pmic-gpio: add 'gpio-reserved-ranges'
Krzysztof Kozlowski [Sun, 8 May 2022 13:59:29 +0000 (15:59 +0200)]
dt-bindings: pinctrl: qcom,pmic-gpio: add 'gpio-reserved-ranges'

'gpio-reserved-ranges' property is already used and supported by common pinctrl
bindings, so add it also here to fix warnings like:

  qrb5165-rb5.dtb: gpio@c000: 'gpio-reserved-ranges' does not match any of the regexes: '-state$', 'pinctrl-[0-9]+'

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220508135932.132378-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2 years agodt-bindings: pinctrl: qcom,pmic-gpio: add 'input-disable'
Krzysztof Kozlowski [Sat, 7 May 2022 19:49:06 +0000 (21:49 +0200)]
dt-bindings: pinctrl: qcom,pmic-gpio: add 'input-disable'

'input-disable' is already used and supported by common pinctrl
bindings, so add it also here to fix warnings like:

  arch/arm64/boot/dts/qcom/qrb5165-rb5.dtb: gpio@c000: lt9611-rst-state: 'oneOf' conditional failed, one must be fixed:
    'input-disable' does not match any of the regexes: 'pinctrl-[0-9]+'
    'function', 'input-disable', 'output-high', 'pins', 'power-source' do not match any of the regexes: '(pinconf|-pins)$', 'pinctrl-[0-9]+'

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220507194913.261121-5-krzysztof.kozlowski@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2 years agodt-bindings: pinctrl: qcom,pmic-gpio: describe gpio-line-names
Krzysztof Kozlowski [Sat, 7 May 2022 19:49:05 +0000 (21:49 +0200)]
dt-bindings: pinctrl: qcom,pmic-gpio: describe gpio-line-names

Add missing 'gpio-line-names' property and describe its constraints for
all models except PM8226 (which seems not really used).

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220507194913.261121-4-krzysztof.kozlowski@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2 years agodt-bindings: pinctrl: qcom,pmic-gpio: fix matching pin config
Krzysztof Kozlowski [Sat, 7 May 2022 19:49:04 +0000 (21:49 +0200)]
dt-bindings: pinctrl: qcom,pmic-gpio: fix matching pin config

Matching PMIC GPIOs config nodes within a '-state' node by '.*' pattern
does not work as expected because of linux,phandle in the DTB:

  arch/arm64/boot/dts/qcom/msm8994-msft-lumia-octagon-cityman.dtb: gpios@c000: divclk4-state: 'oneOf' conditional failed, one must be fixed:
    'pins' is a required property
    'function' is a required property
    'pinconf' does not match any of the regexes: 'pinctrl-[0-9]+'
    [[2]] is not of type 'object'

Make the schema stricter and expect such nodes to be either named
'pinconfig' or followed with '-pins' prefix.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220507194913.261121-3-krzysztof.kozlowski@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2 years agodt-bindings: pinctrl: qcom,pmic-gpio: document PM8150L and PMM8155AU
Krzysztof Kozlowski [Sat, 7 May 2022 19:49:03 +0000 (21:49 +0200)]
dt-bindings: pinctrl: qcom,pmic-gpio: document PM8150L and PMM8155AU

Add missing compatibles for devices: PM8150L and PMM8155AU.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220507194913.261121-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2 years agopinctrl: qcom: spmi-gpio: Add pm6125 compatible
Marijn Suijten [Wed, 11 May 2022 22:06:09 +0000 (00:06 +0200)]
pinctrl: qcom: spmi-gpio: Add pm6125 compatible

The pm6125 has 9 GPIOs with no holes inbetween.

Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220511220613.1015472-4-marijn.suijten@somainline.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2 years agodt-bindings: pinctrl: qcom-pmic-gpio: Add pm6125 compatible
Marijn Suijten [Wed, 11 May 2022 22:06:08 +0000 (00:06 +0200)]
dt-bindings: pinctrl: qcom-pmic-gpio: Add pm6125 compatible

The pm6125 comes with 9 GPIOs, without holes.

Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220511220613.1015472-3-marijn.suijten@somainline.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2 years agopinctrl: stm32: Unshadow np variable in stm32_pctl_probe()
Andy Shevchenko [Sat, 7 May 2022 10:22:57 +0000 (13:22 +0300)]
pinctrl: stm32: Unshadow np variable in stm32_pctl_probe()

The np variable is used globally for stm32_pctl_probe() and in one of
its code branches. cppcheck is not happy with that:

  pinctrl-stm32.c:1530:23: warning: Local variable 'np' shadows outer variable [shadowVariable]

Instead of simply renaming one of the variables convert some code to
use a device pointer directly.

Fixes: bb949ed9b16b ("pinctrl: stm32: Switch to use for_each_gpiochip_node() helper")
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Fabien Dessenne <fabien.dessenne@foss.st.com>
Link: https://lore.kernel.org/r/20220507102257.26414-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2 years agoMerge tag 'renesas-pinctrl-for-v5.19-tag2' of git://git.kernel.org/pub/scm/linux...
Linus Walleij [Fri, 13 May 2022 23:01:56 +0000 (01:01 +0200)]
Merge tag 'renesas-pinctrl-for-v5.19-tag2' of git://git./linux/kernel/git/geert/renesas-drivers into devel

pinctrl: renesas: Updates for v5.19 (take two)

  - Reserved field optimizations,
  - Miscellaneous fixes and improvements.

2 years agopinctrl: microchip-sgpio: Switch to use fwnode instead of of_node
Andy Shevchenko [Tue, 3 May 2022 15:15:17 +0000 (18:15 +0300)]
pinctrl: microchip-sgpio: Switch to use fwnode instead of of_node

GPIO library now accepts fwnode as a firmware node, so
switch the driver to use it.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20220503151517.59115-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2 years agopinctrl: equilibrium: Switch to use fwnode instead of of_node
Andy Shevchenko [Tue, 3 May 2022 15:13:21 +0000 (18:13 +0300)]
pinctrl: equilibrium: Switch to use fwnode instead of of_node

GPIO library now accepts fwnode as a firmware node, so
switch the driver to use it.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20220503151321.58800-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2 years agopinctrl: microchip-sgpio: make irq_chip immutable
Michael Walle [Thu, 28 Apr 2022 11:16:22 +0000 (13:16 +0200)]
pinctrl: microchip-sgpio: make irq_chip immutable

Since recently, the kernel is nagging about mutable irq_chips:

[    4.967050] gpio gpiochip1: (e2004190.gpio-input): not an immutable chip, please consider fixing it!

Drop the unneeded copy, flag it as IRQCHIP_IMMUTABLE, add the new
helper functions and call the appropriate gpiolib functions.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20220428111622.1395831-1-michael@walle.cc
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2 years agoMerge branch 'irq/gpio-immutable' of git://git.kernel.org/pub/scm/linux/kernel/git...
Linus Walleij [Thu, 5 May 2022 14:50:14 +0000 (16:50 +0200)]
Merge branch 'irq/gpio-immutable' of git://git./linux/kernel/git/maz/arm-platforms into devel

2 years agopinctrl: stm32: Fix up errorpath after merge
Linus Walleij [Thu, 5 May 2022 14:24:06 +0000 (16:24 +0200)]
pinctrl: stm32: Fix up errorpath after merge

When merging the for_each_gpiochip_node() changes, I made
some mistakes by not disabling the clocks on the errorpath,
fix it up.

Fixes: a0912083086d ("Merge tag 'intel-gpio-v5.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/andy/linux-gpio-intel into devel")
Cc: Stephen Rothwell <sfr@canb.auug.org.au>
Cc: Fabien Dessenne <fabien.dessenne@foss.st.com>
Reported-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2 years agopinctrl: renesas: checker: Add reserved field checks
Geert Uytterhoeven [Wed, 13 Apr 2022 17:24:12 +0000 (19:24 +0200)]
pinctrl: renesas: checker: Add reserved field checks

Add checks for discovering registers with reserved fields that could
benefit from being described using variable-width reserved field
shorthands, reducing kernel size.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/f5a5159ba7b396e6f09dd3f23c864a74ed8e342d.1649865241.git.geert+renesas@glider.be
2 years agopinctrl: renesas: sh7786: Optimize fixed-width reserved fields
Geert Uytterhoeven [Wed, 13 Apr 2022 17:24:11 +0000 (19:24 +0200)]
pinctrl: renesas: sh7786: Optimize fixed-width reserved fields

Describe registers with fixed-width register fields and many reserved
fields using the PINMUX_CFG_REG_VAR() macro, as the latter supports a
shorthand not requiring dummy values.

This reduces kernel size by 79 bytes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/22487451ff7d8cce0182354c9553f3b171cc34d9.1649865241.git.geert+renesas@glider.be
2 years agopinctrl: renesas: sh7785: Optimize fixed-width reserved fields
Geert Uytterhoeven [Wed, 13 Apr 2022 17:24:10 +0000 (19:24 +0200)]
pinctrl: renesas: sh7785: Optimize fixed-width reserved fields

Describe registers with fixed-width register fields and many reserved
fields using the PINMUX_CFG_REG_VAR() macro, as the latter supports a
shorthand not requiring dummy values.

This reduces kernel size by 150 bytes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/07a238f13f80674d86719a5e869c65a2e0b8c1c1.1649865241.git.geert+renesas@glider.be
2 years agopinctrl: renesas: sh7757: Optimize fixed-width reserved fields
Geert Uytterhoeven [Wed, 13 Apr 2022 17:24:09 +0000 (19:24 +0200)]
pinctrl: renesas: sh7757: Optimize fixed-width reserved fields

Describe registers with fixed-width register fields and many reserved
fields using the PINMUX_CFG_REG_VAR() macro, as the latter supports a
shorthand not requiring dummy values.

This reduces kernel size by 115 bytes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/05c69ca8710134bb96ec8f7d18bafe42418f3510.1649865241.git.geert+renesas@glider.be
2 years agopinctrl: renesas: sh7734: Optimize fixed-width reserved fields
Geert Uytterhoeven [Wed, 13 Apr 2022 17:24:08 +0000 (19:24 +0200)]
pinctrl: renesas: sh7734: Optimize fixed-width reserved fields

Describe registers with fixed-width register fields and many reserved
fields using the PINMUX_CFG_REG_VAR() macro, as the latter supports a
shorthand not requiring dummy values.

This reduces kernel size by 161 bytes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/18e476c0a9f0af5b5d511d1c4922c6e299d1847a.1649865241.git.geert+renesas@glider.be
2 years agopinctrl: renesas: sh7724: Optimize fixed-width reserved fields
Geert Uytterhoeven [Wed, 13 Apr 2022 17:24:07 +0000 (19:24 +0200)]
pinctrl: renesas: sh7724: Optimize fixed-width reserved fields

Describe registers with fixed-width register fields and many reserved
fields using the PINMUX_CFG_REG_VAR() macro, as the latter supports a
shorthand not requiring dummy values.

This reduces kernel size by 8 bytes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/696dcad42a8b8395276301eb5dd5c5a895826f35.1649865241.git.geert+renesas@glider.be
2 years agopinctrl: renesas: sh7723: Optimize fixed-width reserved fields
Geert Uytterhoeven [Wed, 13 Apr 2022 17:24:06 +0000 (19:24 +0200)]
pinctrl: renesas: sh7723: Optimize fixed-width reserved fields

Describe registers with fixed-width register fields and many reserved
fields using the PINMUX_CFG_REG_VAR() macro, as the latter supports a
shorthand not requiring dummy values.

This reduces kernel size by 105 bytes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/5d7ef2fa02c2137d2d243fc183d18220c9aaf7b8.1649865241.git.geert+renesas@glider.be
2 years agopinctrl: renesas: sh7722: Optimize fixed-width reserved fields
Geert Uytterhoeven [Wed, 13 Apr 2022 17:24:05 +0000 (19:24 +0200)]
pinctrl: renesas: sh7722: Optimize fixed-width reserved fields

Describe registers with fixed-width register fields and many reserved
fields using the PINMUX_CFG_REG_VAR() macro, as the latter supports a
shorthand not requiring dummy values.

This reduces kernel size by 396 bytes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/c3965b6f9ea603b185924136f859c6eca7d5d6f4.1649865241.git.geert+renesas@glider.be
2 years agopinctrl: renesas: sh7720: Optimize fixed-width reserved fields
Geert Uytterhoeven [Wed, 13 Apr 2022 17:24:04 +0000 (19:24 +0200)]
pinctrl: renesas: sh7720: Optimize fixed-width reserved fields

Describe registers with fixed-width register fields and many reserved
fields using the PINMUX_CFG_REG_VAR() macro, as the latter supports a
shorthand not requiring dummy values.

This reduces kernel size by 128 bytes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/4b290f93a7edb1f91c97da90e67b7f6f3df62951.1649865241.git.geert+renesas@glider.be
2 years agopinctrl: renesas: sh73a0: Optimize fixed-width reserved fields
Geert Uytterhoeven [Wed, 13 Apr 2022 17:24:03 +0000 (19:24 +0200)]
pinctrl: renesas: sh73a0: Optimize fixed-width reserved fields

Describe registers with fixed-width register fields and many reserved
fields using the PINMUX_CFG_REG_VAR() macro, as the latter supports a
shorthand not requiring dummy values.

This reduces kernel size by 154 bytes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/e74738b403cc15b3407e7568d323fdae8e7b30dd.1649865241.git.geert+renesas@glider.be
2 years agopinctrl: renesas: sh7269: Optimize fixed-width reserved fields
Geert Uytterhoeven [Wed, 13 Apr 2022 17:24:02 +0000 (19:24 +0200)]
pinctrl: renesas: sh7269: Optimize fixed-width reserved fields

Describe registers with fixed-width register fields and many reserved
fields using the PINMUX_CFG_REG_VAR() macro, as the latter supports a
shorthand not requiring dummy values.

This reduces kernel size by 406 bytes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/feb1e865c2b6abbc0db24243143ea09ad143f6df.1649865241.git.geert+renesas@glider.be
2 years agopinctrl: renesas: sh7264: Optimize fixed-width reserved fields
Geert Uytterhoeven [Wed, 13 Apr 2022 17:24:01 +0000 (19:24 +0200)]
pinctrl: renesas: sh7264: Optimize fixed-width reserved fields

Describe registers with fixed-width register fields and many reserved
fields using the PINMUX_CFG_REG_VAR() macro, as the latter supports a
shorthand not requiring dummy values.

This reduces kernel size by 572 bytes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/434c274f626b2eab3539fe2ab80c6eda164e07fa.1649865241.git.geert+renesas@glider.be
2 years agopinctrl: renesas: sh7203: Optimize fixed-width reserved fields
Geert Uytterhoeven [Wed, 13 Apr 2022 17:24:00 +0000 (19:24 +0200)]
pinctrl: renesas: sh7203: Optimize fixed-width reserved fields

Describe registers with fixed-width register fields and many reserved
fields using the PINMUX_CFG_REG_VAR() macro, as the latter supports a
shorthand not requiring dummy values.

This reduces kernel size by 281 bytes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/c625b4eee298b88c2ee47ed80b0dea5d02ed56d1.1649865241.git.geert+renesas@glider.be
2 years agopinctrl: renesas: r8a779f0: Optimize fixed-width reserved fields
Geert Uytterhoeven [Wed, 13 Apr 2022 17:23:59 +0000 (19:23 +0200)]
pinctrl: renesas: r8a779f0: Optimize fixed-width reserved fields

Describe registers with fixed-width register fields and many reserved
fields using the PINMUX_CFG_REG_VAR() macro, as the latter supports a
shorthand not requiring dummy values.

This reduces kernel size by 183 bytes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/e50f9c8ef1261b7ceb6b1be637d4019fe7312250.1649865241.git.geert+renesas@glider.be
2 years agopinctrl: renesas: r8a779a0: Optimize fixed-width reserved fields
Geert Uytterhoeven [Wed, 13 Apr 2022 17:23:58 +0000 (19:23 +0200)]
pinctrl: renesas: r8a779a0: Optimize fixed-width reserved fields

Describe registers with fixed-width register fields and many reserved
fields using the PINMUX_CFG_REG_VAR() macro, as the latter supports a
shorthand not requiring dummy values.

This reduces kernel size by 556 bytes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/7db3751ecf96fcc469bd14eeb02d69e565956151.1649865241.git.geert+renesas@glider.be
2 years agopinctrl: renesas: r8a77995: Optimize fixed-width reserved fields
Geert Uytterhoeven [Wed, 13 Apr 2022 17:23:57 +0000 (19:23 +0200)]
pinctrl: renesas: r8a77995: Optimize fixed-width reserved fields

Describe registers with fixed-width register fields and many reserved
fields using the PINMUX_CFG_REG_VAR() macro, as the latter supports a
shorthand not requiring dummy values.

This reduces kernel size by 422 bytes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/d74af80fdb7b6d78b10634238a88e55a139e5c22.1649865241.git.geert+renesas@glider.be
2 years agopinctrl: renesas: r8a77990: Optimize fixed-width reserved fields
Geert Uytterhoeven [Wed, 13 Apr 2022 17:23:56 +0000 (19:23 +0200)]
pinctrl: renesas: r8a77990: Optimize fixed-width reserved fields

Describe registers with fixed-width register fields and many reserved
fields using the PINMUX_CFG_REG_VAR() macro, as the latter supports a
shorthand not requiring dummy values.

This reduces kernel size by 226 bytes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/924ba4505e33180e078ca72a1db8db13c193cbea.1649865241.git.geert+renesas@glider.be
2 years agopinctrl: renesas: r8a77980: Optimize fixed-width reserved fields
Geert Uytterhoeven [Wed, 13 Apr 2022 17:23:55 +0000 (19:23 +0200)]
pinctrl: renesas: r8a77980: Optimize fixed-width reserved fields

Describe registers with fixed-width register fields and many reserved
fields using the PINMUX_CFG_REG_VAR() macro, as the latter supports a
shorthand not requiring dummy values.

This reduces kernel size by 198 bytes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/0bf6b069a794b3c56c0c9311ac4b2ada577a9cb7.1649865241.git.geert+renesas@glider.be
2 years agopinctrl: renesas: r8a77970: Optimize fixed-width reserved fields
Geert Uytterhoeven [Wed, 13 Apr 2022 17:23:54 +0000 (19:23 +0200)]
pinctrl: renesas: r8a77970: Optimize fixed-width reserved fields

Describe registers with fixed-width register fields and many reserved
fields using the PINMUX_CFG_REG_VAR() macro, as the latter supports a
shorthand not requiring dummy values.

This reduces kernel size by 268 bytes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/33dd9bc41df888f132e2e6921d2ff38225b68105.1649865241.git.geert+renesas@glider.be
2 years agopinctrl: renesas: r8a7796: Optimize fixed-width reserved fields
Geert Uytterhoeven [Wed, 13 Apr 2022 17:23:53 +0000 (19:23 +0200)]
pinctrl: renesas: r8a7796: Optimize fixed-width reserved fields

Describe registers with fixed-width register fields and many reserved
fields using the PINMUX_CFG_REG_VAR() macro, as the latter supports a
shorthand not requiring dummy values.

This reduces kernel size by 496 bytes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/81f3586749bb1117c5636e9a9663d25e77cbe158.1649865241.git.geert+renesas@glider.be
2 years agopinctrl: renesas: r8a77965: Optimize fixed-width reserved fields
Geert Uytterhoeven [Wed, 13 Apr 2022 17:23:52 +0000 (19:23 +0200)]
pinctrl: renesas: r8a77965: Optimize fixed-width reserved fields

Describe registers with fixed-width register fields and many reserved
fields using the PINMUX_CFG_REG_VAR() macro, as the latter supports a
shorthand not requiring dummy values.

This reduces kernel size by 496 bytes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/2aff2f4c1ed6d834370ce6dd9379c8c93bfc0a92.1649865241.git.geert+renesas@glider.be
2 years agopinctrl: renesas: r8a77951: Optimize fixed-width reserved fields
Geert Uytterhoeven [Wed, 13 Apr 2022 17:23:51 +0000 (19:23 +0200)]
pinctrl: renesas: r8a77951: Optimize fixed-width reserved fields

Describe registers with fixed-width register fields and many reserved
fields using the PINMUX_CFG_REG_VAR() macro, as the latter supports a
shorthand not requiring dummy values.

This reduces kernel size by 496 bytes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/cd59cc2e0f55f0dcede1356f73a9e69fe09bf5eb.1649865241.git.geert+renesas@glider.be
2 years agopinctrl: renesas: r8a77950: Optimize fixed-width reserved fields
Geert Uytterhoeven [Wed, 13 Apr 2022 17:23:50 +0000 (19:23 +0200)]
pinctrl: renesas: r8a77950: Optimize fixed-width reserved fields

Describe registers with fixed-width register fields and many reserved
fields using the PINMUX_CFG_REG_VAR() macro, as the latter supports a
shorthand not requiring dummy values.

This reduces kernel size by 473 bytes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/a1617d24af2b9b3224ce84c0ada535565009fdda.1649865241.git.geert+renesas@glider.be
2 years agopinctrl: renesas: r8a7792: Optimize fixed-width reserved fields
Geert Uytterhoeven [Wed, 13 Apr 2022 17:23:49 +0000 (19:23 +0200)]
pinctrl: renesas: r8a7792: Optimize fixed-width reserved fields

Describe registers with fixed-width register fields and many reserved
fields using the PINMUX_CFG_REG_VAR() macro, as the latter supports a
shorthand not requiring dummy values.

This reduces kernel size by 257 bytes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/0f211d493a0cfbcd96d84a709d21bea51c7385ae.1649865241.git.geert+renesas@glider.be
2 years agopinctrl: renesas: r8a7779: Optimize fixed-width reserved fields
Geert Uytterhoeven [Wed, 13 Apr 2022 17:23:48 +0000 (19:23 +0200)]
pinctrl: renesas: r8a7779: Optimize fixed-width reserved fields

Describe registers with fixed-width register fields and many reserved
fields using the PINMUX_CFG_REG_VAR() macro, as the latter supports a
shorthand not requiring dummy values.

This reduces kernel size by 81 bytes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/ecc7377d2992694226dcf055bed0b617701a3d71.1649865241.git.geert+renesas@glider.be
2 years agopinctrl: renesas: r8a77470: Optimize fixed-width reserved fields
Geert Uytterhoeven [Wed, 13 Apr 2022 17:23:47 +0000 (19:23 +0200)]
pinctrl: renesas: r8a77470: Optimize fixed-width reserved fields

Describe registers with fixed-width register fields and many reserved
fields using the PINMUX_CFG_REG_VAR() macro, as the latter supports a
shorthand not requiring dummy values.

This reduces kernel size by 70 bytes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/c5183fcb3dd417d57ced0f60d091e2c7d37e1c8c.1649865241.git.geert+renesas@glider.be
2 years agopinctrl: renesas: r8a7740: Optimize fixed-width reserved fields
Geert Uytterhoeven [Wed, 13 Apr 2022 17:23:46 +0000 (19:23 +0200)]
pinctrl: renesas: r8a7740: Optimize fixed-width reserved fields

Describe registers with fixed-width register fields and many reserved
fields using the PINMUX_CFG_REG_VAR() macro, as the latter supports a
shorthand not requiring dummy values.

This reduces kernel size by 230 bytes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/a18fb98a4eefe648a1b1c5b5913dbeee092674c4.1649865241.git.geert+renesas@glider.be
2 years agopinctrl: renesas: r8a73a4: Optimize fixed-width reserved fields
Geert Uytterhoeven [Wed, 13 Apr 2022 17:23:45 +0000 (19:23 +0200)]
pinctrl: renesas: r8a73a4: Optimize fixed-width reserved fields

Describe registers with fixed-width register fields and many reserved
fields using the PINMUX_CFG_REG_VAR() macro, as the latter supports a
shorthand not requiring dummy values.

This reduces kernel size by 126 bytes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/f835c2ff5bb07e541f6377b16f0a32c5aad2a47f.1649865241.git.geert+renesas@glider.be
2 years agopinctrl: renesas: sh7734: Use shorthands for reserved fields
Geert Uytterhoeven [Wed, 13 Apr 2022 17:23:44 +0000 (19:23 +0200)]
pinctrl: renesas: sh7734: Use shorthands for reserved fields

Replace the full descriptions of reserved register fields by shorthands
with a negative field width, and merge adjacent reserved fields.

This reduces kernel size by 174 bytes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/3ab96d28494b8c5a2d427ba25f31a04ca0cc7305.1649865241.git.geert+renesas@glider.be
2 years agopinctrl: renesas: r8a779f0: Use shorthands for reserved fields
Geert Uytterhoeven [Wed, 13 Apr 2022 17:23:43 +0000 (19:23 +0200)]
pinctrl: renesas: r8a779f0: Use shorthands for reserved fields

Replace the full descriptions of reserved register fields by shorthands
with a negative field width, and merge adjacent reserved fields.

This reduces kernel size by 164 bytes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/c98e577996a71ae96145ee6da94aa18fd9ea85b9.1649865241.git.geert+renesas@glider.be
2 years agopinctrl: renesas: r8a779a0: Use shorthands for reserved fields
Geert Uytterhoeven [Wed, 13 Apr 2022 17:23:42 +0000 (19:23 +0200)]
pinctrl: renesas: r8a779a0: Use shorthands for reserved fields

Replace the full descriptions of reserved register fields by shorthands
with a negative field width, and merge adjacent reserved fields.

This reduces kernel size by 140 bytes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/807b2a7e02be2fac50c280961a4841813ab13cd8.1649865241.git.geert+renesas@glider.be
2 years agopinctrl: renesas: r8a77995: Use shorthands for reserved fields
Geert Uytterhoeven [Wed, 13 Apr 2022 17:23:41 +0000 (19:23 +0200)]
pinctrl: renesas: r8a77995: Use shorthands for reserved fields

Replace the full descriptions of reserved register fields by shorthands
with a negative field width, and merge adjacent reserved fields.

This reduces kernel size by 246 bytes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/7098704f89bb702c28036c567d3222521ff60f86.1649865241.git.geert+renesas@glider.be
2 years agopinctrl: renesas: r8a77990: Use shorthands for reserved fields
Geert Uytterhoeven [Wed, 13 Apr 2022 17:23:40 +0000 (19:23 +0200)]
pinctrl: renesas: r8a77990: Use shorthands for reserved fields

Replace the full descriptions of reserved register fields by shorthands
with a negative field width, and merge adjacent reserved fields.

This reduces kernel size by 40 bytes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/c032fce3fff6a6a63dc90f9ab8dfe1f4f3cf6ad6.1649865241.git.geert+renesas@glider.be
2 years agopinctrl: renesas: r8a77980: Use shorthands for reserved fields
Geert Uytterhoeven [Wed, 13 Apr 2022 17:23:39 +0000 (19:23 +0200)]
pinctrl: renesas: r8a77980: Use shorthands for reserved fields

Replace the full descriptions of reserved register fields by shorthands
with a negative field width, and merge adjacent reserved fields.

This reduces kernel size by 168 bytes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/c81b26815dff2e191b8c415624a20aa3b4725d23.1649865241.git.geert+renesas@glider.be
2 years agopinctrl: renesas: r8a77970: Use shorthands for reserved fields
Geert Uytterhoeven [Wed, 13 Apr 2022 17:23:38 +0000 (19:23 +0200)]
pinctrl: renesas: r8a77970: Use shorthands for reserved fields

Replace the full descriptions of reserved register fields by shorthands
with a negative field width, and merge adjacent reserved fields.

This reduces kernel size by 164 bytes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/f2dda82454bb1b0c97f842de2c9fa68da05ef3e6.1649865241.git.geert+renesas@glider.be
2 years agopinctrl: renesas: r8a77965: Use shorthands for reserved fields
Geert Uytterhoeven [Wed, 13 Apr 2022 17:23:37 +0000 (19:23 +0200)]
pinctrl: renesas: r8a77965: Use shorthands for reserved fields

Replace the full descriptions of reserved register fields by shorthands
with a negative field width, and merge adjacent reserved fields.

This reduces kernel size by 148 bytes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/1cf52b1f93e8af593a60f65d8a848d1ebb24cac6.1649865241.git.geert+renesas@glider.be
2 years agopinctrl: renesas: r8a7796: Use shorthands for reserved fields
Geert Uytterhoeven [Wed, 13 Apr 2022 17:23:36 +0000 (19:23 +0200)]
pinctrl: renesas: r8a7796: Use shorthands for reserved fields

Replace the full descriptions of reserved register fields by shorthands
with a negative field width, and merge adjacent reserved fields.

This reduces kernel size by 148 bytes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/433f5ddcc2dba7352825cba007b99b8e654d4c61.1649865241.git.geert+renesas@glider.be
2 years agopinctrl: renesas: r8a77951: Use shorthands for reserved fields
Geert Uytterhoeven [Wed, 13 Apr 2022 17:23:35 +0000 (19:23 +0200)]
pinctrl: renesas: r8a77951: Use shorthands for reserved fields

Replace the full descriptions of reserved register fields by shorthands
with a negative field width, and merge adjacent reserved fields.

This reduces kernel size by 152 bytes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/35d0ff4881335889002718540101bcdb8e7f5b5a.1649865241.git.geert+renesas@glider.be
2 years agopinctrl: renesas: r8a77950: Use shorthands for reserved fields
Geert Uytterhoeven [Wed, 13 Apr 2022 17:23:34 +0000 (19:23 +0200)]
pinctrl: renesas: r8a77950: Use shorthands for reserved fields

Replace the full descriptions of reserved register fields by shorthands
with a negative field width, and merge adjacent reserved fields.

This reduces kernel size by 232 bytes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/1866c399e94408439a469c12dc53557b55a00f3a.1649865241.git.geert+renesas@glider.be
2 years agopinctrl: renesas: r8a7794: Use shorthands for reserved fields
Geert Uytterhoeven [Wed, 13 Apr 2022 17:23:33 +0000 (19:23 +0200)]
pinctrl: renesas: r8a7794: Use shorthands for reserved fields

Replace the full descriptions of reserved register fields by shorthands
with a negative field width, and merge adjacent reserved fields.

This reduces kernel size by 201 bytes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/2fa43bd38c5cf260e89ae1da38d1a217ab762589.1649865241.git.geert+renesas@glider.be
2 years agopinctrl: renesas: r8a7792: Use shorthands for reserved fields
Geert Uytterhoeven [Wed, 13 Apr 2022 17:23:32 +0000 (19:23 +0200)]
pinctrl: renesas: r8a7792: Use shorthands for reserved fields

Replace the full descriptions of reserved register fields by shorthands
with a negative field width, and merge adjacent reserved fields.

This reduces kernel size by 784 bytes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/d39a52cf972a450ef5a0989ba7e448115a8147ba.1649865241.git.geert+renesas@glider.be
2 years agopinctrl: renesas: r8a7791: Use shorthands for reserved fields
Geert Uytterhoeven [Wed, 13 Apr 2022 17:23:31 +0000 (19:23 +0200)]
pinctrl: renesas: r8a7791: Use shorthands for reserved fields

Replace the full descriptions of reserved register fields by shorthands
with a negative field width, and merge adjacent reserved fields.

This reduces kernel size by 349 bytes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/972808be595fd742afc6b7fc89751ca4788d6f62.1649865241.git.geert+renesas@glider.be
2 years agopinctrl: renesas: r8a7790: Use shorthands for reserved fields
Geert Uytterhoeven [Wed, 13 Apr 2022 17:23:30 +0000 (19:23 +0200)]
pinctrl: renesas: r8a7790: Use shorthands for reserved fields

Replace the full descriptions of reserved register fields by shorthands
with a negative field width, and merge adjacent reserved fields.

This reduces kernel size by 445 bytes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/842d8060422a9b67dfac4af6d9325d0d99cf50dc.1649865241.git.geert+renesas@glider.be
2 years agopinctrl: renesas: r8a7779: Use shorthands for reserved fields
Geert Uytterhoeven [Wed, 13 Apr 2022 17:23:29 +0000 (19:23 +0200)]
pinctrl: renesas: r8a7779: Use shorthands for reserved fields

Replace the full descriptions of reserved register fields by shorthands
with a negative field width, and merge adjacent reserved fields.

This reduces kernel size by 197 bytes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/4b468118e0da681c860ed750976a990a0930dcba.1649865241.git.geert+renesas@glider.be
2 years agopinctrl: renesas: r8a7778: Use shorthands for reserved fields
Geert Uytterhoeven [Wed, 13 Apr 2022 17:23:28 +0000 (19:23 +0200)]
pinctrl: renesas: r8a7778: Use shorthands for reserved fields

Replace the full descriptions of reserved register fields by shorthands
with a negative field width, and merge adjacent reserved fields.

This reduces kernel size by 142 bytes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/1af5225c81ac871a461f7d824619275e2e0ed8df.1649865241.git.geert+renesas@glider.be
2 years agopinctrl: renesas: r8a77470: Use shorthands for reserved fields
Geert Uytterhoeven [Wed, 13 Apr 2022 17:23:27 +0000 (19:23 +0200)]
pinctrl: renesas: r8a77470: Use shorthands for reserved fields

Replace the full descriptions of reserved register fields by shorthands
with a negative field width, and merge adjacent reserved fields.

This reduces kernel size by 114 bytes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/bc8f9647bbf677ac67cbdb34cf0c8fbaf62fb7fc.1649865241.git.geert+renesas@glider.be
2 years agopinctrl: renesas: emev2: Use shorthands for reserved fields
Geert Uytterhoeven [Wed, 13 Apr 2022 17:23:26 +0000 (19:23 +0200)]
pinctrl: renesas: emev2: Use shorthands for reserved fields

Replace the full descriptions of reserved register fields by shorthands
with a negative field width, and merge adjacent reserved fields.

This reduces kernel size by 769 bytes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/616afe67d3b4d2cbf5f43876f9aa7b258862ceaa.1649865241.git.geert+renesas@glider.be
2 years agopinctrl: renesas: rmobile: Mark unused PORTCR bits reserved
Geert Uytterhoeven [Wed, 13 Apr 2022 17:23:25 +0000 (19:23 +0200)]
pinctrl: renesas: rmobile: Mark unused PORTCR bits reserved

The PULMD bits and the SEC bit in the PORTCR register descriptions on
SH/R-Mobile SoCs are either unused or unsupported.  Describe them as
reserved bits using a negative field width value, and drop the
corresponding dummy enum IDs.

This reduces kernel size by 2832 (R-Mobile APE6), 2544 (R-Mobile A1),
and/or 3228 (SH-Mobile AG5) bytes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/1b123d8f04c2314d5a7a87004971868ba2176499.1649865241.git.geert+renesas@glider.be
2 years agopinctrl: renesas: Add shorthand for reserved register fields
Geert Uytterhoeven [Wed, 13 Apr 2022 17:23:24 +0000 (19:23 +0200)]
pinctrl: renesas: Add shorthand for reserved register fields

Currently, reserved register fields must be fully described using dummy
enum IDs (zeroes), one for each possible state (2^bits states).

Add support for describing reserved fields using negative field width
values as shorthands, thus removing the need for dummy values.  Apart
from the obvious size reduction due to the removal of the dummy values,
this will also enable merging adjacent reserved fields into a single
field, reducing the number of fields to describe, and thus kernel size.

Update the checker accordingly.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/cad7c92ef039d9a4d039807efc15886a7aa862be.1649865241.git.geert+renesas@glider.be
2 years agopinctrl: renesas: r8a77470: Use fixed-width description for IPSR regs
Geert Uytterhoeven [Wed, 13 Apr 2022 17:23:23 +0000 (19:23 +0200)]
pinctrl: renesas: r8a77470: Use fixed-width description for IPSR regs

All fields in the IPSR registers on RZ/G1C have the same width, but the
driver describes them using the PINMUX_CFG_REG_VAR() macro, which
is intended for fields with different widths.  Convert the description
to use the PINMUX_CFG_REG() macro for fixed-width fields instead.

This reduces kernel size by 162 bytes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/f6f26a0dfd16050ead83daf2b9fabeb8b26821a6.1649865241.git.geert+renesas@glider.be
2 years agopinctrl: nomadik: Setup parent device and get rid of unnecessary of_node assignment
Andy Shevchenko [Tue, 3 May 2022 15:13:10 +0000 (18:13 +0300)]
pinctrl: nomadik: Setup parent device and get rid of unnecessary of_node assignment

Some of the drivers do not set parent device. This may lead to obstacles
during debugging or understanding the device relations from the Linux
point of view. Assign parent device for GPIO chips created by these
drivers.

While at it, let GPIO library to assign of_node from the parent device.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20220503151310.58762-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2 years agopinctrl: stm32: prevent the use of the secure protected pins
Fabien Dessenne [Mon, 2 May 2022 15:31:14 +0000 (17:31 +0200)]
pinctrl: stm32: prevent the use of the secure protected pins

The hardware denies any access from the Linux non-secure world to the
secure-protected pins. Hence, prevent any driver to request such a pin.

Mark the secure-protected GPIO lines as invalid (.init_valid_mask) and
prevent the pinmux request / pinconf setting operations.
Identify the secure pins with "NO ACCESS" in the pinconf sysfs.

Signed-off-by: Fabien Dessenne <fabien.dessenne@foss.st.com>
Link: https://lore.kernel.org/r/20220502153114.283618-1-fabien.dessenne@foss.st.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2 years agopinctrl: stm32: improve debugfs information of pinconf-pins entry
Fabien Dessenne [Mon, 2 May 2022 15:25:24 +0000 (17:25 +0200)]
pinctrl: stm32: improve debugfs information of pinconf-pins entry

Print the name of the selected alternate function in addition to its
number. Ex:
   "pin 135 (PI7): alternate 10 (SAI2_FS_A) - ..."

Signed-off-by: Fabien Dessenne <fabien.dessenne@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Link: https://lore.kernel.org/r/20220502152524.283374-1-fabien.dessenne@foss.st.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2 years agopinctrl: apple: Make it work as a module
Hector Martin [Mon, 2 May 2022 09:23:35 +0000 (18:23 +0900)]
pinctrl: apple: Make it work as a module

We need MODULE_DEVICE_TABLE for module autoloading to work.

Signed-off-by: Hector Martin <marcan@marcan.st>
Link: https://lore.kernel.org/r/20220502092335.30670-1-marcan@marcan.st
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2 years agopinctrl: nuvoton: Fix irq_of_parse_and_map() return value
Krzysztof Kozlowski [Sat, 23 Apr 2022 09:41:42 +0000 (11:41 +0200)]
pinctrl: nuvoton: Fix irq_of_parse_and_map() return value

The irq_of_parse_and_map() returns 0 on failure, not a negative ERRNO.

Fixes: 3b588e43ee5c ("pinctrl: nuvoton: add NPCM7xx pinctrl and GPIO driver")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220423094142.33013-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2 years agopinctrl: tegra: tegra194: drop unused pin groups
Krzysztof Kozlowski [Fri, 29 Apr 2022 06:13:32 +0000 (08:13 +0200)]
pinctrl: tegra: tegra194: drop unused pin groups

The sdmmc1_hv_trim_pins, sdmmc3_hv_trim_pins and sys_reset_n_pins are
not defined as pin groups:

  drivers/pinctrl/tegra/pinctrl-tegra194.c:1119:27: error: â€˜sdmmc3_hv_trim_pins’ defined but not used [-Werror=unused-const-variable=]
   1119 | static const unsigned int sdmmc3_hv_trim_pins[] = {

Proper fix would be to define them, but this requires knowledge from
datasheet.  Removal should not cause any harm and at least it silences
the warnings.

Fixes: 613c0826081b ("pinctrl: tegra: Add pinmux support for Tegra194")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220429061332.25135-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2 years agodt-bindings: pinctrl: aspeed: Drop referenced nodes in examples
Rob Herring [Fri, 22 Apr 2022 19:21:38 +0000 (14:21 -0500)]
dt-bindings: pinctrl: aspeed: Drop referenced nodes in examples

The additional nodes in the example referenced from the pinctrl node
'aspeed,external-nodes' properties are either incorrect (aspeed,ast2500-lpc)
or not documented with a schema (aspeed,ast2500-gfx). There's no need to
show these nodes as part of the pinctrl example, so just remove them.

Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220422192139.2592632-1-robh@kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2 years agoMerge tag 'intel-gpio-v5.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/andy...
Linus Walleij [Wed, 4 May 2022 21:15:21 +0000 (23:15 +0200)]
Merge tag 'intel-gpio-v5.19-1' of git://git./linux/kernel/git/andy/linux-gpio-intel into devel

intel-gpio for v5.19-1

* Introduce helpers to iterate over GPIO chip nodes and covert some drivers

The following is an automated git shortlog grouped by driver:

gpiolib:
 -  Introduce a helper to get first GPIO controller node
 -  Introduce gpiochip_node_count() helper
 -  Introduce for_each_gpiochip_node() loop helper

pinctrl:
 -  meson: Replace custom code by gpiochip_node_count() call
 -  meson: Enable COMPILE_TEST
 -  meson: Rename REG_* to MESON_REG_*
 -  armada-37xx: Reuse GPIO fwnode in armada_37xx_irqchip_register()
 -  armada-37xx: Switch to use fwnode instead of of_node
 -  samsung: Switch to use for_each_gpiochip_node() helper
 -  samsung: Drop redundant node parameter in samsung_banks_of_node_get()
 -  npcm7xx: Switch to use for_each_gpiochip_node() helper
 -  renesas: rza1: Switch to use for_each_gpiochip_node() helper
 -  renesas: rza1: Replace custom code by gpiochip_node_count() call
 -  stm32: Switch to use for_each_gpiochip_node() helper
 -  stm32: Replace custom code by gpiochip_node_count() call

2 years agopinctrl: renesas: rzn1: Fix possible null-ptr-deref in sh_pfc_map_resources()
Yang Yingliang [Fri, 29 Apr 2022 08:26:37 +0000 (16:26 +0800)]
pinctrl: renesas: rzn1: Fix possible null-ptr-deref in sh_pfc_map_resources()

It will cause null-ptr-deref when using 'res', if platform_get_resource()
returns NULL, so move using 'res' after devm_ioremap_resource() that
will check it to avoid null-ptr-deref.
And use devm_platform_get_and_ioremap_resource() to simplify code.

Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
Link: https://lore.kernel.org/r/20220429082637.1308182-2-yangyingliang@huawei.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2 years agopinctrl: renesas: core: Fix possible null-ptr-deref in sh_pfc_map_resources()
Yang Yingliang [Fri, 29 Apr 2022 08:26:36 +0000 (16:26 +0800)]
pinctrl: renesas: core: Fix possible null-ptr-deref in sh_pfc_map_resources()

It will cause null-ptr-deref when using 'res', if platform_get_resource()
returns NULL, so move using 'res' after devm_ioremap_resource() that
will check it to avoid null-ptr-deref.
And use devm_platform_get_and_ioremap_resource() to simplify code.

Fixes: c7977ec4a336 ("pinctrl: sh-pfc: Convert to platform_get_*()")
Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
Link: https://lore.kernel.org/r/20220429082637.1308182-1-yangyingliang@huawei.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2 years agopinctrl: renesas: r8a779f0: Fix GPIO function on I2C-capable pins
Geert Uytterhoeven [Fri, 22 Apr 2022 07:29:31 +0000 (09:29 +0200)]
pinctrl: renesas: r8a779f0: Fix GPIO function on I2C-capable pins

Unlike on R-Car Gen3 SoCs, setting a bit to zero in a GPIO / Peripheral
Function Select Register (GPSRn) on R-Car S4-8 is not always sufficient
to configure a pin for GPIO.  For I2C-capable pins, the I2C function
must also be explicitly disabled in the corresponding Module Select
Register (MODSELn).

Add the missing FN_SEL_I2Ci_0 function enums to the pinmux_data[] array
by temporarily overriding the GP_1_j_FN function enum to expand to two
enums: the original GP_1_j_FN enum to configure the GPSR register bits,
and the missing FN_SEL_I2Ci_0 enum to configure the MODSEL register
bits.

Fixes: 030ac6d7eeff81e3 ("pinctrl: renesas: Initial R8A779F0 PFC support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/c12c60ec1058140a37f03650043ab73f730f104f.1650610471.git.geert+renesas@glider.be
2 years agopinctrl: renesas: r8a779a0: Fix GPIO function on I2C-capable pins
Geert Uytterhoeven [Fri, 22 Apr 2022 07:29:30 +0000 (09:29 +0200)]
pinctrl: renesas: r8a779a0: Fix GPIO function on I2C-capable pins

Unlike on R-Car Gen3 SoCs, setting a bit to zero in a GPIO / Peripheral
Function Select Register (GPSRn) on R-Car V3U is not always sufficient
to configure a pin for GPIO.  For I2C-capable pins, the I2C function
must also be explicitly disabled in the corresponding Module Select
Register (MODSELn).

Add the missing FN_SEL_I2Ci_0 function enums to the pinmux_data[] array
by temporarily overriding the GP_2_j_FN function enum to expand to two
enums: the original GP_2_j_FN enum to configure the GSPR register bits,
and the missing FN_SEL_I2Ci_0 enum to configure the MODSEL register
bits.

Fixes: 741a7370fc3b8b54 ("pinctrl: renesas: Initial R8A779A0 (V3U) PFC support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/4611e29e7b105513883084c1d6dc39c3ac8b525c.1650610471.git.geert+renesas@glider.be
2 years agopinctrl: stm32: improve bank clocks management
Fabien Dessenne [Fri, 22 Apr 2022 14:36:08 +0000 (16:36 +0200)]
pinctrl: stm32: improve bank clocks management

Instead of enabling/disabling the clock at each IO configuration update,
just keep the clock enabled from the probe.
This makes things simpler and more efficient (e.g. the time required to
toggle an output IO is drastically decreased) without significantly
increasing the power consumption.

Signed-off-by: Fabien Dessenne <fabien.dessenne@foss.st.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Link: https://lore.kernel.org/r/20220422143608.226580-1-fabien.dessenne@foss.st.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2 years agoMerge tag 'v5.18-rc5' into devel
Linus Walleij [Sun, 1 May 2022 21:25:10 +0000 (23:25 +0200)]
Merge tag 'v5.18-rc5' into devel

Merge in Linux 5.18-rc5 since new code to the STM32 driver
depend in a non-trivial way on the fixes merged in -rc5.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2 years agoLinux 5.18-rc5
Linus Torvalds [Sun, 1 May 2022 20:57:58 +0000 (13:57 -0700)]
Linux 5.18-rc5

2 years agoMerge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm
Linus Torvalds [Sun, 1 May 2022 18:49:32 +0000 (11:49 -0700)]
Merge tag 'for-linus' of git://git./virt/kvm/kvm

Pull kvm fixes from Paolo Bonzini:
 "ARM:

   - Take care of faults occuring between the PARange and IPA range by
     injecting an exception

   - Fix S2 faults taken from a host EL0 in protected mode

   - Work around Oops caused by a PMU access from a 32bit guest when PMU
     has been created. This is a temporary bodge until we fix it for
     good.

  x86:

   - Fix potential races when walking host page table

   - Fix shadow page table leak when KVM runs nested

   - Work around bug in userspace when KVM synthesizes leaf 0x80000021
     on older (pre-EPYC) or Intel processors

  Generic (but affects only RISC-V):

   - Fix bad user ABI for KVM_EXIT_SYSTEM_EVENT"

* tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm:
  KVM: x86: work around QEMU issue with synthetic CPUID leaves
  Revert "x86/mm: Introduce lookup_address_in_mm()"
  KVM: x86/mmu: fix potential races when walking host page table
  KVM: fix bad user ABI for KVM_EXIT_SYSTEM_EVENT
  KVM: x86/mmu: Do not create SPTEs for GFNs that exceed host.MAXPHYADDR
  KVM: arm64: Inject exception on out-of-IPA-range translation fault
  KVM/arm64: Don't emulate a PMU for 32-bit guests if feature not set
  KVM: arm64: Handle host stage-2 faults from 32-bit EL0

2 years agoMerge tag 'x86_urgent_for_v5.18_rc5' of git://git.kernel.org/pub/scm/linux/kernel...
Linus Torvalds [Sun, 1 May 2022 17:03:36 +0000 (10:03 -0700)]
Merge tag 'x86_urgent_for_v5.18_rc5' of git://git./linux/kernel/git/tip/tip

Pull x86 fixes from Borislav Petkov:

 - A fix to disable PCI/MSI[-X] masking for XEN_HVM guests as that is
   solely controlled by the hypervisor

 - A build fix to make the function prototype (__warn()) as visible as
   the definition itself

 - A bunch of objtool annotation fixes which have accumulated over time

 - An ORC unwinder fix to handle bad input gracefully

 - Well, we thought the microcode gets loaded in time in order to
   restore the microcode-emulated MSRs but we thought wrong. So there's
   a fix for that to have the ordering done properly

 - Add new Intel model numbers

 - A spelling fix

* tag 'x86_urgent_for_v5.18_rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/pci/xen: Disable PCI/MSI[-X] masking for XEN_HVM guests
  bug: Have __warn() prototype defined unconditionally
  x86/Kconfig: fix the spelling of 'becoming' in X86_KERNEL_IBT config
  objtool: Use offstr() to print address of missing ENDBR
  objtool: Print data address for "!ENDBR" data warnings
  x86/xen: Add ANNOTATE_NOENDBR to startup_xen()
  x86/uaccess: Add ENDBR to __put_user_nocheck*()
  x86/retpoline: Add ANNOTATE_NOENDBR for retpolines
  x86/static_call: Add ANNOTATE_NOENDBR to static call trampoline
  objtool: Enable unreachable warnings for CLANG LTO
  x86,objtool: Explicitly mark idtentry_body()s tail REACHABLE
  x86,objtool: Mark cpu_startup_entry() __noreturn
  x86,xen,objtool: Add UNWIND hint
  lib/strn*,objtool: Enforce user_access_begin() rules
  MAINTAINERS: Add x86 unwinding entry
  x86/unwind/orc: Recheck address range after stack info was updated
  x86/cpu: Load microcode during restore_processor_state()
  x86/cpu: Add new Alderlake and Raptorlake CPU model numbers

2 years agoMerge tag 'objtool_urgent_for_v5.18_rc5' of git://git.kernel.org/pub/scm/linux/kernel...
Linus Torvalds [Sun, 1 May 2022 16:34:54 +0000 (09:34 -0700)]
Merge tag 'objtool_urgent_for_v5.18_rc5' of git://git./linux/kernel/git/tip/tip

Pull objtool fixes from Borislav Petkov:
 "A bunch of objtool fixes to improve unwinding, sibling call detection,
  fallthrough detection and relocation handling of weak symbols when the
  toolchain strips section symbols"

* tag 'objtool_urgent_for_v5.18_rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  objtool: Fix code relocs vs weak symbols
  objtool: Fix type of reloc::addend
  objtool: Fix function fallthrough detection for vmlinux
  objtool: Fix sibling call detection in alternatives
  objtool: Don't set 'jump_dest' for sibling calls
  x86/uaccess: Don't jump between functions

2 years agoMerge tag 'irq_urgent_for_v5.18_rc5' of git://git.kernel.org/pub/scm/linux/kernel...
Linus Torvalds [Sun, 1 May 2022 16:30:47 +0000 (09:30 -0700)]
Merge tag 'irq_urgent_for_v5.18_rc5' of git://git./linux/kernel/git/tip/tip

Pull irq fix from Borislav Petkov:

 - Fix locking when accessing device MSI descriptors

* tag 'irq_urgent_for_v5.18_rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  bus: fsl-mc-msi: Fix MSI descriptor mutex lock for msi_first_desc()

2 years agoMerge tag 'driver-core-5.18-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git...
Linus Torvalds [Sat, 30 Apr 2022 17:24:21 +0000 (10:24 -0700)]
Merge tag 'driver-core-5.18-rc5' of git://git./linux/kernel/git/gregkh/driver-core

Pull driver core fixes from Greg KH:
 "Here are some small driver core and kernfs fixes for some reported
  problems. They include:

   - kernfs regression that is causing oopses in 5.17 and newer releases

   - topology sysfs fixes for a few small reported problems.

  All of these have been in linux-next for a while with no reported
  issues"

* tag 'driver-core-5.18-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core:
  kernfs: fix NULL dereferencing in kernfs_remove
  topology: Fix up build warning in topology_is_visible()
  arch_topology: Do not set llc_sibling if llc_id is invalid
  topology: make core_mask include at least cluster_siblings
  topology/sysfs: Hide PPIN on systems that do not support it.

2 years agoMerge tag 'char-misc-5.18-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/gregk...
Linus Torvalds [Sat, 30 Apr 2022 17:15:57 +0000 (10:15 -0700)]
Merge tag 'char-misc-5.18-rc5' of git://git./linux/kernel/git/gregkh/char-misc

Pull char/misc driver fixes from Greg KH:
 "Here are a small number of char/misc/other driver fixes for 5.18-rc5

  Nothing major in here, this is mostly IIO driver fixes along with some
  other small things:

   - at25 driver fix for systems without a dma-able stack

   - phy driver fixes for reported issues

   - binder driver fixes for reported issues

  All of these have been in linux-next without any reported problems"

* tag 'char-misc-5.18-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (31 commits)
  eeprom: at25: Use DMA safe buffers
  binder: Gracefully handle BINDER_TYPE_FDA objects with num_fds=0
  binder: Address corner cases in deferred copy and fixup
  phy: amlogic: fix error path in phy_g12a_usb3_pcie_probe()
  iio: imu: inv_icm42600: Fix I2C init possible nack
  iio: dac: ltc2688: fix voltage scale read
  interconnect: qcom: sdx55: Drop IP0 interconnects
  interconnect: qcom: sc7180: Drop IP0 interconnects
  phy: ti: Add missing pm_runtime_disable() in serdes_am654_probe
  phy: mapphone-mdm6600: Fix PM error handling in phy_mdm6600_probe
  phy: ti: omap-usb2: Fix error handling in omap_usb2_enable_clocks
  bus: mhi: host: pci_generic: Flush recovery worker during freeze
  bus: mhi: host: pci_generic: Add missing poweroff() PM callback
  phy: ti: tusb1210: Fix an error handling path in tusb1210_probe()
  phy: samsung: exynos5250-sata: fix missing device put in probe error paths
  phy: samsung: Fix missing of_node_put() in exynos_sata_phy_probe
  phy: ti: Fix missing of_node_put in ti_pipe3_get_sysctrl()
  phy: ti: tusb1210: Make tusb1210_chg_det_states static
  iio:dac:ad3552r: Fix an IS_ERR() vs NULL check
  iio: sx9324: Fix default precharge internal resistance register
  ...

2 years agoMerge tag 'tty-5.18-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty
Linus Torvalds [Sat, 30 Apr 2022 17:09:14 +0000 (10:09 -0700)]
Merge tag 'tty-5.18-rc5' of git://git./linux/kernel/git/gregkh/tty

Pull tty/serial fixes from Greg KH:
 "Here are some small serial driver fixes, and a larger number of GSM
  line discipline fixes for 5.18-rc5.

  These include:

   - lots of tiny n_gsm fixes for issues to resolve a number of reported
     problems. Seems that people are starting to actually use this code
     again.

   - 8250 driver fixes for some devices

   - imx serial driver fix

   - amba-pl011 driver fix

  All of these have been in linux-next for a while with no reported
  issues"

* tag 'tty-5.18-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty: (27 commits)
  tty: n_gsm: fix sometimes uninitialized warning in gsm_dlci_modem_output()
  serial: 8250: Correct the clock for EndRun PTP/1588 PCIe device
  serial: 8250: Also set sticky MCR bits in console restoration
  tty: n_gsm: fix software flow control handling
  tty: n_gsm: fix invalid use of MSC in advanced option
  tty: n_gsm: fix broken virtual tty handling
  Revert "serial: sc16is7xx: Clear RS485 bits in the shutdown"
  tty: n_gsm: fix missing update of modem controls after DLCI open
  serial: 8250: Fix runtime PM for start_tx() for empty buffer
  serial: imx: fix overrun interrupts in DMA mode
  serial: amba-pl011: do not time out prematurely when draining tx fifo
  tty: n_gsm: fix incorrect UA handling
  tty: n_gsm: fix reset fifo race condition
  tty: n_gsm: fix missing tty wakeup in convergence layer type 2
  tty: n_gsm: fix wrong signal octets encoding in MSC
  tty: n_gsm: fix wrong command frame length field encoding
  tty: n_gsm: fix wrong command retry handling
  tty: n_gsm: fix missing explicit ldisc flush
  tty: n_gsm: fix wrong DLCI release order
  tty: n_gsm: fix insufficient txframe size
  ...

2 years agoMerge tag 'usb-5.18-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb
Linus Torvalds [Sat, 30 Apr 2022 16:58:46 +0000 (09:58 -0700)]
Merge tag 'usb-5.18-rc5' of git://git./linux/kernel/git/gregkh/usb

Pull USB fixes from Greg KH:
 "Here are a number of small USB driver fixes for 5.18-rc5 for some
  reported issues and new quirks. They include:

   - dwc3 driver fixes

   - xhci driver fixes

   - typec driver fixes

   - new usb-serial driver ids

   - added new USB devices to existing quirk tables

   - other tiny fixes

  All of these have been in linux-next for a while with no reported
  issues"

* tag 'usb-5.18-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (31 commits)
  usb: phy: generic: Get the vbus supply
  usb: dwc3: gadget: Return proper request status
  usb: dwc3: pci: add support for the Intel Meteor Lake-P
  usb: dwc3: core: Only handle soft-reset in DCTL
  usb: gadget: configfs: clear deactivation flag in configfs_composite_unbind()
  usb: misc: eud: Fix an error handling path in eud_probe()
  usb: core: Don't hold the device lock while sleeping in do_proc_control()
  usb: dwc3: Try usb-role-switch first in dwc3_drd_init
  usb: dwc3: core: Fix tx/rx threshold settings
  usb: mtu3: fix USB 3.0 dual-role-switch from device to host
  xhci: Enable runtime PM on second Alderlake controller
  usb: dwc3: fix backwards compat with rockchip devices
  dt-bindings: usb: samsung,exynos-usb2: add missing required reg
  usb: misc: fix improper handling of refcount in uss720_probe()
  USB: Fix ehci infinite suspend-resume loop issue in zhaoxin
  usb: typec: tcpm: Fix undefined behavior due to shift overflowing the constant
  usb: typec: rt1719: Fix build error without CONFIG_POWER_SUPPLY
  usb: typec: ucsi: Fix role swapping
  usb: typec: ucsi: Fix reuse of completion structure
  usb: xhci: tegra:Fix PM usage reference leak of tegra_xusb_unpowergate_partitions
  ...

2 years agoMerge tag 'scsi-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi
Linus Torvalds [Sat, 30 Apr 2022 16:47:59 +0000 (09:47 -0700)]
Merge tag 'scsi-fixes' of git://git./linux/kernel/git/jejb/scsi

Pull SCSI fix from James Bottomley:
 "One fix for an endless error loop with the target driver affecting
  tapes"

* tag 'scsi-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi:
  scsi: target: pscsi: Set SCF_TREAT_READ_AS_NORMAL flag only if there is valid data

2 years agoMerge tag 'soc-fixes-5.18-3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Linus Torvalds [Fri, 29 Apr 2022 22:51:05 +0000 (15:51 -0700)]
Merge tag 'soc-fixes-5.18-3' of git://git./linux/kernel/git/soc/soc

Pull ARM SoC fixes from Arnd Bergmann:

 - A fix for a regression caused by the previous set of bugfixes
   changing tegra and at91 pinctrl properties.

   More work is needed to figure out what this should actually be, but a
   revert makes it work for the moment.

 - Defconfig regression fixes for tegra after renamed symbols

 - Build-time warning and static checker fixes for imx, op-tee, sunxi,
   meson, at91, and omap

 - More at91 DT fixes for audio, regulator and spi nodes

 - A regression fix for Renesas Hyperflash memory probe

 - A stability fix for amlogic boards, modifying the allowed cpufreq
   states

 - Multiple fixes for system suspend on omap2+

 - DT fixes for various i.MX bugs

 - A probe error fix for imx6ull-colibri MMC

 - A MAINTAINERS file entry for samsung bug reports

* tag 'soc-fixes-5.18-3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (42 commits)
  Revert "arm: dts: at91: Fix boolean properties with values"
  bus: sunxi-rsb: Fix the return value of sunxi_rsb_device_create()
  Revert "arm64: dts: tegra: Fix boolean properties with values"
  arm64: dts: imx8mn-ddr4-evk: Describe the 32.768 kHz PMIC clock
  ARM: dts: imx6ull-colibri: fix vqmmc regulator
  MAINTAINERS: add Bug entry for Samsung and memory controller drivers
  memory: renesas-rpc-if: Fix HF/OSPI data transfer in Manual Mode
  ARM: dts: logicpd-som-lv: Fix wrong pinmuxing on OMAP35
  ARM: dts: am3517-evm: Fix misc pinmuxing
  ARM: dts: am33xx-l4: Add missing touchscreen clock properties
  ARM: dts: Fix mmc order for omap3-gta04
  ARM: dts: at91: fix pinctrl phandles
  ARM: dts: at91: sama5d4_xplained: fix pinctrl phandle name
  ARM: dts: at91: Describe regulators on at91sam9g20ek
  ARM: dts: at91: Map MCLK for wm8731 on at91sam9g20ek
  ARM: dts: at91: Fix boolean properties with values
  ARM: dts: at91: use generic node name for dataflash
  ARM: dts: at91: align SPI NOR node name with dtschema
  ARM: dts: at91: sama7g5ek: Align the impedance of the QSPI0's HSIO and PCB lines
  ARM: dts: at91: sama7g5ek: enable pull-up on flexcom3 console lines
  ...

2 years agoMerge tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git...
Linus Torvalds [Fri, 29 Apr 2022 22:38:23 +0000 (15:38 -0700)]
Merge tag 'clk-fixes-for-linus' of git://git./linux/kernel/git/clk/linux

Pull clk fixes from Stephen Boyd:
 "A semi-large pile of clk driver fixes this time around.

  Nothing is touching the core so these fixes are fairly well contained
  to specific devices that use these clk drivers.

   - Some Allwinner SoC fixes to gracefully handle errors and mark an
     RTC clk as critical so that the RTC keeps ticking.

   - Fix AXI bus clks and RTC clk design for Microchip PolarFire SoC
     driver introduced this cycle. This has some devicetree bits acked
     by riscv maintainers. We're fixing it now so that the prior
     bindings aren't released in a major kernel version.

   - Remove a reset on Microchip PolarFire SoCs that broke when enabling
     CONFIG_PM.

   - Set a min/max for the Qualcomm graphics clk. This got broken by the
     clk rate range patches introduced this cycle"

* tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux:
  clk: sunxi: sun9i-mmc: check return value after calling platform_get_resource()
  clk: sunxi-ng: sun6i-rtc: Mark rtc-32k as critical
  riscv: dts: microchip: reparent mpfs clocks
  clk: microchip: mpfs: add RTCREF clock control
  clk: microchip: mpfs: re-parent the configurable clocks
  dt-bindings: rtc: add refclk to mpfs-rtc
  dt-bindings: clk: mpfs: add defines for two new clocks
  dt-bindings: clk: mpfs document msspll dri registers
  riscv: dts: microchip: fix usage of fic clocks on mpfs
  clk: microchip: mpfs: mark CLK_ATHENA as critical
  clk: microchip: mpfs: fix parents for FIC clocks
  clk: qcom: clk-rcg2: fix gfx3d frequency calculation
  clk: microchip: mpfs: don't reset disabled peripherals
  clk: sunxi-ng: fix not NULL terminated coccicheck error

2 years agoMerge tag 'block-5.18-2022-04-29' of git://git.kernel.dk/linux-block
Linus Torvalds [Fri, 29 Apr 2022 22:28:42 +0000 (15:28 -0700)]
Merge tag 'block-5.18-2022-04-29' of git://git.kernel.dk/linux-block

Pull block fixes from Jens Axboe:

 - Revert of a patch that caused timestamp issues (Tejun)

 - iocost warning fix (Tejun)

 - bfq warning fix (Jan)

* tag 'block-5.18-2022-04-29' of git://git.kernel.dk/linux-block:
  bfq: Fix warning in bfqq_request_over_limit()
  Revert "block: inherit request start time from bio for BLK_CGROUP"
  iocost: don't reset the inuse weight of under-weighted debtors

2 years agoMerge tag 'io_uring-5.18-2022-04-29' of git://git.kernel.dk/linux-block
Linus Torvalds [Fri, 29 Apr 2022 21:51:57 +0000 (14:51 -0700)]
Merge tag 'io_uring-5.18-2022-04-29' of git://git.kernel.dk/linux-block

Pull io_uring fixes from Jens Axboe:
 "Pretty boring:

   - three patches just adding reserved field checks (me, Eugene)

   - Fixing a potential regression with IOPOLL caused by a block change
     (Joseph)"

Boring is good.

* tag 'io_uring-5.18-2022-04-29' of git://git.kernel.dk/linux-block:
  io_uring: check that data field is 0 in ringfd unregister
  io_uring: fix uninitialized field in rw io_kiocb
  io_uring: check reserved fields for recv/recvmsg
  io_uring: check reserved fields for send/sendmsg

2 years agoMerge tag 'random-5.18-rc5-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...
Linus Torvalds [Fri, 29 Apr 2022 21:47:17 +0000 (14:47 -0700)]
Merge tag 'random-5.18-rc5-for-linus' of git://git./linux/kernel/git/crng/random

Pull random number generator fixes from Jason Donenfeld:

 - Eric noticed that the memmove() in crng_fast_key_erasure() was bogus,
   so this has been changed to a memcpy() and the confusing situation
   clarified with a detailed comment.

 - [Half]SipHash documentation updates from Bagas and Eric, after Eric
   pointed out that the use of HalfSipHash in random.c made a bit of the
   text potentially misleading.

* tag 'random-5.18-rc5-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/crng/random:
  Documentation: siphash: disambiguate HalfSipHash algorithm from hsiphash functions
  Documentation: siphash: enclose HalfSipHash usage example in the literal block
  Documentation: siphash: convert danger note to warning for HalfSipHash
  random: document crng_fast_key_erasure() destination possibility

2 years agoMerge tag 'ceph-for-5.18-rc5' of https://github.com/ceph/ceph-client
Linus Torvalds [Fri, 29 Apr 2022 21:37:35 +0000 (14:37 -0700)]
Merge tag 'ceph-for-5.18-rc5' of https://github.com/ceph/ceph-client

Pull ceph client fixes from Ilya Dryomov:
 "A fix for a NULL dereference that turns out to be easily triggerable
  by fsync (marked for stable) and a false positive WARN and snap_rwsem
  locking fixups"

* tag 'ceph-for-5.18-rc5' of https://github.com/ceph/ceph-client:
  ceph: fix possible NULL pointer dereference for req->r_session
  ceph: remove incorrect session state check
  ceph: get snap_rwsem read lock in handle_cap_export for ceph_add_cap
  libceph: disambiguate cluster/pool full log message