linux-2.6-microblaze.git
7 years agodrm/amdgpu: avoid to reset wave_front_size to 0
Hawking Zhang [Fri, 9 Jun 2017 15:39:31 +0000 (23:39 +0800)]
drm/amdgpu: avoid to reset wave_front_size to 0

No need to clear it.  The values are set explicitly.

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: add new member in gpu_info fw
Hawking Zhang [Fri, 9 Jun 2017 14:30:52 +0000 (22:30 +0800)]
drm/amdgpu: add new member in gpu_info fw

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu/gfx: fix MEC interrupt enablement for pipes != 0
Alex Deucher [Fri, 9 Jun 2017 12:22:31 +0000 (08:22 -0400)]
drm/amdgpu/gfx: fix MEC interrupt enablement for pipes != 0

The interrupt registers are not indexed.

Fixes: 763a47b8e (drm/amdgpu: teach amdgpu how to enable interrupts for any pipe v3)
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/powerplay: fix copy error in powerplay.
Rex Zhu [Thu, 8 Jun 2017 07:45:04 +0000 (15:45 +0800)]
drm/amd/powerplay: fix copy error in powerplay.

v2: fix typos.

should disable led dpm feature when stop dpm.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: move comment to the right place
Alex Xie [Thu, 8 Jun 2017 18:58:05 +0000 (14:58 -0400)]
drm/amdgpu: move comment to the right place

Signed-off-by: Alex Xie <AlexBin.Xie@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: fix a typo in comment
Alex Xie [Thu, 8 Jun 2017 18:53:26 +0000 (14:53 -0400)]
drm/amdgpu: fix a typo in comment

Signed-off-by: Alex Xie <AlexBin.Xie@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: remove duplicate function prototypes
Alex Xie [Thu, 8 Jun 2017 18:21:28 +0000 (14:21 -0400)]
drm/amdgpu: remove duplicate function prototypes

There are two identical function prototypes in same header file

Signed-off-by: Alex Xie <AlexBin.Xie@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: Support page table update via CPU
Harish Kasiviswanathan [Thu, 11 May 2017 23:47:22 +0000 (19:47 -0400)]
drm/amdgpu: Support page table update via CPU

v2: Fix logical mistake. If CPU update failed amdgpu_vm_bo_update_mapping()
would not return and instead fall through to SDMA update. Minor change due to
amdgpu_vm_bo_wait() prototype change

Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: Support page directory update via CPU
Harish Kasiviswanathan [Thu, 11 May 2017 19:50:08 +0000 (15:50 -0400)]
drm/amdgpu: Support page directory update via CPU

If amdgpu.vm_update_context param is set to use CPU, then Page
Directories will be updated by CPU instead of SDMA

v2: Call amdgpu_vm_bo_wait before updating the page tables to ensure the
PD/PT BOs are free

v3: Minor changes - due to amdgpu_vm_bo_wait() prototype change, local
variable declaration order and function comments.

Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: Add amdgpu_sync_wait
Harish Kasiviswanathan [Mon, 15 May 2017 19:09:15 +0000 (15:09 -0400)]
drm/amdgpu: Add amdgpu_sync_wait

v2: Add intr option

Helper function useful for CPU update of VM page tables. Also useful if
kernel have to synchronously wait till VM page tables are updated.

Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: Add vm context module param
Harish Kasiviswanathan [Fri, 9 Jun 2017 15:26:57 +0000 (11:26 -0400)]
drm/amdgpu: Add vm context module param

Add VM update mode module param (amdgpu.vm_update_mode) that can used to
control how VM pde/pte are updated for Graphics and Compute.

BIT0 controls Graphics and BIT1 Compute.
 BIT0 [= 0] Graphics updated by SDMA [= 1] by CPU
 BIT1 [= 0] Compute updated by SDMA [= 1] by CPU

By default, only for large BAR system vm_update_mode = 2, indicating
that Graphics VMs will be updated via SDMA and Compute VMs will be
updated via CPU. And for all all other systems (by default)
vm_update_mode = 0

Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: drop deprecated drm_get_pci_dev and drm_put_dev
Alex Deucher [Fri, 2 Jun 2017 21:16:31 +0000 (17:16 -0400)]
drm/amdgpu: drop deprecated drm_get_pci_dev and drm_put_dev

Open code them so we can adjust the order in the
driver more easily.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: call pci_[un]register_driver() directly
Alex Deucher [Fri, 2 Jun 2017 20:52:08 +0000 (16:52 -0400)]
drm/amdgpu: call pci_[un]register_driver() directly

Rather than calling the deprecated drm_pci_init() and
drm_pci_exit() which just wrapped the pci functions
anyway.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu/radeon: Use radeon by default for CIK GPUs
Michel Dänzer [Mon, 29 May 2017 09:05:20 +0000 (18:05 +0900)]
drm/amdgpu/radeon: Use radeon by default for CIK GPUs

Even if CONFIG_DRM_AMDGPU_CIK is enabled.

There is no feature parity yet for CIK, in particular amdgpu doesn't
support HDMI/DisplayPort audio without DC.

v2:
* Clarify the lack of feature parity being related to HDMI/DP audio.
* Fix "SI" typo in DRM_AMDGPU_CIK help entry.

Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
7 years agodrm/radeon: Make si_support and cik_support parameters always available
Michel Dänzer [Mon, 29 May 2017 08:32:38 +0000 (17:32 +0900)]
drm/radeon: Make si_support and cik_support parameters always available

This will allow amdgpu-pro / other out-of-tree amdgpu builds to make use
of these options for using the out-of-tree amdgpu driver instead of the
in-tree radeon driver in a clean way.

Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
7 years agodrm/amdgpu: Update Kconfig help for SI and CIK support
Felix Kuehling [Mon, 5 Jun 2017 09:57:32 +0000 (18:57 +0900)]
drm/amdgpu: Update Kconfig help for SI and CIK support

Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Acked-by: Michel Dänzer <michel.daenzer@amd.com>
7 years agodrm/amdgpu: Add module param to control SI support
Felix Kuehling [Mon, 5 Jun 2017 09:53:55 +0000 (18:53 +0900)]
drm/amdgpu: Add module param to control SI support

If AMDGPU supports SI, add a module parameter to control SI
support. It's off by default in AMDGPU as long as SI suppost is
experimental, while it is on by default in radeon.

Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Acked-by: Michel Dänzer <michel.daenzer@amd.com>
[ Michel Dänzer: Squash in amdgpu_si_support initialization fix ]
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/radeon: Add module param to control SI support
Felix Kuehling [Mon, 5 Jun 2017 09:52:51 +0000 (18:52 +0900)]
drm/radeon: Add module param to control SI support

If AMDGPU supports SI, add a module parameter to control SI
support in radeon. It's on by default in radeon, while it will be
off by default in AMDGPU as long as SI support is experimental.

Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Acked-by: Michel Dänzer <michel.daenzer@amd.com>
7 years agodrm/amdgpu: Add module param to control CIK support
Felix Kuehling [Mon, 5 Jun 2017 09:43:27 +0000 (18:43 +0900)]
drm/amdgpu: Add module param to control CIK support

If AMDGPU supports CIK, add a module parameter to control CIK
support. It's on by default in AMDGPU, while it is off by default
in radeon.

Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Acked-by: Michel Dänzer <michel.daenzer@amd.com>
7 years agodrm/amdgpu/gfx: consolidate mqd buffer setup code
Alex Deucher [Wed, 7 Jun 2017 19:27:52 +0000 (15:27 -0400)]
drm/amdgpu/gfx: consolidate mqd buffer setup code

It was duplicated across multiple generations.

Reviewed-by: Alex Xie <AlexBin.Xie@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu/gfx: move mec parameter setup into sw_init
Alex Deucher [Wed, 7 Jun 2017 18:20:21 +0000 (14:20 -0400)]
drm/amdgpu/gfx: move mec parameter setup into sw_init

This will allow us to share more mec code.

Reviewed-by: Alex Xie <AlexBin.Xie@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu/gfx: move more common KIQ code to amdgpu_gfx.c
Alex Deucher [Wed, 7 Jun 2017 17:31:32 +0000 (13:31 -0400)]
drm/amdgpu/gfx: move more common KIQ code to amdgpu_gfx.c

Lots more common stuff.

Reviewed-by: Alex Xie <AlexBin.Xie@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: move mec queue helpers to amdgpu_gfx.h
Alex Deucher [Wed, 7 Jun 2017 16:59:29 +0000 (12:59 -0400)]
drm/amdgpu: move mec queue helpers to amdgpu_gfx.h

They are gfx related, not general helpers.

Reviewed-by: Alex Xie <AlexBin.Xie@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu/gfx9: remove spurious line in kiq setup
Alex Deucher [Wed, 7 Jun 2017 17:09:53 +0000 (13:09 -0400)]
drm/amdgpu/gfx9: remove spurious line in kiq setup

This overrode what queue was actually assigned for kiq.

Reviewed-by: Alex Xie <AlexBin.Xie@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu/gfx8: whitespace change
Alex Deucher [Wed, 7 Jun 2017 18:22:48 +0000 (14:22 -0400)]
drm/amdgpu/gfx8: whitespace change

Make it consistent.

Reviewed-by: Alex Xie <AlexBin.Xie@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu/gfx9: Raven has two MECs
Alex Deucher [Wed, 7 Jun 2017 15:07:48 +0000 (11:07 -0400)]
drm/amdgpu/gfx9: Raven has two MECs

This was missed when Andres' queue patches were rebased.

Fixes: 42794b27 (drm/amdgpu: take ownership of per-pipe configuration v3)
Reviewed-by: Alex Xie <AlexBin.Xie@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: move gfx_v*_0_compute_queue_acquire to common code
Alex Deucher [Wed, 7 Jun 2017 15:05:26 +0000 (11:05 -0400)]
drm/amdgpu: move gfx_v*_0_compute_queue_acquire to common code

Same function was duplicated in all gfx IP files.

Reviewed-by: Alex Xie <AlexBin.Xie@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: fix mec queue policy on single MEC asics
Alex Deucher [Wed, 7 Jun 2017 14:46:06 +0000 (10:46 -0400)]
drm/amdgpu: fix mec queue policy on single MEC asics

Fixes hangs on single MEC asics.

Fixes: 2ed286fb434 (drm/amdgpu: new queue policy, take first 2 queues of each pipe v2)
Reviewed-by: Alex Xie <AlexBin.Xie@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu/gfx: create a common bitmask function (v2)
Alex Deucher [Tue, 6 Jun 2017 21:41:20 +0000 (17:41 -0400)]
drm/amdgpu/gfx: create a common bitmask function (v2)

The same function was duplicated in all the gfx IPs. Use
a single implementation for all.

v2: use static inline (Alex Xie)

Reviewed-by: Alex Xie <AlexBin.Xie@amd.com>
Suggested-by: Andres Rodriguez <andresx7@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu/gfx8: drop per-APU CU limits
Alex Deucher [Wed, 31 May 2017 14:05:04 +0000 (10:05 -0400)]
drm/amdgpu/gfx8: drop per-APU CU limits

Always use the max for the family rather than the per sku limits.
This makes sure the mask is always the max size to avoid reporting
the wrong number of CUs.

Reviewed-by: Alex Xie <AlexBin.Xie@amd.com>
Reviewed-by: Andres Rodriguez <andresx7@gmail.com>
Cc: stable@vger.kernel.org
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu/gfx6: properly cache mc_arb_ramcfg
Alex Deucher [Fri, 2 Jun 2017 20:30:46 +0000 (16:30 -0400)]
drm/amdgpu/gfx6: properly cache mc_arb_ramcfg

This was missing for gfx6.

Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
7 years agodrm/amdgpu/gfx9: new queue policy, take first 2 queues of each pipe
Alex Deucher [Mon, 5 Jun 2017 15:03:59 +0000 (11:03 -0400)]
drm/amdgpu/gfx9: new queue policy, take first 2 queues of each pipe

Instead of taking the first pipe and giving the rest to kfd, take the
first 2 queues of each pipe.

Effectively, amdgpu and amdkfd own the same number of queues. But
because the queues are spread over multiple pipes the hardware will be
able to better handle concurrent compute workloads.

amdgpu goes from 1 pipe to 4 pipes, i.e. from 1 compute threads to 4
amdkfd goes from 3 pipe to 4 pipes, i.e. from 3 compute threads to 4

gfx9 was missed when this patch set was rebased to include gfx9.

Acked-by: Tom St Denis <tom.stdenis@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Andres Rodriguez <andresx7@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu/gfx9: allocate queues horizontally across pipes
Alex Deucher [Mon, 5 Jun 2017 14:58:56 +0000 (10:58 -0400)]
drm/amdgpu/gfx9: allocate queues horizontally across pipes

Pipes provide better concurrency than queues, therefore we want to make
sure that apps use queues from different pipes whenever possible.

Optimize for the trivial case where an app will consume rings in order,
therefore we don't want adjacent rings to belong to the same pipe.

gfx9 was missed when these patches were rebased.

Reviewed-by: Tom St Denis <tom.stdenis@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Andres Rodriguez <andresx7@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/powerplay: fix memory leak in cz_hwmgr backend
Hawking Zhang [Tue, 6 Jun 2017 08:25:44 +0000 (16:25 +0800)]
drm/amd/powerplay: fix memory leak in cz_hwmgr backend

vddc_dep_on_dal_pwrl is allocated and initialized in cz_hwmgr_backend_init
Thus free the memory in cz_hwmgr_backend_fini

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
7 years agodrm/amd/powerplay: fix memory leak in rv_hwmgr backend
Hawking Zhang [Tue, 6 Jun 2017 08:19:34 +0000 (16:19 +0800)]
drm/amd/powerplay: fix memory leak in rv_hwmgr backend

vddc_dep_on_dal_pwrl and vq_budgeting_table are allocated and initialized
in rv_hwmgr_backend_init. Thus free the memory in rv_hwmgr_backend_fini

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/powerplay: add sclk and mclk overdrive for vega10
Eric Huang [Fri, 2 Jun 2017 14:57:24 +0000 (10:57 -0400)]
drm/amd/powerplay: add sclk and mclk overdrive for vega10

For overclocking sclk and mclk.

Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/powerplay: fix populate dpm level failed when s3 on vega10.
Rex Zhu [Fri, 2 Jun 2017 12:04:40 +0000 (20:04 +0800)]
drm/amd/powerplay: fix populate dpm level failed when s3 on vega10.

As the min clk may be  large than boot level can support.
in this case, just ignore the min clk.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: update to use RREG32_SOC15/WREG32_SOC15 for gmc9
Huang Rui [Thu, 1 Jun 2017 07:33:26 +0000 (15:33 +0800)]
drm/amdgpu: update to use RREG32_SOC15/WREG32_SOC15 for gmc9

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: update to use RREG32_SOC15/WREG32_SOC15 for mmhub
Huang Rui [Thu, 1 Jun 2017 07:30:04 +0000 (15:30 +0800)]
drm/amdgpu: update to use RREG32_SOC15/WREG32_SOC15 for mmhub

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: update to use RREG32_SOC15/WREG32_SOC15 for gfxhub
Huang Rui [Thu, 1 Jun 2017 07:15:28 +0000 (15:15 +0800)]
drm/amdgpu: update to use RREG32_SOC15/WREG32_SOC15 for gfxhub

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: fix the gart table cleared issue for S3
Huang Rui [Wed, 31 May 2017 02:35:42 +0000 (10:35 +0800)]
drm/amdgpu: fix the gart table cleared issue for S3

Something writes over the first 8 MB so reserve this
on vega10 until we root cause it.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: add ip block number prints
Huang Rui [Wed, 3 May 2017 01:52:06 +0000 (09:52 +0800)]
drm/amdgpu: add ip block number prints

User is able to follow the ip block number to write the ip_block_mask for
selecting the one which user would like to enable.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: add ip name print for selecting ips with ip_block_mask
Huang Rui [Wed, 3 May 2017 01:40:17 +0000 (09:40 +0800)]
drm/amdgpu: add ip name print for selecting ips with ip_block_mask

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: remove mmhub ip
Huang Rui [Wed, 31 May 2017 15:49:46 +0000 (23:49 +0800)]
drm/amdgpu: remove mmhub ip

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: remove gfxhub ip
Huang Rui [Wed, 31 May 2017 15:46:26 +0000 (23:46 +0800)]
drm/amdgpu: remove gfxhub ip

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: export mmhub get clockgating into gmc
Huang Rui [Wed, 31 May 2017 15:35:44 +0000 (23:35 +0800)]
drm/amdgpu: export mmhub get clockgating into gmc

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: export mmhub set clockgating into gmc
Huang Rui [Wed, 31 May 2017 15:13:34 +0000 (23:13 +0800)]
drm/amdgpu: export mmhub set clockgating into gmc

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: export mmhub sw_init into gmc
Huang Rui [Wed, 31 May 2017 14:59:18 +0000 (22:59 +0800)]
drm/amdgpu: export mmhub sw_init into gmc

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: export gfxhub sw_init into gmc
Huang Rui [Wed, 31 May 2017 14:57:18 +0000 (22:57 +0800)]
drm/amdgpu: export gfxhub sw_init into gmc

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: fix to miss program invalidation at resume
Huang Rui [Wed, 31 May 2017 14:32:35 +0000 (22:32 +0800)]
drm/amdgpu: fix to miss program invalidation at resume

This patch moves invalidation into gart enable function from hw_init.
Because we would like align the sequence calling between init and resume.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: abstract setup vmid config for gfxhub/mmhub
Huang Rui [Wed, 31 May 2017 14:17:11 +0000 (22:17 +0800)]
drm/amdgpu: abstract setup vmid config for gfxhub/mmhub

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: abstract disable identity aperture for gfxhub/mmhub
Huang Rui [Wed, 31 May 2017 13:52:00 +0000 (21:52 +0800)]
drm/amdgpu: abstract disable identity aperture for gfxhub/mmhub

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: abstract system domain enablement for gfxhub/mmhub
Huang Rui [Wed, 31 May 2017 13:39:10 +0000 (21:39 +0800)]
drm/amdgpu: abstract system domain enablement for gfxhub/mmhub

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: abstract cache initialization for gfxhub/mmhub
Huang Rui [Wed, 31 May 2017 10:07:48 +0000 (18:07 +0800)]
drm/amdgpu: abstract cache initialization for gfxhub/mmhub

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: abstract TLB initialization for gfxhub/mmhub
Huang Rui [Wed, 31 May 2017 09:19:01 +0000 (17:19 +0800)]
drm/amdgpu: abstract TLB initialization for gfxhub/mmhub

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: abstract system aperture initialization for gfxhub/mmhub
Huang Rui [Wed, 31 May 2017 09:04:28 +0000 (17:04 +0800)]
drm/amdgpu: abstract system aperture initialization for gfxhub/mmhub

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: abstract gart aperture initialization for gfxhub/mmhub
Huang Rui [Wed, 31 May 2017 08:40:14 +0000 (16:40 +0800)]
drm/amdgpu: abstract gart aperture initialization for gfxhub/mmhub

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: abstract gart table initialization for gfxhub/mmhub
Huang Rui [Wed, 31 May 2017 08:20:48 +0000 (16:20 +0800)]
drm/amdgpu: abstract gart table initialization for gfxhub/mmhub

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: add saved_bo to save vce 4.0 context when suspend
Leo Liu [Wed, 31 May 2017 18:25:54 +0000 (14:25 -0400)]
drm/amdgpu: add saved_bo to save vce 4.0 context when suspend

We are using PSP to resume firmware after suspend, and it is
resumed at where it got suspended, so we'd better save the
the context.

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: use existing function amdgpu_bo_create_kernel
Leo Liu [Wed, 31 May 2017 18:13:20 +0000 (14:13 -0400)]
drm/amdgpu: use existing function amdgpu_bo_create_kernel

To simplify vce bo create

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: add vcpu_bo cpu address for vce
Leo Liu [Wed, 31 May 2017 18:07:36 +0000 (14:07 -0400)]
drm/amdgpu: add vcpu_bo cpu address for vce

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: Move compute vm bug logic to amdgpu_vm.c
Alex Xie [Thu, 1 Jun 2017 13:42:59 +0000 (09:42 -0400)]
drm/amdgpu: Move compute vm bug logic to amdgpu_vm.c

  In review, Christian would like to keep the logic
  inside amdgpu_vm.c with a cost of slightly slower.
  The loop is still optimized out with this patch.

v2: remove the if statement. Now it is not slower.

Signed-off-by: Alex Xie <AlexBin.Xie@amd.com>
Reviewed-by: Christian König <christian.koeng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/powerplay: enable CKS by default on vega10.
Rex Zhu [Wed, 31 May 2017 11:53:04 +0000 (19:53 +0800)]
drm/amd/powerplay: enable CKS by default on vega10.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/powerplay: Align with VBIOS to support AVFS parameters.
Rex Zhu [Wed, 31 May 2017 11:29:53 +0000 (19:29 +0800)]
drm/amd/powerplay: Align with VBIOS to support AVFS parameters.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/powerplay: Add floor DCEF for DS on boot.
Rex Zhu [Wed, 31 May 2017 08:58:31 +0000 (16:58 +0800)]
drm/amd/powerplay: Add floor DCEF for DS on boot.

Use the vbios to look up the default frequencies
for socclk and dcefclk.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: use LRU mapping policy for SDMA engines
Andres Rodriguez [Fri, 17 Mar 2017 18:41:21 +0000 (14:41 -0400)]
drm/amdgpu: use LRU mapping policy for SDMA engines

Spreading the load across multiple SDMA engines can increase memory
transfer performance.

Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: guarantee bijective mapping of ring ids for LRU v3
Andres Rodriguez [Fri, 17 Mar 2017 18:30:15 +0000 (14:30 -0400)]
drm/amdgpu: guarantee bijective mapping of ring ids for LRU v3

Depending on usage patterns, the current LRU policy may create a
non-injective mapping between userspace ring ids and kernel rings.

This behaviour is undesired as apps that attempt to fill all HW blocks
would be unable to reach some of them.

This change forces the LRU policy to create bijective mappings only.

v2: compress ring_blacklist
v3: simplify amdgpu_ring_is_blacklisted() logic

Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: implement lru amdgpu_queue_mgr policy for compute v4
Andres Rodriguez [Mon, 6 Mar 2017 21:27:55 +0000 (16:27 -0500)]
drm/amdgpu: implement lru amdgpu_queue_mgr policy for compute v4

Use an LRU policy to map usermode rings to HW compute queues.

Most compute clients use one queue, and usually the first queue
available. This results in poor pipe/queue work distribution when
multiple compute apps are running. In most cases pipe 0 queue 0 is
the only queue that gets used.

In order to better distribute work across multiple HW queues, we adopt
a policy to map the usermode ring ids to the LRU HW queue.

This fixes a large majority of multi-app compute workloads sharing the
same HW queue, even though 7 other queues are available.

v2: use ring->funcs->type instead of ring->hw_ip
v3: remove amdgpu_queue_mapper_funcs
v4: change ring_lru_list_lock to spinlock, grab only once in lru_get()

Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: untie user ring ids from kernel ring ids v6
Andres Rodriguez [Thu, 16 Feb 2017 05:47:32 +0000 (00:47 -0500)]
drm/amdgpu: untie user ring ids from kernel ring ids v6

Add amdgpu_queue_mgr, a mechanism that allows disjointing usermode's
ring ids from the kernel's ring ids.

The queue manager maintains a per-file descriptor map of user ring ids
to amdgpu_ring pointers. Once a map is created it is permanent (this is
required to maintain FIFO execution guarantees for a context's ring).

Different queue map policies can be configured for each HW IP.
Currently all HW IPs use the identity mapper, i.e. kernel ring id is
equal to the user ring id.

The purpose of this mechanism is to distribute the load across multiple
queues more effectively for HW IPs that support multiple rings.
Userspace clients are unable to check whether a specific resource is in
use by a different client. Therefore, it is up to the kernel driver to
make the optimal choice.

v2: remove amdgpu_queue_mapper_funcs
v3: made amdgpu_queue_mgr per context instead of per-fd
v4: add context_put on error paths
v5: rebase and include new IPs UVD_ENC & VCN_*
v6: drop unused amdgpu_ring_is_valid_index (Alex)

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: workaround tonga HW bug in HQD programming sequence
Andres Rodriguez [Sat, 25 Feb 2017 01:50:20 +0000 (20:50 -0500)]
drm/amdgpu: workaround tonga HW bug in HQD programming sequence

Tonga based asics may experience hangs when an HQD's EOP parameters
are modified.

Workaround this HW issue by avoiding writes to these registers for
tonga asics.

Based on the following ROCm commit:
2a0fb8 - drm/amdgpu: Synchronize KFD HQD load protocol with CP scheduler

From the ROCm git repository:
https://github.com/RadeonOpenCompute/ROCK-Kernel-Driver.git

CC: Jay Cornwall <Jay.Cornwall@amd.com>
Suggested-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: condense mqd programming sequence
Andres Rodriguez [Fri, 24 Feb 2017 20:28:43 +0000 (15:28 -0500)]
drm/amdgpu: condense mqd programming sequence

The MQD structure matches the reg layout. Take advantage of this to
simplify HQD programming.

Note that the ACTIVE field still needs to be programmed last.

Suggested-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: new queue policy, take first 2 queues of each pipe v2
Andres Rodriguez [Sat, 4 Feb 2017 04:30:04 +0000 (23:30 -0500)]
drm/amdgpu: new queue policy, take first 2 queues of each pipe v2

Instead of taking the first pipe and giving the rest to kfd, take the
first 2 queues of each pipe.

Effectively, amdgpu and amdkfd own the same number of queues. But
because the queues are spread over multiple pipes the hardware will be
able to better handle concurrent compute workloads.

amdgpu goes from 1 pipe to 4 pipes, i.e. from 1 compute threads to 4
amdkfd goes from 3 pipe to 4 pipes, i.e. from 3 compute threads to 4

v2: fix policy comment

Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: avoid KIQ clashing with compute or KFD queues v2
Andres Rodriguez [Thu, 6 Apr 2017 04:10:53 +0000 (00:10 -0400)]
drm/amdgpu: avoid KIQ clashing with compute or KFD queues v2

Instead of picking an arbitrary queue for KIQ, search for one according
to policy. The queue must be unused.

Also report the KIQ as an unavailable resource to KFD.

In testing I ran into KCQ initialization issues when using pipes 2/3 of
MEC2 for the KIQ. Therefore the policy disallows grabbing one of these.

v2: fix (ring.me + 1) to (ring.me -1) in amdgpu_amdkfd_device_init

Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: remove hardcoded queue_mask in PACKET3_SET_RESOURCES
Andres Rodriguez [Tue, 4 Apr 2017 21:18:28 +0000 (17:18 -0400)]
drm/amdgpu: remove hardcoded queue_mask in PACKET3_SET_RESOURCES

The assumption that we are only using the first pipe no longer holds.
Instead, calculate the queue_mask from the queue_bitmap.

Acked-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: allocate queues horizontally across pipes
Andres Rodriguez [Fri, 3 Feb 2017 22:31:38 +0000 (17:31 -0500)]
drm/amdgpu: allocate queues horizontally across pipes

Pipes provide better concurrency than queues, therefore we want to make
sure that apps use queues from different pipes whenever possible.

Optimize for the trivial case where an app will consume rings in order,
therefore we don't want adjacent rings to belong to the same pipe.

Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Acked-by: Felix Kuehling <Felix.Kuehling@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: remove duplicate magic constants from amdgpu_amdkfd_gfx*.c
Andres Rodriguez [Thu, 2 Feb 2017 20:14:14 +0000 (15:14 -0500)]
drm/amdgpu: remove duplicate magic constants from amdgpu_amdkfd_gfx*.c

This information is already available in adev.

Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdkfd: allow split HQD on per-queue granularity v5
Andres Rodriguez [Fri, 3 Feb 2017 21:28:48 +0000 (16:28 -0500)]
drm/amdkfd: allow split HQD on per-queue granularity v5

Update the KGD to KFD interface to allow sharing pipes with queue
granularity instead of pipe granularity.

This allows for more interesting pipe/queue splits.

v2: fix overflow check for res.queue_mask
v3: fix shift overflow when setting res.queue_mask
v4: fix comment in is_pipeline_enabled()
v5: clamp res.queue_mask to the first MEC only

Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: teach amdgpu how to enable interrupts for any pipe v3
Andres Rodriguez [Thu, 9 Feb 2017 22:39:52 +0000 (17:39 -0500)]
drm/amdgpu: teach amdgpu how to enable interrupts for any pipe v3

The current implementation is hardcoded to enable ME1/PIPE0 interrupts
only.

This patch allows amdgpu to enable interrupts for any pipe of ME1.

v2: added gfx9 support
v3: use soc15_grbm_select for gfx9

Acked-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: allow split of queues with kfd at queue granularity v4
Andres Rodriguez [Thu, 2 Feb 2017 05:38:22 +0000 (00:38 -0500)]
drm/amdgpu: allow split of queues with kfd at queue granularity v4

Previously the queue/pipe split with kfd operated with pipe
granularity. This patch allows amdgpu to take ownership of an arbitrary
set of queues.

It also consolidates the last few magic numbers in the compute
initialization process into mec_init.

v2: support for gfx9
v3: renamed AMDGPU_MAX_QUEUES to AMDGPU_MAX_COMPUTE_QUEUES
v4: fix off-by-one in num_mec checks in *_compute_queue_acquire

Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: take ownership of per-pipe configuration v3
Andres Rodriguez [Thu, 2 Feb 2017 00:08:23 +0000 (19:08 -0500)]
drm/amdgpu: take ownership of per-pipe configuration v3

Make amdgpu the owner of all per-pipe state of the HQDs.

This change will allow us to split the queues between kfd and amdgpu
with a queue granularity instead of pipe granularity.

This patch fixes kfd allocating an HDP_EOP region for its 3 pipes which
goes unused.

v2: support for gfx9
v3: fix gfx7 HPD intitialization

Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/radeon: take ownership of pipe initialization
Andres Rodriguez [Fri, 3 Feb 2017 21:17:15 +0000 (16:17 -0500)]
drm/radeon: take ownership of pipe initialization

Take ownership of pipe initialization away from KFD.

Note that hpd_eop_gpu_addr was already large enough to accomodate all
pipes.

Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: rename rdev to adev
Andres Rodriguez [Wed, 1 Feb 2017 22:02:13 +0000 (17:02 -0500)]
drm/amdgpu: rename rdev to adev

Rename straggler instances of r(adeon)dev to a(mdgpu)dev

Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: fix kgd_hqd_load failing to update shadow_wptr
Andres Rodriguez [Thu, 13 Apr 2017 17:55:41 +0000 (13:55 -0400)]
drm/amdgpu: fix kgd_hqd_load failing to update shadow_wptr

The return value from copy_form_user is 0 for the success case.

Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: unify MQD programming sequence for kfd and amdgpu v2
Andres Rodriguez [Wed, 1 Feb 2017 21:37:42 +0000 (16:37 -0500)]
drm/amdgpu: unify MQD programming sequence for kfd and amdgpu v2

Use the same gfx_*_mqd_commit function for kfd and amdgpu codepaths.

This removes the last duplicates of this programming sequence.

v2: fix cp_hqd_pq_wptr value

Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: remove duplicate definition of cik_mqd
Andres Rodriguez [Wed, 1 Feb 2017 21:28:56 +0000 (16:28 -0500)]
drm/amdgpu: remove duplicate definition of cik_mqd

The gfxv7 contains a slightly different version of cik_mqd called
bonaire_mqd. This can introduce subtle bugs if fixes are not applied in
both places.

Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: detect timeout error when deactivating hqd
Andres Rodriguez [Wed, 1 Feb 2017 05:01:46 +0000 (00:01 -0500)]
drm/amdgpu: detect timeout error when deactivating hqd

Handle HQD deactivation timeouts instead of ignoring them.

Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: refactor MQD/HQD initialization v3
Andres Rodriguez [Wed, 12 Apr 2017 21:19:54 +0000 (17:19 -0400)]
drm/amdgpu: refactor MQD/HQD initialization v3

The MQD programming sequence currently exists in 3 different places.
Refactor it to absorb all the duplicates.

The success path remains mostly identical except for a slightly
different order in the non-kiq case. This shouldn't matter if the HQD
is disabled.

The error handling paths have been updated to deal with the new code
structure.

v2: the non-kiq path for gfxv8 was dropped in the rebase
v3: split MEC_HPD_SIZE rename, dropped doorbell changes

Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: clarify MEC_HPD_SIZE is specific to a gfx generation
Andres Rodriguez [Wed, 12 Apr 2017 20:53:50 +0000 (16:53 -0400)]
drm/amdgpu: clarify MEC_HPD_SIZE is specific to a gfx generation

Rename MEC_HPD_SIZE to GFXN_MEC_HPD_SIZE to clarify it is specific to a
gfx generation.

Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/powerplay: code clean up in vega10_hwmgr.c
Rex Zhu [Sat, 27 May 2017 10:18:39 +0000 (18:18 +0800)]
drm/amd/powerplay: code clean up in vega10_hwmgr.c

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agoRevert "drm/amd/powerplay: disable engine spread spectrum feature on Vega10."
Rex Zhu [Sat, 27 May 2017 10:08:13 +0000 (18:08 +0800)]
Revert "drm/amd/powerplay: disable engine spread spectrum feature on Vega10."

This reverts commit f8fdaa0e7b81698ba2ad8c2d20c7f9a44c75e0c6.
firmware add support for this feature, so still ctrl by vbios.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/powerplay: enable deep sleep by default for vega10
Rex Zhu [Sat, 27 May 2017 10:05:35 +0000 (18:05 +0800)]
drm/amd/powerplay: enable deep sleep by default for vega10

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/powerplay: enable ulv feature by default for vega10.
Rex Zhu [Sat, 27 May 2017 09:54:08 +0000 (17:54 +0800)]
drm/amd/powerplay: enable ulv feature by default for vega10.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: stop joining VM PTE updates
Christian König [Tue, 16 May 2017 12:30:27 +0000 (14:30 +0200)]
drm/amdgpu: stop joining VM PTE updates

This isn't beneficial any more since VRAM allocations are now split
so that they fits into a single page table.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: cache the complete pde
Christian König [Mon, 15 May 2017 13:19:10 +0000 (15:19 +0200)]
drm/amdgpu: cache the complete pde

Makes it easier to update the PDE with huge pages.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: Remove two ! operations in an if condition
Alex Xie [Wed, 31 May 2017 03:50:10 +0000 (23:50 -0400)]
drm/amdgpu: Remove two ! operations in an if condition

 Make the code easier to understand.

Signed-off-by: Alex Xie <AlexBin.Xie@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: Optimize a function called by every IB sheduling
Alex Xie [Tue, 30 May 2017 21:10:16 +0000 (17:10 -0400)]
drm/amdgpu: Optimize a function called by every IB sheduling

  Move several if statements and a loop statment from
  run time to initialization time.

Signed-off-by: Alex Xie <AlexBin.Xie@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: Program ring for vce instance 1 at its register space
Leo Liu [Mon, 29 May 2017 17:13:59 +0000 (13:13 -0400)]
drm/amdgpu: Program ring for vce instance 1 at its register space

We need program ring buffer on instance 1 register space domain,
when only if instance 1 available, with two instances or instance 0,
and we need only program instance 0 regsiter space domain for ring.

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: Return EINVAL if no PT BO
Harish Kasiviswanathan [Fri, 12 May 2017 02:39:31 +0000 (22:39 -0400)]
drm/amdgpu: Return EINVAL if no PT BO

This change is also useful for the upcoming changes where page tables
can be updated by CPU.

Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: add some extra VM error handling
Christian König [Fri, 12 May 2017 14:09:26 +0000 (16:09 +0200)]
drm/amdgpu: add some extra VM error handling

If updating the PDs fails we now invalidate all entries to try again later.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: cleanup adjust_mc_addr handling v4
Christian König [Fri, 12 May 2017 13:39:39 +0000 (15:39 +0200)]
drm/amdgpu: cleanup adjust_mc_addr handling v4

Rename adjust_mc_addr to get_vm_pde and check the address bits in one place.

v2: handle vcn as well, keep setting the valid bit manually,
    add a BUG_ON() for GMC v6, v7 and v8 as well.
v3: handle vcn_v1_0_enc_ring_emit_vm_flush as well.
v4: fix the BUG_ON mask for GFX6-8

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>