linux-2.6-microblaze.git
4 years agobnxt_en: Handle firmware reset.
Michael Chan [Fri, 30 Aug 2019 03:54:59 +0000 (23:54 -0400)]
bnxt_en: Handle firmware reset.

Add the bnxt_fw_reset() main function to handle firmware reset.  This
is triggered by firmware to initiate an orderly reset, for example
when a non-fatal exception condition has been detected.  bnxt_fw_reset()
will first wait for all VFs to shutdown and then start the
bnxt_fw_reset_task() work queue to go through the sequence of reset,
re-probe, and re-initialization.

The next patch will add the devlink reporter to start the sequence and
call bnxt_fw_reset().

Signed-off-by: Michael Chan <michael.chan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agobnxt_en: Handle RESET_NOTIFY async event from firmware.
Michael Chan [Fri, 30 Aug 2019 03:54:58 +0000 (23:54 -0400)]
bnxt_en: Handle RESET_NOTIFY async event from firmware.

This event from firmware signals a coordinated reset initiated by the
firmware.  It may be triggered by some error conditions encountered
in the firmware or other orderly reset conditions.

We store the parameters from this event.  Subsequent patches will
add logic to handle reset itself using devlink reporters.

Signed-off-by: Vasundhara Volam <vasundhara-v.volam@broadcom.com>
Signed-off-by: Michael Chan <michael.chan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agobnxt_en: Add new FW devlink_health_reporter
Vasundhara Volam [Fri, 30 Aug 2019 03:54:57 +0000 (23:54 -0400)]
bnxt_en: Add new FW devlink_health_reporter

Create new FW devlink_health_reporter, to know the current health
status of FW.

Command example and output:
$ devlink health show pci/0000:af:00.0 reporter fw

pci/0000:af:00.0:
  name fw
    state healthy error 0 recover 0

 FW status: Healthy; Reset count: 1

Cc: Jiri Pirko <jiri@mellanox.com>
Signed-off-by: Vasundhara Volam <vasundhara-v.volam@broadcom.com>
Signed-off-by: Michael Chan <michael.chan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agobnxt_en: Add BNXT_STATE_IN_FW_RESET state.
Michael Chan [Fri, 30 Aug 2019 03:54:56 +0000 (23:54 -0400)]
bnxt_en: Add BNXT_STATE_IN_FW_RESET state.

The new flag will be set in subsequent patches when firmware is
going through reset.  If bnxt_close() is called while the new flag
is set, the FW reset sequence will have to be aborted because the
NIC is prematurely closed before FW reset has completed.  We also
reject SRIOV configurations while FW reset is in progress.

v2: No longer drop rtnl_lock() in close and wait for FW reset to complete.

Signed-off-by: Michael Chan <michael.chan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agobnxt_en: Enable health monitoring.
Michael Chan [Fri, 30 Aug 2019 03:54:55 +0000 (23:54 -0400)]
bnxt_en: Enable health monitoring.

Handle the async event from the firmware that enables firmware health
monitoring.  Store initial health metrics.

Signed-off-by: Michael Chan <michael.chan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agobnxt_en: Pre-map the firmware health monitoring registers.
Michael Chan [Fri, 30 Aug 2019 03:54:54 +0000 (23:54 -0400)]
bnxt_en: Pre-map the firmware health monitoring registers.

Pre-map the GRC registers for periodic firmware health monitoring.

Signed-off-by: Vasundhara Volam <vasundhara-v.volam@broadcom.com>
Signed-off-by: Michael Chan <michael.chan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agobnxt_en: Discover firmware error recovery capabilities.
Michael Chan [Fri, 30 Aug 2019 03:54:53 +0000 (23:54 -0400)]
bnxt_en: Discover firmware error recovery capabilities.

Call the new firmware API HWRM_ERROR_RECOVERY_QCFG if it is supported
to discover the firmware health and recovery capabilities and settings.
This feature allows the driver to reset the chip if firmware crashes and
becomes unresponsive.

Signed-off-by: Michael Chan <michael.chan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agobnxt_en: Handle firmware reset status during IF_UP.
Michael Chan [Fri, 30 Aug 2019 03:54:52 +0000 (23:54 -0400)]
bnxt_en: Handle firmware reset status during IF_UP.

During IF_UP, newer firmware has a new status flag that indicates that
firmware has reset.  Add new function bnxt_fw_init_one() to re-probe the
firmware and re-setup VF resources on the PF if necessary.  If the
re-probe fails, set a flag to prevent bnxt_open() from proceeding again.

Signed-off-by: Vasundhara Volam <vasundhara-v.volam@broadcom.com>
Signed-off-by: Michael Chan <michael.chan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agobnxt_en: Register buffers for VFs before reserving resources.
Vasundhara Volam [Fri, 30 Aug 2019 03:54:51 +0000 (23:54 -0400)]
bnxt_en: Register buffers for VFs before reserving resources.

When VFs need to be reconfigured dynamically after firmwware reset, the
configuration sequence on the PF needs to be changed to register the VF
buffers first.  Otherwise, some VF firmware commands may not succeed as
there may not be PF buffers ready for the re-directed firmware commands.

This sequencing did not matter much before when we only supported
the normal bring-up of VFs.

Signed-off-by: Vasundhara Volam <vasundhara-v.volam@broadcom.com>
Signed-off-by: Michael Chan <michael.chan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agobnxt_en: Refactor bnxt_sriov_enable().
Michael Chan [Fri, 30 Aug 2019 03:54:50 +0000 (23:54 -0400)]
bnxt_en: Refactor bnxt_sriov_enable().

Refactor the hardware/firmware configuration portion in
bnxt_sriov_enable() into a new function bnxt_cfg_hw_sriov().  This
new function can be called after a firmware reset to reconfigure the
VFs previously enabled.

v2: straight refactor of the code.  Reordering done in the next patch.

Signed-off-by: Michael Chan <michael.chan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agobnxt_en: Prepare bnxt_init_one() to be called multiple times.
Michael Chan [Fri, 30 Aug 2019 03:54:49 +0000 (23:54 -0400)]
bnxt_en: Prepare bnxt_init_one() to be called multiple times.

In preparation for the new firmware reset feature, some of the logic
in bnxt_init_one() and related functions will be called again after
firmware has reset.  Reset some of the flags and capabilities so that
everything that can change can be re-initialized.  Refactor some
functions to probe firmware versions and capabilities.  Check some
buffers before allocating as they may have been allocated previously.

Signed-off-by: Michael Chan <michael.chan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agobnxt_en: Suppress all error messages in hwrm_do_send_msg() in silent mode.
Michael Chan [Fri, 30 Aug 2019 03:54:48 +0000 (23:54 -0400)]
bnxt_en: Suppress all error messages in hwrm_do_send_msg() in silent mode.

If the silent parameter is set, suppress all messages when there is
no response from firmware.  When polling for firmware to come out of
reset, no response may be normal and we want to suppress the error
messages.  Also, don't poll for the firmware DMA response if Bus Master
is disabled.  This is in preparation for error recovery when firmware
may be in error or reset state or Bus Master is disabled.

Signed-off-by: Michael Chan <michael.chan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agobnxt_en: Simplify error checking in the SR-IOV message forwarding functions.
Michael Chan [Fri, 30 Aug 2019 03:54:47 +0000 (23:54 -0400)]
bnxt_en: Simplify error checking in the SR-IOV message forwarding functions.

There are 4 functions handling message forwarding for SR-IOV.  They
check for non-zero firmware response code and then return -1.  There
is no need to do this anymore.  The main messaging function will
now return standard error code.  Since we don't need to examine the
response, we can use the hwrm_send_message() variant which will
take the mutex automatically.

Signed-off-by: Michael Chan <michael.chan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agobnxt_en: Convert error code in firmware message response to standard code.
Michael Chan [Fri, 30 Aug 2019 03:54:46 +0000 (23:54 -0400)]
bnxt_en: Convert error code in firmware message response to standard code.

The main firmware messaging function returns the firmware defined error
code and many callers have to convert to standard error code for proper
propagation to userspace.  Convert bnxt_hwrm_do_send_msg() to return
standard error code so we can do away with all the special error code
handling by the many callers.

Signed-off-by: Michael Chan <michael.chan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agobnxt_en: Remove the -1 error return code from bnxt_hwrm_do_send_msg().
Michael Chan [Fri, 30 Aug 2019 03:54:45 +0000 (23:54 -0400)]
bnxt_en: Remove the -1 error return code from bnxt_hwrm_do_send_msg().

Replace the non-standard -1 code with -EBUSY when there is no firmware
response after waiting for the maximum timeout.

Signed-off-by: Michael Chan <michael.chan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agobnxt_en: Use a common function to print the same ethtool -f error message.
Michael Chan [Fri, 30 Aug 2019 03:54:44 +0000 (23:54 -0400)]
bnxt_en: Use a common function to print the same ethtool -f error message.

The same message is printed 3 times in the code, so use a common function
to do that.

Signed-off-by: Michael Chan <michael.chan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agoMerge branch 'ioc3-eth-improvements'
David S. Miller [Fri, 30 Aug 2019 20:54:36 +0000 (13:54 -0700)]
Merge branch 'ioc3-eth-improvements'

Thomas Bogendoerfer says:

====================
ioc3-eth improvements

In my patch series for splitting out the serial code from ioc3-eth
by using a MFD device there was one big patch for ioc3-eth.c,
which wasn't really usefull for reviews. This series contains the
ioc3-eth changes splitted in smaller steps and few more cleanups.
Only the conversion to MFD will be done later in a different series.

Changes in v3:
- no need to check skb == NULL before passing it to dev_kfree_skb_any
- free memory allocated with get_page(s) with free_page(s)
- allocate rx ring with just GFP_KERNEL
- add required alignment for rings in comments

Changes in v2:
- use net_err_ratelimited for printing various ioc3 errors
- added missing clearing of rx buf valid flags into ioc3_alloc_rings
- use __func__ for printing out of memory messages
====================

Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agonet: sgi: ioc3-eth: no need to stop queue set_multicast_list
Thomas Bogendoerfer [Fri, 30 Aug 2019 09:25:38 +0000 (11:25 +0200)]
net: sgi: ioc3-eth: no need to stop queue set_multicast_list

netif_stop_queue()/netif_wake_qeue() aren't needed for changing
multicast filters.

Signed-off-by: Thomas Bogendoerfer <tbogendoerfer@suse.de>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agonet: sgi: ioc3-eth: protect emcr in all cases
Thomas Bogendoerfer [Fri, 30 Aug 2019 09:25:37 +0000 (11:25 +0200)]
net: sgi: ioc3-eth: protect emcr in all cases

emcr in private struct wasn't always protected by spinlock.

Signed-off-by: Thomas Bogendoerfer <tbogendoerfer@suse.de>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agonet: sgi: ioc3-eth: Fix IPG settings
Thomas Bogendoerfer [Fri, 30 Aug 2019 09:25:36 +0000 (11:25 +0200)]
net: sgi: ioc3-eth: Fix IPG settings

The half/full duplex settings for inter packet gap counters/timer were
reversed.

Signed-off-by: Thomas Bogendoerfer <tbogendoerfer@suse.de>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agonet: sgi: ioc3-eth: use csum_fold
Thomas Bogendoerfer [Fri, 30 Aug 2019 09:25:35 +0000 (11:25 +0200)]
net: sgi: ioc3-eth: use csum_fold

replace open coded checksum folding by csum_fold.

Signed-off-by: Thomas Bogendoerfer <tbogendoerfer@suse.de>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agonet: sgi: ioc3-eth: use dma-direct for dma allocations
Thomas Bogendoerfer [Fri, 30 Aug 2019 09:25:34 +0000 (11:25 +0200)]
net: sgi: ioc3-eth: use dma-direct for dma allocations

Replace the homegrown DMA memory allocation, which only works on
SGI-IP27 machines, with the generic dma allocations.

Signed-off-by: Thomas Bogendoerfer <tbogendoerfer@suse.de>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agonet: sgi: ioc3-eth: refactor rx buffer allocation
Thomas Bogendoerfer [Fri, 30 Aug 2019 09:25:33 +0000 (11:25 +0200)]
net: sgi: ioc3-eth: refactor rx buffer allocation

Move common code for rx buffer setup into ioc3_alloc_skb and deal
with allocation failures. Also clean up allocation size calculation.

Signed-off-by: Thomas Bogendoerfer <tbogendoerfer@suse.de>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agonet: sgi: ioc3-eth: split ring cleaning/freeing and allocation
Thomas Bogendoerfer [Fri, 30 Aug 2019 09:25:32 +0000 (11:25 +0200)]
net: sgi: ioc3-eth: split ring cleaning/freeing and allocation

Do tx ring cleaning and freeing of rx buffers, when chip is shutdown and
allocate buffers before bringing chip up.

Signed-off-by: Thomas Bogendoerfer <tbogendoerfer@suse.de>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agonet: sgi: ioc3-eth: introduce chip start function
Thomas Bogendoerfer [Fri, 30 Aug 2019 09:25:31 +0000 (11:25 +0200)]
net: sgi: ioc3-eth: introduce chip start function

ioc3_init did everything from reset to init rings to starting the chip.
This change move out chip start into a new function as preparation
for easier handling of receive buffer allocation failures.

Signed-off-by: Thomas Bogendoerfer <tbogendoerfer@suse.de>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agonet: sgi: ioc3-eth: separate tx and rx ring handling
Thomas Bogendoerfer [Fri, 30 Aug 2019 09:25:30 +0000 (11:25 +0200)]
net: sgi: ioc3-eth: separate tx and rx ring handling

After allocation of descriptor memory is now done once in probe
handling of tx ring is completely done by ioc3_clean_tx_ring. So
we remove the remaining tx ring actions out of ioc3_alloc_rings
and ioc3_free_rings and rename it to ioc3_[alloc|free]_rx_bufs
to better describe what they are doing.

Signed-off-by: Thomas Bogendoerfer <tbogendoerfer@suse.de>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agonet: sgi: ioc3-eth: get rid of ioc3_clean_rx_ring()
Thomas Bogendoerfer [Fri, 30 Aug 2019 09:25:29 +0000 (11:25 +0200)]
net: sgi: ioc3-eth: get rid of ioc3_clean_rx_ring()

Move clearing of the descriptor valid bit into ioc3_alloc_rings. This
makes ioc3_clean_rx_ring obsolete.

Signed-off-by: Thomas Bogendoerfer <tbogendoerfer@suse.de>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agonet: sgi: ioc3-eth: allocate space for desc rings only once
Thomas Bogendoerfer [Fri, 30 Aug 2019 09:25:28 +0000 (11:25 +0200)]
net: sgi: ioc3-eth: allocate space for desc rings only once

Memory for descriptor rings are allocated/freed, when interface is
brought up/down. Since the size of the rings is not changeable by
hardware, we now allocate rings now during probe and free it, when
device is removed.

Signed-off-by: Thomas Bogendoerfer <tbogendoerfer@suse.de>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agonet: sgi: ioc3-eth: use defines for constants dealing with desc rings
Thomas Bogendoerfer [Fri, 30 Aug 2019 09:25:27 +0000 (11:25 +0200)]
net: sgi: ioc3-eth: use defines for constants dealing with desc rings

Descriptor ring sizes of the IOC3 are more or less fixed size. To
make clearer where there is a relation to ring sizes use defines.

Reviewed-by: Jakub Kicinski <jakub.kicinski@netronome.com>
Signed-off-by: Thomas Bogendoerfer <tbogendoerfer@suse.de>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agonet: sgi: ioc3-eth: remove checkpatch errors/warning
Thomas Bogendoerfer [Fri, 30 Aug 2019 09:25:26 +0000 (11:25 +0200)]
net: sgi: ioc3-eth: remove checkpatch errors/warning

Before massaging the driver further fix oddities found by checkpatch like
- wrong indention
- comment formatting
- use of printk instead or netdev_xxx/pr_xxx

Signed-off-by: Thomas Bogendoerfer <tbogendoerfer@suse.de>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agoMIPS: SGI-IP27: restructure ioc3 register access
Thomas Bogendoerfer [Fri, 30 Aug 2019 09:25:25 +0000 (11:25 +0200)]
MIPS: SGI-IP27: restructure ioc3 register access

Break up the big ioc3 register struct into functional pieces to
make use in sub-function drivers more straightforward. And while
doing that get rid of all volatile access by using readX/writeX.

Signed-off-by: Thomas Bogendoerfer <tbogendoerfer@suse.de>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agoMIPS: SGI-IP27: remove ioc3 ethernet init
Thomas Bogendoerfer [Fri, 30 Aug 2019 09:25:24 +0000 (11:25 +0200)]
MIPS: SGI-IP27: remove ioc3 ethernet init

Removed not needed disabling of ethernet interrupts in IP27 platform code.

Acked-by: Paul Burton <paul.burton@mips.com>
Signed-off-by: Thomas Bogendoerfer <tbogendoerfer@suse.de>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agowimax/i2400m: remove debug containing bogus calculation of index
Colin Ian King [Fri, 30 Aug 2019 09:07:11 +0000 (10:07 +0100)]
wimax/i2400m: remove debug containing bogus calculation of index

The subtraction of the two pointers is automatically scaled by the
size of the size of the object the pointers point to, so the division
by sizeof(*i2400m->barker) is incorrect.  This has been broken since
day one of the driver and is only debug, so remove the debug completely.

Also move && in condition to clean up a checkpatch warning.

Addresses-Coverity: ("Extra sizeof expression")
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Reviewed-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agonet: spider_net: Use struct_size() helper
Gustavo A. R. Silva [Wed, 28 Aug 2019 20:21:08 +0000 (15:21 -0500)]
net: spider_net: Use struct_size() helper

One of the more common cases of allocation size calculations is finding
the size of a structure that has a zero-sized array at the end, along
with memory for some number of elements for that array. For example:

struct spider_net_card {
...
        struct spider_net_descr darray[0];
};

Make use of the struct_size() helper instead of an open-coded version
in order to avoid any potential type mistakes.

So, replace the following form:

sizeof(struct spider_net_card) + (tx_descriptors + rx_descriptors) * sizeof(struct spider_net_descr)

with:

struct_size(card, darray, tx_descriptors + rx_descriptors)

Notice that, in this case, variable alloc_size is not necessary, hence it
is removed.

Building: allmodconfig powerpc.

This code was detected with the help of Coccinelle.

Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agoMerge branch 'r8169-add-support-for-RTL8125'
David S. Miller [Fri, 30 Aug 2019 00:47:27 +0000 (17:47 -0700)]
Merge branch 'r8169-add-support-for-RTL8125'

Heiner Kallweit says:

====================
r8169: add support for RTL8125

This series adds support for the 2.5Gbps chip RTl8125. It can be found
on PCIe network cards, and on an increasing number of consumer gaming
mainboards. Series is partially based on the r8125 vendor driver.
Tested with a Delock 89531 PCIe card against a Netgear GS110MX
Multi-Gig switch.
Firmware isn't strictly needed, but on some systems there may be
compatibility issues w/o firmware. Firmware has been submitted to
linux-firmware.

v2:
- split first patch into 6 smaller ones to facilitate bisecting
====================

Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agor8169: add support for EEE on RTL8125
Heiner Kallweit [Wed, 28 Aug 2019 20:29:05 +0000 (22:29 +0200)]
r8169: add support for EEE on RTL8125

This adds EEE support for RTL8125 based on the vendor driver.
Supported is EEE for 100Mbps and 1Gbps. Realtek recommended to not yet
enable EEE for 2.5Gbps due to potential compatibility issues. Also
ethtool doesn't support yet controlling EEE for 2.5Gbps and 5Gbps.

Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agor8169: add RTL8125 PHY initialization
Heiner Kallweit [Wed, 28 Aug 2019 20:28:32 +0000 (22:28 +0200)]
r8169: add RTL8125 PHY initialization

This patch adds PHY initialization magic copied from the r8125 vendor
driver. In addition it supports loading the firmware for chip version
RTL_GIGA_MAC_VER_61.

Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agor8169: add support for RTL8125
Heiner Kallweit [Wed, 28 Aug 2019 20:28:03 +0000 (22:28 +0200)]
r8169: add support for RTL8125

This adds support for 2.5Gbps chip RTL8125, it's partially based on the
r8125 vendor driver. Tested with a Delock 89531 PCIe card against a
Netgear GS110MX Multi-Gig switch. Firmware isn't strictly needed,
but on some systems there may be compatibility issues w/o firmware.
Firmware has been submitted to linux-firmware.

Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agor8169: don't use bit LastFrag in tx descriptor after send
Heiner Kallweit [Wed, 28 Aug 2019 20:27:30 +0000 (22:27 +0200)]
r8169: don't use bit LastFrag in tx descriptor after send

On RTL8125 this bit is always cleared after send. Therefore check for
tx_skb->skb being set what is functionally equivalent.

Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agor8169: read common register for PCI commit
Heiner Kallweit [Wed, 28 Aug 2019 20:26:51 +0000 (22:26 +0200)]
r8169: read common register for PCI commit

RTL8125 uses a different register number for IntrMask.
To net have side effects by reading a random register let's
use a register that is the same on all supported chip families.

Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agor8169: move disabling interrupt coalescing to RTL8169/RTL8168 init
Heiner Kallweit [Wed, 28 Aug 2019 20:26:13 +0000 (22:26 +0200)]
r8169: move disabling interrupt coalescing to RTL8169/RTL8168 init

RTL8125 doesn't support the same coalescing registers, therefore move
this initialization to the 8168/6169-specific init.

Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agor8169: factor out reading MAC address from registers
Heiner Kallweit [Wed, 28 Aug 2019 20:25:32 +0000 (22:25 +0200)]
r8169: factor out reading MAC address from registers

For RTL8125 we will have to read the MAC address also from another
register range, therefore create a small helper.

Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agor8169: restrict rtl_is_8168evl_up to RTL8168 chip versions
Heiner Kallweit [Wed, 28 Aug 2019 20:24:54 +0000 (22:24 +0200)]
r8169: restrict rtl_is_8168evl_up to RTL8168 chip versions

Extend helper rtl_is_8168evl_up to properly work once we add
mac version numbers >51 for RTL8125.

Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agor8169: change interrupt mask type to u32
Heiner Kallweit [Wed, 28 Aug 2019 20:24:13 +0000 (22:24 +0200)]
r8169: change interrupt mask type to u32

RTL8125 uses a 32 bit interrupt mask even though only bits in the
lower 16 bits are used. Change interrupt mask size to u32 to be
prepared and reintroduce helper rtl_get_events.

Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agoMerge tag 'mlx5-updates-2019-08-22' of git://git.kernel.org/pub/scm/linux/kernel...
David S. Miller [Fri, 30 Aug 2019 00:25:18 +0000 (17:25 -0700)]
Merge tag 'mlx5-updates-2019-08-22' of git://git./linux/kernel/git/saeed/linux

Saeed Mahameed says:

====================
mlx5-updates-2019-08-22

Misc updates for mlx5e net device driver

1) Maxim and Tariq add the support for LAG TX port affinity distribution
When VF LAG is enabled, VFs netdevs will round-robin the TX affinity
of their tx queues among the different LAG ports.
2) Aya adds the support for ip-in-ip RSS.
3) Marina adds the support for ip-in-ip TX TSO and checksum offloads.
4) Moshe adds a device internal drop counter to mlx5 ethtool stats.
====================

Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agonet: dsa: mv88e6xxx: fix freeing unused SERDES IRQ
Vivien Didelot [Wed, 28 Aug 2019 18:55:11 +0000 (14:55 -0400)]
net: dsa: mv88e6xxx: fix freeing unused SERDES IRQ

Now mv88e6xxx does not enable its ports at setup itself and let
the DSA core handle this, unused ports are disabled without being
powered on first. While that is expected, the SERDES powering code
was assuming that a port was already set up before powering it down,
resulting in freeing an unused IRQ. The patch fixes this assumption.

Fixes: b759f528ca3d ("net: dsa: mv88e6xxx: enable SERDES after setup")
Signed-off-by: Vivien Didelot <vivien.didelot@gmail.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Tested-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agonet: dsa: mv88e6xxx: keep CMODE writable code private
Vivien Didelot [Wed, 28 Aug 2019 16:26:59 +0000 (12:26 -0400)]
net: dsa: mv88e6xxx: keep CMODE writable code private

This is a follow-up patch for commit 7a3007d22e8d ("net: dsa:
mv88e6xxx: fully support SERDES on Topaz family").

Since .port_set_cmode is only called from mv88e6xxx_port_setup_mac and
mv88e6xxx_phylink_mac_config, it is fine to keep this "make writable"
code private to the mv88e6341_port_set_cmode implementation, instead
of adding yet another operation to the switch info structure.

Signed-off-by: Vivien Didelot <vivien.didelot@gmail.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agonet: dsa: mv88e6xxx: get serdes lane after lock
Vivien Didelot [Wed, 28 Aug 2019 16:26:11 +0000 (12:26 -0400)]
net: dsa: mv88e6xxx: get serdes lane after lock

This is a follow-up patch for commit 17deaf5cb37a ("net: dsa:
mv88e6xxx: create serdes_get_lane chip operation").

The .serdes_get_lane implementations access the CMODE of a port,
even though it is cached at the moment, it is safer to call them
after the mutex is locked, not before.

At the same time, check for an eventual error and return IRQ_DONE,
instead of blindly ignoring it.

Signed-off-by: Vivien Didelot <vivien.didelot@gmail.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agoMerge branch 'net-hns3-add-some-cleanups-and-optimizations'
David S. Miller [Thu, 29 Aug 2019 23:57:44 +0000 (16:57 -0700)]
Merge branch 'net-hns3-add-some-cleanups-and-optimizations'

Huazhong Tan says:

====================
net: hns3: add some cleanups and optimizations

This patch-set includes cleanups, optimizations and bugfix for
the HNS3 ethernet controller driver.

[patch 01/12] adds code optimization for debugfs command "dump reg".

[patch 02/12] fixes magic number issues.

[patch 03/12] modifies some parameters about hclge_dbg_dump_tm_map().

[patch 04/12] removes some unused parameters.

[patch 05/12] refactors some logs to make them more readable.

[patch 06/12] makes some resusable codes into functions.

[patch 07/12] fixes some type errors.

[patch 08/12] reduces the waiting time for per TQP reset.

[patch 09/12] implements .process_hw_error for hns3 client.

[patch 10/12] adds phy selftest for HNS3 driver.

[patch 11/12] adds checking for reset interrupt status when reset fails.

[patch 12/12] prevents SSU loopback when running ethtool -t.
====================

Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agonet: hns3: not allow SSU loopback while execute ethtool -t dev
Yufeng Mo [Wed, 28 Aug 2019 14:23:16 +0000 (22:23 +0800)]
net: hns3: not allow SSU loopback while execute ethtool -t dev

The current loopback mode is to add 0x1F to the SMAC address
as the DMAC address and enable the promiscuous mode.
However, if the VF address is the same as the DMAC address,
the loopback test fails.

Loopback can be enabled in three places: SSU, MAC, and serdes.
By default, SSU loopback is enabled, so if the SMAC and the DMAC
are the same, the packets are looped back in the SSU. If SSU loopback
is disabled, packets can reach MAC even if SMAC is the same as DMAC.

Therefore, this patch disables the SSU loopback before the loopback
test. In this way, the SMAC and DMAC can be the same, and the
promiscuous mode does not need to be enabled. And this is not
valid in version 0x20.

This patch also uses a macro to replace 0x1F.

Fixes: c39c4d98dc65 ("net: hns3: Add mac loopback selftest support in hns3 driver")
Signed-off-by: Yufeng Mo <moyufeng@huawei.com>
Reviewed-by: Peng Li <lipeng321@huawei.com>
Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agonet: hns3: check reset interrupt status when reset fails
Huazhong Tan [Wed, 28 Aug 2019 14:23:15 +0000 (22:23 +0800)]
net: hns3: check reset interrupt status when reset fails

Currently, the reset interrupt will be cleared firstly, so when
reset fails, if interrupt status register has reset interrupt,
it means there is a new coming reset.

Fixes: 72e2fb07997c ("net: hns3: clear reset interrupt status in hclge_irq_handle()")
Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com>
Reviewed-by: Peng Li <lipeng321@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agonet: hns3: add phy selftest function
Yufeng Mo [Wed, 28 Aug 2019 14:23:14 +0000 (22:23 +0800)]
net: hns3: add phy selftest function

Currently, the loopback test supports only mac selftest and serdes
selftest. This patch adds phy selftest.

Signed-off-by: Yufeng Mo <moyufeng@huawei.com>
Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agonet: hns3: implement .process_hw_error for hns3 client
Weihang Li [Wed, 28 Aug 2019 14:23:13 +0000 (22:23 +0800)]
net: hns3: implement .process_hw_error for hns3 client

When hardware or IMP get specified error it may need the client
to take some special operations.

This patch implements the hns3 client's process_hw_errorx.

Signed-off-by: Weihang Li <liweihang@hisilicon.com>
Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com>
Reviewed-by: Peng Li <lipeng321@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agonet: hns3: optimize waiting time for TQP reset
Zhongzhu Liu [Wed, 28 Aug 2019 14:23:12 +0000 (22:23 +0800)]
net: hns3: optimize waiting time for TQP reset

This patch optimizes the waiting time for TQP reset.

Signed-off-by: Zhongzhu Liu <liuzhongzhu@huawei.com>
Reviewed-by: Yunsheng Lin <linyunsheng@huawei.com>
Reviewed-by: Peng Li <lipeng321@huawei.com>
Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agonet: hns3: fix incorrect type in assignment.
Guojia Liao [Wed, 28 Aug 2019 14:23:11 +0000 (22:23 +0800)]
net: hns3: fix incorrect type in assignment.

This patch fixes some incorrect type in assignment reported by sparse.
Those sparse warning as below:
- warning : restricted __le16 degrades to integer
- warning : cast from restricted __le32
- warning : expected restricted __le32
- warning : cast from restricted __be32
- warning : cast from restricted __be16
- warning : cast to restricted __le16

Signed-off-by: Guojia Liao <liaoguojia@huawei.com>
Reviewed-by: Peng Li <lipeng321@huawei.com>
Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agonet: hns3: make some reusable codes into a function
Yonglong Liu [Wed, 28 Aug 2019 14:23:10 +0000 (22:23 +0800)]
net: hns3: make some reusable codes into a function

In hclge_dcb.c, these pair of codes:
hclge_notify_client(hdev, HNAE3_DOWN_CLIENT);
hclge_notify_client(hdev, HNAE3_UNINIT_CLIENT);
and
hclge_notify_client(hdev, HNAE3_INIT_CLIENT);
hclge_notify_client(hdev, HNAE3_UP_CLIENT);
are called many times, so make them into a function.

Signed-off-by: Yonglong Liu <liuyonglong@huawei.com>
Reviewed-by: Peng Li <lipeng321@huawei.com>
Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agonet: hns3: optimize some log printings
Yufeng Mo [Wed, 28 Aug 2019 14:23:09 +0000 (22:23 +0800)]
net: hns3: optimize some log printings

To better identify abnormal conditions, this patch modifies or
adds some logs to show driver status more accurately.

Signed-off-by: Yufeng Mo <moyufeng@huawei.com>
Signed-off-by: Zhongzhu Liu <liuzhongzhu@huawei.com>
Signed-off-by: Guangbin Huang <huangguangbin2@huawei.com>
Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agonet: hns3: reduce the parameters of some functions
Guojia Liao [Wed, 28 Aug 2019 14:23:08 +0000 (22:23 +0800)]
net: hns3: reduce the parameters of some functions

This patch simplifies parameters of some functions by deleting
unused parameter.

Signed-off-by: Guojia Liao <liaoguojia@huawei.com>
Signed-off-by: Yufeng Mo <moyufeng@huawei.com>
Signed-off-by: Guangbin Huang <huangguangbin2@huawei.com>
Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agonet: hns3: modify base parameter of kstrtouint in hclge_dbg_dump_tm_map
Huazhong Tan [Wed, 28 Aug 2019 14:23:07 +0000 (22:23 +0800)]
net: hns3: modify base parameter of kstrtouint in hclge_dbg_dump_tm_map

This patch replaces kstrtouint()'s patameter base with 0 in the
hclge_dbg_dump_tm_mac(), which makes it more flexible. Also
uses a macro to replace string "dump tm map", since it has been
used multiple times.

Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agonet: hns3: use macro instead of magic number
Huazhong Tan [Wed, 28 Aug 2019 14:23:06 +0000 (22:23 +0800)]
net: hns3: use macro instead of magic number

This patch uses macro to replace some magic number.

Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agonet: hns3: code optimization for debugfs related to "dump reg"
Zhongzhu Liu [Wed, 28 Aug 2019 14:23:05 +0000 (22:23 +0800)]
net: hns3: code optimization for debugfs related to "dump reg"

For making the code more readable, this patch uses a array to
keep the information about the dumping register, and then uses
it to parse the parameter cmd_buf which passing into
hclge_dbg_dump_reg_cmd().

Also replaces parameter "base" of kstrtouint with 0 in the
hclge_dbg_dump_reg_common(), which makes it more flexible.

Signed-off-by: Zhongzhu Liu <liuzhongzhu@huawei.com>
Signed-off-by: Guangbin Huang <huangguangbin2@huawei.com>
Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agodpaa2-eth: Add pause frame support
Ioana Radulescu [Wed, 28 Aug 2019 14:08:15 +0000 (17:08 +0300)]
dpaa2-eth: Add pause frame support

Starting with firmware version MC10.18.0, we have support for
L2 flow control. Asymmetrical configuration (Rx or Tx only) is
supported, but not pause frame autonegotioation.

Pause frame configuration is done via ethtool. By default, we start
with flow control enabled on both Rx and Tx. Changes are propagated
to hardware through firmware commands, using two flags (PAUSE,
ASYM_PAUSE) to specify Rx and Tx pause configuration, as follows:

PAUSE | ASYM_PAUSE | Rx pause | Tx pause
----------------------------------------
  0   |     0      | disabled | disabled
  0   |     1      | disabled | enabled
  1   |     0      | enabled  | enabled
  1   |     1      | enabled  | disabled

The hardware can automatically send pause frames when the number
of buffers in the pool goes below a predefined threshold. Due to
this, flow control is incompatible with Rx frame queue taildrop
(both mechanisms target the case when processing of ingress
frames can't keep up with the Rx rate; for large frames, the number
of buffers in the pool may never get low enough to trigger pause
frames as long as taildrop is enabled). So we set pause frame
generation and Rx FQ taildrop as mutually exclusive.

Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agodpaa2-eth: Use stored link settings
Ioana Radulescu [Wed, 28 Aug 2019 14:08:14 +0000 (17:08 +0300)]
dpaa2-eth: Use stored link settings

Whenever a link state change occurs, we get notified and save
the new link settings in the device's private data. In ethtool
get_link_ksettings, use the stored state instead of interrogating
the firmware each time.

Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agodpaa2-eth: Remove support for changing link settings
Ioana Radulescu [Wed, 28 Aug 2019 14:08:13 +0000 (17:08 +0300)]
dpaa2-eth: Remove support for changing link settings

We only support fixed-link for now, so there is no point in
offering users the option to change link settings via ethtool.

Functionally there is no change, since firmware prevents us from
changing link parameters anyway.

Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agoMerge branch 'mlxsw-Various-updates'
David S. Miller [Thu, 29 Aug 2019 01:24:04 +0000 (18:24 -0700)]
Merge branch 'mlxsw-Various-updates'

Ido Schimmel says:

====================
mlxsw: Various updates

Patch #1 from Amit removes 56G speed support. The reasons for this are
detailed in the commit message.

Patch #2 from Shalom ensures that the hardware does not auto negotiate
the number of used lanes. For example, if a four lane port supports 100G
over both two and four lanes, it will not advertise the two lane link
mode.

Patch #3 bumps the firmware version supported by the driver.

Patch #4 from Petr adds ethtool counters to help debug the internal PTP
implementation in mlxsw. I copied Richard on this patch in case he has
comments.
====================

Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agomlxsw: spectrum_ptp: Add counters for GC events
Petr Machata [Wed, 28 Aug 2019 15:54:37 +0000 (18:54 +0300)]
mlxsw: spectrum_ptp: Add counters for GC events

On Spectrum-1, timestamped PTP packets and the corresponding timestamps need to
be kept in caches until both are available, at which point they are matched up
and packets forwarded as appropriate. However, not all packets will ever see
their timestamp, and not all timestamps will ever see their packet. It is
necessary to dispose of such abandoned entries, so a garbage collector was
introduced in commit 5d23e4159772 ("mlxsw: spectrum: PTP: Garbage-collect
unmatched entries").

If these GC events happen often, it is a sign of a problem. However because this
whole mechanism is taking place behind the scenes, there is no direct way to
determine whether garbage collection took place.

Therefore to fix this, on Spectrum-1 only, expose four artificial ethtool
counters for the GC events: GCd timestamps and packets, in TX and RX directions.

Cc: Richard Cochran <richardcochran@gmail.com>
Signed-off-by: Petr Machata <petrm@mellanox.com>
Signed-off-by: Ido Schimmel <idosch@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agomlxsw: Bump firmware version to 13.2000.1886
Ido Schimmel [Wed, 28 Aug 2019 15:54:36 +0000 (18:54 +0300)]
mlxsw: Bump firmware version to 13.2000.1886

The new version supports extended error reporting from firmware via a
new TLV in the EMAD packet. Similar to netlink extended ack.

It also fixes an issue in the PCI code that can result in false AER
errors under high Tx rate.

Signed-off-by: Ido Schimmel <idosch@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agomlxsw: spectrum: Prevent auto negotiation on number of lanes
Shalom Toledo [Wed, 28 Aug 2019 15:54:35 +0000 (18:54 +0300)]
mlxsw: spectrum: Prevent auto negotiation on number of lanes

After 50G-1-lane and 100G-2-lanes link modes were introduced, the driver
is facing situations in which the hardware auto negotiates not only on
speed and type, but also on number of lanes.

Prevent auto negotiation on number of lanes by allowing only port speeds
that can be supported on a given port according to its width.

Signed-off-by: Shalom Toledo <shalomt@mellanox.com>
Acked-by: Jiri Pirko <jiri@mellanox.com>
Signed-off-by: Ido Schimmel <idosch@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agomlxsw: Remove 56G speed support
Amit Cohen [Wed, 28 Aug 2019 15:54:34 +0000 (18:54 +0300)]
mlxsw: Remove 56G speed support

Commit 275e928f1911 ("mlxsw: spectrum: Prevent force of 56G") prevented
the driver from setting a speed of 56G when auto-negotiation is off.
This is the only speed supported by mlxsw that cannot be set when
auto-negotiation is off, which makes it difficult to write generic
tests.

Further, the speed is not supported by newer ASICs such as Spectrum-2
and to the best of our knowledge it is not used by current users.

Therefore, remove 56G support from mlxsw.

Signed-off-by: Amit Cohen <amitc@mellanox.com>
Signed-off-by: Ido Schimmel <idosch@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agonet: phy: force phy suspend when calling phy_stop
Jian Shen [Wed, 28 Aug 2019 01:34:47 +0000 (09:34 +0800)]
net: phy: force phy suspend when calling phy_stop

Some ethernet drivers may call phy_start() and phy_stop() from
ndo_open() and ndo_close() respectively.

When network cable is unconnected, and operate like below:
step 1: ifconfig ethX up -> ndo_open -> phy_start ->start
autoneg, and phy is no link.
step 2: ifconfig ethX down -> ndo_close -> phy_stop -> just stop
phy state machine.

This patch forces phy suspend even phydev->link is off.

Signed-off-by: Jian Shen <shenjian15@huawei.com>
Reviewed-by: Heiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agoMerge branch '100GbE' of git://git.kernel.org/pub/scm/linux/kernel/git/jkirsher/next...
David S. Miller [Wed, 28 Aug 2019 22:47:11 +0000 (15:47 -0700)]
Merge branch '100GbE' of git://git./linux/kernel/git/jkirsher/next-queue

Jeff Kirsher says:

====================
100GbE Intel Wired LAN Driver Updates 2019-08-26

This series contains updates to ice driver only.

Usha fixes the statistics reported on 4 port NICs which were reporting
the incorrect statistics due to using the incorrect port identifier.

Victor fixes an issue when trying to traverse to the first node of a
requested layer by adding a sibling head pointer for each layer per
traffic class.

Anirudh cleans up the locking and logic for enabling and disabling
VSI's to make it more consistent.  Updates the driver to do dynamic
allocation of queue management bitmaps and arrays, rather than
statically allocating them which consumes more memory than required.
Refactor the logic in ice_ena_msix_range() for clarity and add
additional checks for when requested resources exceed what is available.

Jesse updates the debugging print statements to make it more useful when
dealing with link and PHY related issues.

Krzysztof adds a local variable to the VSI rebuild path to improve
readability.

Akeem limits the reporting of MDD events from VFs so that the kernel
log is not clogged up with MDD events which are duplicate or potentially
false positives.  Fixed a reset issue that would result in the system
getting into a state that could only be resolved by a reboot by
testing if the VF is in a disabled state during a reset.

Michal adds a check to avoid trying to access memory that has not be
allocated by checking the number of queue pairs.

Jake fixes a static analysis warning due to a cast of a u8 to unsigned
long, so just update ice_is_tc_ena() to take a unsigned long so that a
cast is not necessary.

Colin Ian King fixes a potential infinite loop where a u8 is being
compared to an int.

Maciej refactors the queue handling functions that work on queue arrays
so that the logic can be done for a single queue.

Paul adds support for VFs to enable and disable single queues.

Henry fixed the order of operations in ice_remove() which was trying to
use adminq operations that were already disabled.
====================

Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agophy: mdio-sun4i: use devm_platform_ioremap_resource() to simplify code
YueHaibing [Tue, 27 Aug 2019 13:50:32 +0000 (21:50 +0800)]
phy: mdio-sun4i: use devm_platform_ioremap_resource() to simplify code

Use devm_platform_ioremap_resource() to simplify the code a bit.
This is detected by coccinelle.

Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agophy: mdio-mux-meson-g12a: use devm_platform_ioremap_resource() to simplify code
YueHaibing [Tue, 27 Aug 2019 13:49:40 +0000 (21:49 +0800)]
phy: mdio-mux-meson-g12a: use devm_platform_ioremap_resource() to simplify code

Use devm_platform_ioremap_resource() to simplify the code a bit.
This is detected by coccinelle.

Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agophy: mdio-moxart: use devm_platform_ioremap_resource() to simplify code
YueHaibing [Tue, 27 Aug 2019 13:48:04 +0000 (21:48 +0800)]
phy: mdio-moxart: use devm_platform_ioremap_resource() to simplify code

Use devm_platform_ioremap_resource() to simplify the code a bit.
This is detected by coccinelle.

Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agophy: mdio-hisi-femac: use devm_platform_ioremap_resource() to simplify code
YueHaibing [Tue, 27 Aug 2019 13:47:22 +0000 (21:47 +0800)]
phy: mdio-hisi-femac: use devm_platform_ioremap_resource() to simplify code

Use devm_platform_ioremap_resource() to simplify the code a bit.
This is detected by coccinelle.

Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agophy: mdio-bcm-iproc: use devm_platform_ioremap_resource() to simplify code
YueHaibing [Tue, 27 Aug 2019 13:46:16 +0000 (21:46 +0800)]
phy: mdio-bcm-iproc: use devm_platform_ioremap_resource() to simplify code

Use devm_platform_ioremap_resource() to simplify the code a bit.
This is detected by coccinelle.

Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Reviewed-by: Ray Jui <ray.jui@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agowimax/i2400m: remove redundant assignment to variable result
Colin Ian King [Tue, 27 Aug 2019 11:47:39 +0000 (12:47 +0100)]
wimax/i2400m: remove redundant assignment to variable result

Variable result is being assigned a value that is never read and result
is being re-assigned a little later on. The assignment is redundant
and hence can be removed.

Addresses-Coverity: ("Ununsed value")
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agoipv6: shrink struct ipv6_mc_socklist
Eric Dumazet [Tue, 27 Aug 2019 07:08:12 +0000 (00:08 -0700)]
ipv6: shrink struct ipv6_mc_socklist

Remove two holes on 64bit arches, to bring the size
to one cache line exactly.

Signed-off-by: Eric Dumazet <edumazet@google.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agonet/mlx5e: Support TSO and TX checksum offloads for IP-in-IP
Marina Varshaver [Tue, 20 Aug 2019 01:59:11 +0000 (04:59 +0300)]
net/mlx5e: Support TSO and TX checksum offloads for IP-in-IP
tunnels

Add TX offloads support for IP-in-IP tunneled packets by reporting
the needed netdev features.

Signed-off-by: Marina Varshaver <marinav@mellanox.com>
Signed-off-by: Avihu Hagag <avihuh@mellanox.com>
Reviewed-by: Aya Levin <ayal@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
4 years agonet/mlx5e: Improve stateless offload capability check
Marina Varshaver [Tue, 20 Aug 2019 00:36:29 +0000 (03:36 +0300)]
net/mlx5e: Improve stateless offload capability check

Use generic function for checking tunnel stateless offload capability
instead of separate macros.

Signed-off-by: Marina Varshaver <marinav@mellanox.com>
Reviewed-by: Aya Levin <ayal@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
4 years agonet/mlx5e: Support RSS for IP-in-IP and IPv6 tunneled packets
Aya Levin [Mon, 29 Apr 2019 14:45:52 +0000 (17:45 +0300)]
net/mlx5e: Support RSS for IP-in-IP and IPv6 tunneled packets

Add support for inner header RSS on IP-in-IP and IPv6 tunneled packets.

Add rules to the steering table regarding outer IP header, with
IPv4/6->IP-in-IP. Tunneled packets with protocol numbers: 0x4 (IP-in-IP)
and 0x29 (IPv6) are RSS-ed on the inner IP header.
Separate FW dependencies between flow table inner IP capabilities and
GRE offload support. Allowing this feature even if GRE offload is not
supported.  Tested with multi stream TCP traffic tunneled with IPnIP.
Verified that:
Without this patch, only a single RX ring was processing the traffic.
With this patch, multiple RX rings were processing the traffic.
Verified with and without GRE offload support.

Signed-off-by: Aya Levin <ayal@mellanox.com>
Reviewed-by: Tariq Toukan <tariqt@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
4 years agonet/mlx5e: Change function's position to a more fitting file
Aya Levin [Thu, 8 Aug 2019 13:16:28 +0000 (16:16 +0300)]
net/mlx5e: Change function's position to a more fitting file

Move function which indicates whether tunnel inner flow table is
supported from en.h to en_fs.c. It fits better right after tunnel
protocol rules definitions.

Signed-off-by: Aya Levin <ayal@mellanox.com>
Reviewed-by: Tariq Toukan <tariqt@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
4 years agonet/mlx5e: Add device out of buffer counter
Moshe Shemesh [Sun, 4 Aug 2019 14:53:09 +0000 (17:53 +0300)]
net/mlx5e: Add device out of buffer counter

Added the following packets drop counter:
Device out of buffer - counts packets which were dropped due to full
device internal receive queue.
This counter will be shown on ethtool as a new counter called
dev_out_of_buffer.
The counter is read from FW by command QUERY_VNIC_ENV.

Signed-off-by: Moshe Shemesh <moshe@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
4 years agonet/mlx5e: Support LAG TX port affinity distribution
Maxim Mikityanskiy [Wed, 7 Aug 2019 14:46:15 +0000 (17:46 +0300)]
net/mlx5e: Support LAG TX port affinity distribution

When the VF LAG is in use, round-robin the TX affinity of channels among
the different ports, if supported by the firmware. Create a set of TISes
per port, while doing round-robin of the channels over the different
sets. Let all SQs of a channel share the same set of TISes.

If lag_tx_port_affinity HCA cap bit is supported, num_lag_ports > 1 and
we aren't the LACP owner (PF in the regular use), assign the affinities,
otherwise use tx_affinity == 0 in TIS context to let the FW assign the
affinities itself. The TISes of the LACP owner are mapped only to the
native physical port.

For VFs, the starting port for round-robin is determined by its vhca_id,
because a VF may have only one channel if attached to a single-core VM.

Signed-off-by: Maxim Mikityanskiy <maximmi@mellanox.com>
Signed-off-by: Tariq Toukan <tariqt@mellanox.com>
Signed-off-by: Mark Bloch <markb@mellanox.com>
Reviewed-by: Tariq Toukan <tariqt@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
4 years agonet/mlx5e: Expose new function for TIS destroy loop
Tariq Toukan [Mon, 24 Jun 2019 09:03:02 +0000 (12:03 +0300)]
net/mlx5e: Expose new function for TIS destroy loop

For better modularity and code sharing.
Function internal change to be introduced in the next patches.

Signed-off-by: Tariq Toukan <tariqt@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
4 years agonet/mlx5e: ethtool, Fix a typo in WOL function names
Erez Alfasi [Wed, 7 Aug 2019 14:56:02 +0000 (17:56 +0300)]
net/mlx5e: ethtool, Fix a typo in WOL function names

Fix a typo in 'mlx5e_refomrat_wol_mode_mlx5_to_linux' and
'mlx5e_refomrat_wol_mode_linux_to_mlx5' function names:
"refomrat" -> "reformat".

Fixes: 928cfe8745a6 ("net/mlx5e: Wake On LAN support")
Signed-off-by: Erez Alfasi <ereza@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
4 years agoMerge branch 'mlx5-next' of git://git.kernel.org/pub/scm/linux/kernel/git/mellanox...
Saeed Mahameed [Wed, 28 Aug 2019 18:45:03 +0000 (11:45 -0700)]
Merge branch 'mlx5-next' of git://git./linux/kernel/git/mellanox/linux

mlx5 HW spec and bits updates:
1) Aya exposes IP-in-IP capability in mlx5_core.
2) Maxim exposes lag tx port affinity capabilities.
3) Moshe adds VNIC_ENV internal rq counter bits.
4) ODP capabilities for DC transport

Misc updates:
5) Saeed, two compiler warnings cleanups
6) Add XRQ legacy commands opcodes
7) Use refcount_t for refcount
8) fix a -Wstringop-truncation warning

4 years agonet/mlx5: Set ODP capabilities for DC transport to max
Michael Guralnik [Mon, 19 Aug 2019 12:08:13 +0000 (15:08 +0300)]
net/mlx5: Set ODP capabilities for DC transport to max

In mlx5_core initialization, query max ODP capabilities for DC transport
from FW and set as current capabilities.

Signed-off-by: Michael Guralnik <michaelgur@mellanox.com>
Signed-off-by: Leon Romanovsky <leonro@mellanox.com>
4 years agoMerge branch 'stmmac-Add-EHL-and-TGL-PCI-info-and-PCI-ID'
David S. Miller [Wed, 28 Aug 2019 04:59:38 +0000 (21:59 -0700)]
Merge branch 'stmmac-Add-EHL-and-TGL-PCI-info-and-PCI-ID'

Voon Weifeng says:

====================
stmmac: Add EHL and TGL PCI info and PCI ID

In order to keep PCI info simple and neat, this patch series have
introduced a 3 hierarchy of struct. First layer will be the
intel_mgbe_common_data struct which keeps all Intel common configuration.
Second layer will be xxx_common_data which keeps all the different Intel
microarchitecture, e.g tgl, ehl. The third layer will be configuration
that tied to the PCI ID only based on speed and RGMII/SGMII interface.

EHL and TGL will also having a higher system clock which is 200Mhz.
====================

Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agonet: stmmac: setup higher frequency clk support for EHL & TGL
Voon Weifeng [Tue, 27 Aug 2019 01:38:11 +0000 (09:38 +0800)]
net: stmmac: setup higher frequency clk support for EHL & TGL

EHL DW EQOS is running on a 200MHz clock. Setting up stmmac-clk,
ptp clock and ptp_max_adj to 200MHz.

Signed-off-by: Voon Weifeng <weifeng.voon@intel.com>
Signed-off-by: Ong Boon Leong <boon.leong.ong@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agonet: stmmac: add EHL RGMII 1Gbps PCI info and PCI ID
Voon Weifeng [Tue, 27 Aug 2019 01:38:10 +0000 (09:38 +0800)]
net: stmmac: add EHL RGMII 1Gbps PCI info and PCI ID

Added EHL RGMII 1Gbps PCI ID. Different MII and speed will have
different PCI ID.

Signed-off-by: Voon Weifeng <weifeng.voon@intel.com>
Signed-off-by: Ong Boon Leong <boon.leong.ong@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agonet: stmmac: add TGL SGMII 1Gbps PCI info and PCI ID
Voon Weifeng [Tue, 27 Aug 2019 01:38:09 +0000 (09:38 +0800)]
net: stmmac: add TGL SGMII 1Gbps PCI info and PCI ID

Added TGL SGMII 1Gbps PCI ID. Different MII and speed will have
different PCI ID.

Signed-off-by: Voon Weifeng <weifeng.voon@intel.com>
Signed-off-by: Ong Boon Leong <boon.leong.ong@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agonet: stmmac: add EHL SGMII 1Gbps PCI info and PCI ID
Voon Weifeng [Tue, 27 Aug 2019 01:38:08 +0000 (09:38 +0800)]
net: stmmac: add EHL SGMII 1Gbps PCI info and PCI ID

Added EHL SGMII 1Gbps PCI ID. Different MII and speed will have
different PCI ID.

Signed-off-by: Voon Weifeng <weifeng.voon@intel.com>
Signed-off-by: Ong Boon Leong <boon.leong.ong@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agoMerge branch 'net-dsa-mv88e6xxx-Peridot-Topaz-SERDES-changes'
David S. Miller [Wed, 28 Aug 2019 04:42:16 +0000 (21:42 -0700)]
Merge branch 'net-dsa-mv88e6xxx-Peridot-Topaz-SERDES-changes'

Marek Behún says:

====================
net: dsa: mv88e6xxx: Peridot/Topaz SERDES changes

this is the fifth version of changes for the Topaz/Peridot family of
switches. The patches apply on net-next.
Changes since v4:
 - added Reviewed-by and Tested-by tags on first 2 patches, the others
   are changed are affected by changes in patch 3/6, so I did not add
   the tags, except for 5/6, which is just macro renaming
 - patch 3 was changed: the serdes_get_lane returns 0 on success (lane
   was discovered), -ENODEV if not lane is present on the port, and
   other error if other error occured. Lane is put into a pointer of
   type u8
 - patches 4 and 6 were affected by this (error detecting from
   serdes_get_lane)
 - Andrew's complaint about the two additional parameters
   (allow_over_2500 and make_cmode_writable) was addressed, by Vivien's
   advice: I put a new method into chip operations structure, named
   port_set_cmode_writable. This is called from mv88e6xxx_port_setup_mac
   just before port_set_cmode. The method is implemented for Topaz.
   The check if cmodes over 2500 should be allowed on given port is now
   done in the specific port_set_cmode() that requires it, thus the
   allow_over_2500 argument is not needed

Again, tested on Turris Mox with Peridot, Topaz, and Peridot + Topaz.
====================

Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agonet: dsa: mv88e6xxx: fully support SERDES on Topaz family
Marek Behún [Mon, 26 Aug 2019 21:31:55 +0000 (23:31 +0200)]
net: dsa: mv88e6xxx: fully support SERDES on Topaz family

Currently we support SERDES on the Topaz family in a limited way: no
IRQs and the cmode is not writable, thus the mode is determined by
strapping pins.

Marvell's examples though show how to make cmode writable on port 5 and
support SGMII autonegotiation. It is done by writing hidden registers,
for which we already have code.

This patch adds support for making the cmode for the SERDES port
writable on the Topaz family, via a new chip operation,
.port_set_cmode_writable, which is called from mv88e6xxx_port_setup_mac
just before .port_set_cmode.

SERDES IRQs are also enabled for Topaz.

Tested on Turris Mox.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Vivien Didelot <vivien.didelot@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agonet: dsa: mv88e6xxx: rename port cmode macro
Marek Behún [Mon, 26 Aug 2019 21:31:54 +0000 (23:31 +0200)]
net: dsa: mv88e6xxx: rename port cmode macro

This is a cosmetic update. We are removing the last underscore from
macros MV88E6XXX_PORT_STS_CMODE_100BASE_X and
MV88E6XXX_PORT_STS_CMODE_1000BASE_X. The 2500base-x version does not
have that underscore. Also PHY_INTERFACE_MODE_ macros do not have it
there.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agonet: dsa: mv88e6xxx: simplify SERDES code for Topaz and Peridot
Marek Behún [Mon, 26 Aug 2019 21:31:53 +0000 (23:31 +0200)]
net: dsa: mv88e6xxx: simplify SERDES code for Topaz and Peridot

By adding an additional serdes_get_lane implementation (for Topaz), we
can merge the implementations of other SERDES functions (powering and
IRQs). We can skip checking port numbers, since the serdes_get_lane()
methods inform if there is no lane on a port or if the lane cannot be
used for given cmode.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agonet: dsa: mv88e6xxx: create serdes_get_lane chip operation
Marek Behún [Mon, 26 Aug 2019 21:31:52 +0000 (23:31 +0200)]
net: dsa: mv88e6xxx: create serdes_get_lane chip operation

Create a serdes_get_lane() method in the mv88e6xxx operations structure.
Use it instead of calling the different implementations.
Also change the methods so that their return value is used only for
error. The lane number is put into a place referred to by a pointer
given as argument. If the port does not have a lane, return -ENODEV.
Lanes are phy addresses, so use u8 as their type.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Vivien Didelot <vivien.didelot@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agonet: dsa: mv88e6xxx: update code operating on hidden registers
Marek Behún [Mon, 26 Aug 2019 21:31:51 +0000 (23:31 +0200)]
net: dsa: mv88e6xxx: update code operating on hidden registers

This patch moves the functions operating on the hidden debug registers
into it's own file, port_hidden.c. The functions prefix is renamed from
mv88e6390_hidden_ to mv88e6xxx_port_hidden_, to be consistent with the
rest of this driver. The macros are prefixed with MV88E6XXX_ prefix, and
are changed not to use the BIT() macro nor bit shifts, since the rest of
the port.h file does not use it.

We also add the support for setting the Block Address field when
operating hidden registers. Marvell's mdio examples for SERDES settings
on Topaz use Block Address 0x7 when reading/writing hidden registers,
and although the specification says that block must be set to 0xf, those
settings are reachable only with Block Address 0x7.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Vivien Didelot <vivien.didelot@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agonet: dsa: mv88e6xxx: support 2500base-x in SGMII IRQ handler
Marek Behún [Mon, 26 Aug 2019 21:31:50 +0000 (23:31 +0200)]
net: dsa: mv88e6xxx: support 2500base-x in SGMII IRQ handler

The mv88e6390_serdes_irq_link_sgmii IRQ handler reads the SERDES PHY
status register to determine speed, among other things. If cmode of the
port is set to 2500base-x, though, the PHY still reports 1000 Mbps (the
PHY register itself does not differentiate between 1000 Mbps and 2500
Mbps - it thinks it is running at 1000 Mbps, although clock is 2.5x
faster).
Look at the cmode and set SPEED_2500 if cmode is set to 2500base-x.
Also tell mv88e6xxx_port_setup_mac the PHY interface mode corresponding
to current cmode in terms of phy_interface_t.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Vivien Didelot <vivien.didelot@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>